AMDGPU: Remove hasPostISelHook from most instructions

[arsenm]

Summary

Since this is only needed for VOP3 and a few other special
case instructions, stop setting it on everything.

[• tstellarAMD]

LGTM.

[arsenm]

r248657

lib/Target/AMDGPU/SIInstrFormats.td

class InstSI <dag outs, dag ins, string asm, list<dag> pattern> :
   let TSFlags{15} = MTBUF;
   let TSFlags{16} = SMRD;
   let TSFlags{17} = DS;
   let TSFlags{18} = MIMG;
   let TSFlags{19} = FLAT;
   let TSFlags{20} = WQM;
   let TSFlags{21} = VGPRSpill;
 
-  // Most instructions require adjustments after selection to satisfy
-  // operand requirements.
-  let hasPostISelHook = 1;
   let SchedRW = [Write32Bit];
 }
 
 class Enc32 {
   field bits<32> Inst;
   int Size = 4;
 }
 
class VOP3Common <dag outs, dag ins, string asm, list<dag> pattern> :
 
   let VOP3 = 1;
   let VALU = 1;
 
   let AsmMatchConverter = "cvtVOP3";
   let isCodeGenOnly = 0;
 
   int Size = 8;
+
+  // Because SGPRs may be allowed if there are multiple operands, we
+  // need a post-isel hook to insert copies in order to avoid
+  // violating constant bus requirements.
+  let hasPostISelHook = 1;
 }
 
 } // End Uses = [EXEC]
 
 //===----------------------------------------------------------------------===//
 // Scalar operations
 //===----------------------------------------------------------------------===//
 

lib/Target/AMDGPU/SIInstrInfo.td

 }
 
 multiclass DS_1A1D_RET <bits<8> op, string opName, RegisterClass rc,
                         string noRetOp = "",
   dag outs = (outs rc:$vdst),
   dag ins = (ins VGPR_32:$addr, rc:$data0, ds_offset:$offset, gds:$gds),
   string asm = opName#" $vdst, $addr, $data0"#"$offset$gds"> {
 
+  let hasPostISelHook = 1 in {
     def "" : DS_Pseudo <opName, outs, ins, []>,
              AtomicNoRet<noRetOp, 1>;
 
     let data1 = 0 in {
       def _si : DS_Off16_Real_si <op, opName, outs, ins, asm>;
       def _vi : DS_Off16_Real_vi <op, opName, outs, ins, asm>;
     }
   }
+}
 
 multiclass DS_1A2D_RET_m <bits<8> op, string opName, RegisterClass rc,
                           string noRetOp = "", dag ins,
   dag outs = (outs rc:$vdst),
   string asm = opName#" $vdst, $addr, $data0, $data1"#"$offset"#"$gds"> {
 
+  let hasPostISelHook = 1 in {
     def "" : DS_Pseudo <opName, outs, ins, []>,
              AtomicNoRet<noRetOp, 1>;
 
     def _si : DS_Off16_Real_si <op, opName, outs, ins, asm>;
     def _vi : DS_Off16_Real_vi <op, opName, outs, ins, asm>;
   }
+}
 
 multiclass DS_1A2D_RET <bits<8> op, string asm, RegisterClass rc,
                         string noRetOp = "", RegisterClass src = rc> :
   DS_1A2D_RET_m <op, asm, rc, noRetOp,
                  (ins VGPR_32:$addr, src:$data0, src:$data1,
                       ds_offset:$offset, gds:$gds)
 >;
 
let mayLoad = 1, mayStore = 1 in {
     }
 
     def _RTN : FLAT <op, (outs vdst_rc:$vdst),
                      (ins VReg_64:$addr, data_rc:$data, slc_flat_atomic:$slc,
                           tfe_flat_atomic:$tfe),
                      name#" $vdst, $addr, $data glc"#"$slc"#"$tfe", []>,
                AtomicNoRet <NAME, 1> {
       let glc = 1;
+      let hasPostISelHook = 1;
     }
   }
 }
 
 class MIMG_Mask <string op, int channels> {
   string Op = op;
   int Channels = channels;
 }