[lld-macho] Handle LOH_ARM64_ADRP_LDR_GOT optimization hints

[BertalanD]

Summary

This hint instructs the linker to perform the AdrpLdr or AdrpAdd
transformation depending on whether the GOT load has been relaxed to
load a local symbol's address directly.

[thakis]

\o/

lld/MachO/Arch/ARM64.cpp

223

ld64's version of this is called parseLoadOrStore and it finds stores too. will we do that later, or will we never relax stores?

405

I suppose these are rare enough that calling parseLdr() once before this function and then once again in this function isn't a big deal?

418

ld64 doesn't do this check for LOH_ARM64_ADRP_LDR_GOT afaict (?)

[BertalanD]

lld/MachO/Arch/ARM64.cpp

223

ld64 has a handy -verbose_optimization_hints flag, these are the stats for the usual Chromium Framework repro file:

❯ ld @response.txt -verbose_optimization_hints 2>&1 | grep 'transformed to' | cut -d ' ' -f1 | sort | uniq -c | sort -n
  24 adrp-add-str
 319 adrp-add-ldr
 341 adrp-ldr-got-str
4056 adrp-ldr-got
115745 adrp-add
121578 adrp-ldr-got-ldr

Based on this, store LOHs are quite rare, so I opted for making this function more compact and readable instead. But if we get around to adding the two store hints, a separate parseStr parser function would be better for readability.

405

I'm likely going to have to split checking + the actual relaxation into helper functions for the ADRP_LDR_GOT_LDR feature, is it okay if I remove the redundant check in that commit?

418

ld64 asserts in makeLDR_literal that the load's size is 4, 8 or 16 bytes though,

[thakis]

lld/MachO/Arch/ARM64.cpp

405

Sure, sounds good :)

lld/MachO/Arch/ARM64.cpp

public:
   OptimizationHintContext(uint8_t *buf, const ConcatInputSection *isec,
                           ArrayRef<uint64_t> relocTargets)
       : buf(buf), isec(isec), relocTargets(relocTargets),
         relocIt(isec->relocs.rbegin()) {}
 
   void applyAdrpAdd(const OptimizationHint &);
   void applyAdrpAdrp(const OptimizationHint &);
   void applyAdrpLdr(const OptimizationHint &);
+  void applyAdrpLdrGot(const OptimizationHint &);
 
 private:
   uint8_t *buf;
   const ConcatInputSection *isec;
   ArrayRef<uint64_t> relocTargets;
   std::vector<Reloc>::const_reverse_iterator relocIt;
 
   uint64_t getRelocTarget(const Reloc &);
static bool parseAdd(uint32_t insn, Add &add) {
   if ((insn & 0xffc00000) != 0x91000000)
     return false;
   add.destRegister = insn & 0x1f;
   add.srcRegister = (insn >> 5) & 0x1f;
   add.addend = (insn >> 10) & 0xfff;
   return true;
 }
 
 static bool parseLdr(uint32_t insn, Ldr &ldr) {
   ldr.destRegister = insn & 0x1f;
   ldr.baseRegister = (insn >> 5) & 0x1f;
   uint8_t size = insn >> 30;
   uint8_t opc = (insn >> 22) & 3;
 
   if ((insn & 0x3fc00000) == 0x39400000) {
     // LDR (immediate), LDRB (immediate), LDRH (immediate)
     ldr.size = 1 << size;

 //   ldr  xM, _foo
 void OptimizationHintContext::applyAdrpLdr(const OptimizationHint &hint) {
   uint32_t ins1 = read32le(buf + hint.offset0);
   uint32_t ins2 = read32le(buf + hint.offset0 + hint.delta[0]);
   Adrp adrp;
   if (!parseAdrp(ins1, adrp))
     return;
   Ldr ldr;
   if (!parseLdr(ins2, ldr))
     return;
   if (adrp.destRegister != ldr.baseRegister)
     return;
 
   Optional<PerformedReloc> rel1 = findPrimaryReloc(hint.offset0);
   Optional<PerformedReloc> rel2 = findReloc(hint.offset0 + hint.delta[0]);
   if (!rel1 || !rel2)
     return;
   if (ldr.offset != (rel1->referentVA & 0xfff))
     return;
   if ((rel1->referentVA & 3) != 0)
     return;
   if (ldr.size == 1 || ldr.size == 2)
     return;
   int64_t delta = rel1->referentVA - rel2->rel.offset - isec->getVA();
   if (delta >= (1 << 20) || delta < -(1 << 20))
     return;
 
   writeNop(buf + hint.offset0);
   writeLiteralLdr(buf + hint.offset0 + hint.delta[0], ldr, delta);
 }
 
+// GOT loads are emitted by the compiler as a pair of adrp and ldr instructions,
+// but they may be changed to adrp+add by relaxGotLoad(). This hint performs
+// the AdrpLdr or AdrpAdd transformation depending on whether it was relaxed.
+void OptimizationHintContext::applyAdrpLdrGot(const OptimizationHint &hint) {
+  uint32_t ins2 = read32le(buf + hint.offset0 + hint.delta[0]);
+  Add add;
+  Ldr ldr;
+  if (parseAdd(ins2, add))
+    applyAdrpAdd(hint);
+  else if (parseLdr(ins2, ldr))
+    applyAdrpLdr(hint);
+}
+
 void ARM64::applyOptimizationHints(uint8_t *buf, const ConcatInputSection *isec,
                                    ArrayRef<uint64_t> relocTargets) const {
   assert(isec);
   assert(relocTargets.size() == isec->relocs.size());
 
   // Note: Some of these optimizations might not be valid when shared regions
   // are in use. Will need to revisit this if splitSegInfo is added.
 
for (const OptimizationHint &hint : isec->optimizationHints) {
     case LOH_ARM64_ADRP_ADD_STR:
     case LOH_ARM64_ADRP_LDR_GOT_STR:
       // TODO: Implement these
       break;
     case LOH_ARM64_ADRP_ADD:
       ctx1.applyAdrpAdd(hint);
       break;
     case LOH_ARM64_ADRP_LDR_GOT:
-      // TODO: Implement this as well
+      ctx1.applyAdrpLdrGot(hint);
       break;
     }
   }
 
   OptimizationHintContext ctx2(buf, isec, relocTargets);
   for (const OptimizationHint &hint : isec->optimizationHints)
     if (hint.type == LOH_ARM64_ADRP_ADRP)
       ctx2.applyAdrpAdrp(hint);
 }
 
 TargetInfo *macho::createARM64TargetInfo() {
   static ARM64 t;
   return &t;
 }

lld/test/MachO/loh-adrp-ldr-got.s

+# REQUIRES: aarch64
+
+# RUN: rm -rf %t; split-file %s %t
+# RUN: llvm-mc -filetype=obj -triple=arm64-apple-darwin %t/obj.s -o %t/obj.o
+# RUN: llvm-mc -filetype=obj -triple=arm64-apple-darwin %t/dylib.s -o %t/dylib.o
+# RUN: %lld -arch arm64 -dylib -o %t/libdylib.dylib %t/dylib.o
+# RUN: %lld -arch arm64 %t/obj.o %t/libdylib.dylib -o %t/AdrpLdrGot
+# RUN: llvm-objdump -d --macho %t/AdrpLdrGot | FileCheck %s
+
+#--- obj.s
+.text
+.globl _main
+# CHECK-LABEL: _main:
+_main:
+## The referenced symbol is local
+L1: adrp x0, _local@GOTPAGE
+L2: ldr  x0, [x0, _local@GOTPAGEOFF]
+# CHECK-NEXT: adr x0
+# CHECK-NEXT: nop
+
+## The referenced symbol is in a dylib
+L3: adrp x1, _external@GOTPAGE
+L4: ldr  x1, [x1, _external@GOTPAGEOFF]
+# CHECK-NEXT: nop
+# CHECK-NEXT: ldr x1
+
+_local:
+  nop
+
+.loh AdrpLdrGot L1, L2
+.loh AdrpLdrGot L3, L4
+
+#--- dylib.s
+.globl _external
+_external: