Fix typos.

[brucem]

Summary

This fixes a variety of typos in docs, code and headers.

[vsk]

Thanks, LGTM

docs/BitCodeFormat.rst

 ------------------------
 
 The ``PARAMATTR_BLOCK`` block (id 9) contains a table of entries describing the
 attributes of function parameters. These entries are referenced by 1-based index
 in the *paramattr* field of module block `FUNCTION`_ records, or within the
 *attr* field of function block ``INST_INVOKE`` and ``INST_CALL`` records.
 
 Entries within ``PARAMATTR_BLOCK`` are constructed to ensure that each is unique
-(i.e., no two indicies represent equivalent attribute lists).
+(i.e., no two indices represent equivalent attribute lists).
 
 .. _PARAMATTR_CODE_ENTRY:
 
 PARAMATTR_CODE_ENTRY Record
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 ``[ENTRY, paramidx0, attr0, paramidx1, attr1...]``
 

 
 The ``TYPE_BLOCK`` block (id 10) contains records which constitute a table of
 type operator entries used to represent types referenced within an LLVM
 module. Each record (with the exception of `NUMENTRY`_) generates a single type
 table entry, which may be referenced by 0-based index from instructions,
 constants, metadata, type symbol table entries, or other type operator records.
 
 Entries within ``TYPE_BLOCK`` are constructed to ensure that each entry is
-unique (i.e., no two indicies represent structurally equivalent types).
+unique (i.e., no two indices represent structurally equivalent types).
 
 .. _TYPE_CODE_NUMENTRY:
 .. _NUMENTRY:
 
 TYPE_CODE_NUMENTRY Record
 ^^^^^^^^^^^^^^^^^^^^^^^^^
 
 ``[NUMENTRY, numentries]``

docs/BranchWeightMetadata.rst

 
 Supported Instructions
 ======================
 
 ``BranchInst``
 ^^^^^^^^^^^^^^
 
 Metadata is only assigned to the conditional branches. There are two extra
-operarands for the true and the false branch.
+operands for the true and the false branch.
 
 .. code-block:: llvm
 
   !0 = metadata !{
     metadata !"branch_weights",
     i32 <TRUE_BRANCH_WEIGHT>,
     i32 <FALSE_BRANCH_WEIGHT>
   }
.. code-block:: c++
   case 5:  // This case is likely to be taken.
   }
 
 CFG Modifications
 =================
 
 Branch Weight Metatada is not proof against CFG changes. If terminator operands'
 are changed some action should be taken. In other case some misoptimizations may
-occur due to incorrent branch prediction information.
+occur due to incorrect branch prediction information.
 
 Function Entry Counts
 =====================
 
-To allow comparing different functions durint inter-procedural analysis and
+To allow comparing different functions during inter-procedural analysis and
 optimization, ``MD_prof`` nodes can also be assigned to a function definition.
 The first operand is a string indicating the name of the associated counter.
 
 Currently, one counter is supported: "function_entry_count". This is a 64-bit
 counter that indicates the number of times that this function was invoked (in
 the case of instrumentation-based profiles). In the case of sampling-based
 profiles, this counter is an approximation of how many times the function was
 invoked.

docs/LangRef.rst

!0 = !DISubprogram(name: "foo", linkageName: "_Zfoov", scope: !1,
                        templateParams: !5, declaration: !6, variables: !7)
 
 .. _DILexicalBlock:
 
 DILexicalBlock
 """"""""""""""
 
 ``DILexicalBlock`` nodes describe nested blocks within a :ref:`subprogram
-<DISubprogram>`. The line number and column numbers are used to dinstinguish
+<DISubprogram>`. The line number and column numbers are used to distinguish
 two lexical blocks at same depth. They are valid targets for ``scope:``
 fields.
 
 .. code-block:: llvm
 
     !0 = distinct !DILexicalBlock(scope: !1, file: !2, line: 7, column: 35)
 
 Usually lexical blocks are ``distinct`` to prevent node merging based on

 a domain. When evaluating an aliasing query, if for some domain, the set
 of scopes with that domain in one instruction's ``alias.scope`` list is a
 subset of (or equal to) the set of scopes for that domain in another
 instruction's ``noalias`` list, then the two memory accesses are assumed not to
 alias.
 
 The metadata identifying each domain is itself a list containing one or two
 entries. The first entry is the name of the domain. Note that if the name is a
-string then it can be combined accross functions and translation units. A
+string then it can be combined across functions and translation units. A
 self-reference can be used to create globally unique domain names. A
 descriptive string may optionally be provided as a second list entry.
 
 The metadata identifying each scope is also itself a list containing two or
 three entries. The first entry is the name of the scope. Note that if the name
-is a string then it can be combined accross functions and translation units. A
+is a string then it can be combined across functions and translation units. A
 self-reference can be used to create globally unique scope names. A metadata
 reference to the scope's domain is the second entry. A descriptive string may
 optionally be provided as a third list entry.
 
 For example,
 
 .. code-block:: llvm
 

 """""""""
 
 The '``catchpad``' instruction is used by `LLVM's exception handling
 system <ExceptionHandling.html#overview>`_ to specify that a basic block
 is a catch block --- one where a personality routine attempts to transfer
 control to catch an exception.
 The ``args`` correspond to whatever information the personality
 routine requires to know if this is an appropriate place to catch the
-exception. Control is tranfered to the ``exception`` label if the
+exception. Control is transfered to the ``exception`` label if the
 ``catchpad`` is not an appropriate handler for the in-flight exception.
 The ``normal`` label should contain the code found in the ``catch``
 portion of a ``try``/``catch`` sequence. The ``resultval`` has the type
 :ref:`token <t_token>` and is used to match the ``catchpad`` to
 corresponding :ref:`catchrets <i_catchret>`.
 
 Arguments:
 """"""""""

 """"""""""
 
 The first operand is a vector value to be written to memory. The second operand is a vector of pointers, pointing to where the value elements should be stored. It has the same underlying type as the value operand. The third operand is an alignment of the destination addresses. The fourth operand, mask, is a vector of boolean values. The types of the mask and the value operand must have the same number of vector elements.
 
 
 Semantics:
 """"""""""
 
-The '``llvm.masked.scatter``' intrinsics is designed for writing selected vector elements to arbitrary memory addresses in a single IR operation. The operation may be conditional, when not all bits in the mask are switched on. It is useful for targets that support vector masked scatter and allows vectorizing basic blocks with data and control divergency. Other targets may support this intrinsic differently, for example by lowering it into a sequence of branches that guard scalar store operations.
+The '``llvm.masked.scatter``' intrinsics is designed for writing selected vector elements to arbitrary memory addresses in a single IR operation. The operation may be conditional, when not all bits in the mask are switched on. It is useful for targets that support vector masked scatter and allows vectorizing basic blocks with data and control divergence. Other targets may support this intrinsic differently, for example by lowering it into a sequence of branches that guard scalar store operations.
 
 ::
 
        ;; This instruction unconditionaly stores data vector in multiple addresses
        call @llvm.masked.scatter.v8i32 (<8 x i32> %value, <8 x i32*> %ptrs, i32 4,  <8 x i1>  <true, true, .. true>)
 
        ;; It is equivalent to a list of scalar stores
        %val0 = extractelement <8 x i32> %value, i32 0

docs/SourceLevelDebugging.rst

 given by the ``DW_AT_name attribute`` of the referenced debugging information
 entry, but rather the fully qualified name of the data or function member."
 So the only names in these tables for complex C++ entries is a fully
 qualified name.  Debugger users tend not to enter their search strings as
 "``a::b::c(int,const Foo&) const``", but rather as "``c``", "``b::c``" , or
 "``a::b::c``".  So the name entered in the name table must be demangled in
 order to chop it up appropriately and additional names must be manually entered
 into the table to make it effective as a name lookup table for debuggers to
-se.
+use.
 
 All debuggers currently ignore the "``.debug_pubnames``" table as a result of
 its inconsistent and useless public-only name content making it a waste of
 space in the object file.  These tables, when they are written to disk, are not
 sorted in any way, leaving every debugger to do its own parsing and sorting.
 These tables also include an inlined copy of the string values in the table
 itself making the tables much larger than they need to be on disk, especially
 for large C++ programs.

docs/Statepoints.rst

 load barriers, store barriers, and safepoints.
 
 #. A load barrier is a bit of code executed immediately after the
    machine load instruction, but before any use of the value loaded.
    Depending on the collector, such a barrier may be needed for all
    loads, merely loads of a particular type (in the original source
    language), or none at all.
 
-#. Analogously, a store barrier is a code fragement that runs
+#. Analogously, a store barrier is a code fragment that runs
    immediately before the machine store instruction, but after the
    computation of the value stored.  The most common use of a store
    barrier is to update a 'card table' in a generational garbage
    collector.
 
 #. A safepoint is a location at which pointers visible to the compiled
    code (i.e. currently in registers or on the stack) are allowed to
    change.  After the safepoint completes, the actual pointer value

 
 Instead, the statepoint intrinsic marks the actual site of the
 safepoint or statepoint.  The statepoint returns a token value (which
 exists only at compile time).  To get back the original return value
 of the call, we use the ``gc.result`` intrinsic.  To get the relocation
 of each pointer in turn, we use the ``gc.relocate`` intrinsic with the
 appropriate index.  Note that both the ``gc.relocate`` and ``gc.result`` are
 tied to the statepoint.  The combination forms a "statepoint relocation 
-sequence" and represents the entitety of a parseable call or 'statepoint'.
+sequence" and represents the entirety of a parseable call or 'statepoint'.
 
 When lowered, this example would generate the following x86 assembly:
 
 .. code-block:: gas
   
     .globl  test1
     .align  16, 0x90
     pushq %rax

 statepoint may be marked as a GC transition, and data that is necessary to
 perform the transition (if any) may be provided as additional arguments to the
 statepoint.
 
   Note that although in many cases statepoints may be inferred to be GC
   transitions based on the function symbols involved (e.g. a call from a
   function with GC strategy "foo" to a function with GC strategy "bar"),
   indirect calls that are also GC transitions must also be supported. This
-  requirement is the driving force behing the decision to require that GC
+  requirement is the driving force behind the decision to require that GC
   transitions are explicitly marked.
 
 Let's revisit the sample given above, this time treating the call to ``@foo``
 as a GC transition. Depending on our target, the transition code may need to
 access some extra state in order to inform the collector of the transition.
 Let's assume a hypothetical GC--somewhat unimaginatively named "hypothetical-gc"
 --that requires that a TLS variable must be written to before and after a call
 to unmanaged code. The resulting relocation sequence is:

include/llvm/CodeGen/SlotIndexes.h

public:
     SlotIndex() : lie(nullptr, 0) {}
 
     // Construct a new slot index from the given one, and set the slot.
     SlotIndex(const SlotIndex &li, Slot s) : lie(li.listEntry(), unsigned(s)) {
       assert(lie.getPointer() != nullptr &&
              "Attempt to construct index with 0 pointer.");
     }
 
-    /// Returns true if this is a valid index. Invalid indicies do
+    /// Returns true if this is a valid index. Invalid indices do
     /// not point into an index table, and cannot be compared.
     bool isValid() const {
       return lie.getPointer();
     }
 
     /// Return true for a valid index.
     explicit operator bool() const { return isValid(); }
 

lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp

if (Die.hasChildren()) {
 
     OutStreamer->AddComment("End Of Children Mark");
     EmitInt8(0);
   }
 }
 
 void
 AsmPrinter::emitDwarfAbbrevs(const std::vector<DIEAbbrev *>& Abbrevs) const {
-  // For each abbrevation.
+  // For each abbreviation.
   for (const DIEAbbrev *Abbrev : Abbrevs) {
-    // Emit the abbrevations code (base 1 index.)
+    // Emit the abbreviations code (base 1 index.)
     EmitULEB128(Abbrev->getNumber(), "Abbreviation Code");
 
     // Emit the abbreviations data.
     Abbrev->Emit(this);
   }
 
   // Mark end of abbreviations.
   EmitULEB128(0, "EOM(3)");
 }

lib/CodeGen/PrologEpilogInserter.cpp

for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
     }
 
     MachineInstr *MI = I;
     bool DoIncr = true;
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
       if (!MI->getOperand(i).isFI())
         continue;
 
-      // Frame indicies in debug values are encoded in a target independent
+      // Frame indices in debug values are encoded in a target independent
       // way with simply the frame index and offset rather than any
       // target-specific addressing mode.
       if (MI->isDebugValue()) {
-        assert(i == 0 && "Frame indicies can only appear as the first "
+        assert(i == 0 && "Frame indices can only appear as the first "
                          "operand of a DBG_VALUE machine instruction");
         unsigned Reg;
         MachineOperand &Offset = MI->getOperand(1);
         Offset.setImm(Offset.getImm() +
                       TFI->getFrameIndexReference(
                           Fn, MI->getOperand(0).getIndex(), Reg));
         MI->getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
         continue;

lib/IR/ConstantFold.cpp

foldConstantCastPair(
   unsigned opc,          ///< opcode of the second cast constant expression
   ConstantExpr *Op,      ///< the first cast constant expression
   Type *DstTy            ///< destination type of the first cast
 ) {
   assert(Op && Op->isCast() && "Can't fold cast of cast without a cast!");
   assert(DstTy && DstTy->isFirstClassType() && "Invalid cast destination type");
   assert(CastInst::isCast(opc) && "Invalid cast opcode");
 
-  // The the types and opcodes for the two Cast constant expressions
+  // The types and opcodes for the two Cast constant expressions
   Type *SrcTy = Op->getOperand(0)->getType();
   Type *MidTy = Op->getType();
   Instruction::CastOps firstOp = Instruction::CastOps(Op->getOpcode());
   Instruction::CastOps secondOp = Instruction::CastOps(opc);
 
   // Assume that pointers are never more than 64 bits wide, and only use this
   // for the middle type. Otherwise we could end up folding away illegal
   // bitcasts between address spaces with different sizes.
static bool isMaybeZeroSizedType(Type *Ty) {
 
   } else if (ArrayType *ATy = dyn_cast<ArrayType>(Ty)) {
     return isMaybeZeroSizedType(ATy->getElementType());
   }
   return false;
 }
 
 /// IdxCompare - Compare the two constants as though they were getelementptr
-/// indices.  This allows coersion of the types to be the same thing.
+/// indices.  This allows coercion of the types to be the same thing.
 ///
-/// If the two constants are the "same" (after coersion), return 0.  If the
+/// If the two constants are the "same" (after coercion), return 0.  If the
 /// first is less than the second, return -1, if the second is less than the
 /// first, return 1.  If the constants are not integral, return -2.
 ///
 static int IdxCompare(Constant *C1, Constant *C2, Type *ElTy) {
   if (C1 == C2) return 0;
 
   // Ok, we found a different index.  If they are not ConstantInt, we can't do
   // anything with them.
for (unsigned i = 1, e = Idxs.size(); i != e; ++i)
     if (!cast<Constant>(Idxs[i])->isNullValue())
       return false;
   return true;
 }
 
 /// \brief Test whether a given ConstantInt is in-range for a SequentialType.
 static bool isIndexInRangeOfSequentialType(SequentialType *STy,
                                            const ConstantInt *CI) {
-  // And indicies are valid when indexing along a pointer
+  // And indices are valid when indexing along a pointer
   if (isa<PointerType>(STy))
     return true;
 
   uint64_t NumElements = 0;
   // Determine the number of elements in our sequential type.
   if (auto *ATy = dyn_cast<ArrayType>(STy))
     NumElements = ATy->getNumElements();
   else if (auto *VTy = dyn_cast<VectorType>(STy))

lib/Target/AMDGPU/R600Instructions.td

 def : InsertVerticalPat <R600_INSERT_ELT_V2, v2f32, f32>;
 def : InsertVerticalPat <R600_INSERT_ELT_V4, v4i32, i32>;
 def : InsertVerticalPat <R600_INSERT_ELT_V4, v4f32, f32>;
 
 //===----------------------------------------------------------------------===//
 // ISel Patterns
 //===----------------------------------------------------------------------===//
 
-// CND*_INT Pattterns for f32 True / False values
+// CND*_INT Patterns for f32 True / False values
 
 class CND_INT_f32 <InstR600 cnd, CondCode cc> : Pat <
   (selectcc i32:$src0, 0, f32:$src1, f32:$src2, cc),
   (cnd $src0, $src1, $src2)
 >;
 
 def : CND_INT_f32 <CNDE_INT,  SETEQ>;
 def : CND_INT_f32 <CNDGT_INT, SETGT>;

lib/Target/Mips/MipsInstrInfo.td

 
 class shift_rotate_reg<string opstr, RegisterOperand RO, InstrItinClass itin,
                        SDPatternOperator OpNode = null_frag>:
   InstSE<(outs RO:$rd), (ins RO:$rt, GPR32Opnd:$rs),
          !strconcat(opstr, "\t$rd, $rt, $rs"),
          [(set RO:$rd, (OpNode RO:$rt, GPR32Opnd:$rs))], itin, FrmR,
          opstr>;
 
-// Load Upper Imediate
+// Load Upper Immediate
 class LoadUpper<string opstr, RegisterOperand RO, Operand Imm>:
   InstSE<(outs RO:$rt), (ins Imm:$imm16), !strconcat(opstr, "\t$rt, $imm16"),
          [], II_LUI, FrmI, opstr>, IsAsCheapAsAMove {
   let hasSideEffects = 0;
   let isReMaterializable = 1;
 }
 
 // Memory Load/Store

lib/Target/NVPTX/NVPTXUtilities.cpp

return id == Intrinsic::nvvm_ptr_local_to_gen ||
       id == Intrinsic::nvvm_ptr_gen_to_global ||
       id == Intrinsic::nvvm_ptr_gen_to_shared ||
       id == Intrinsic::nvvm_ptr_gen_to_local ||
       id == Intrinsic::nvvm_ptr_gen_to_constant ||
       id == Intrinsic::nvvm_ptr_gen_to_param;
 }
 
 // consider several special intrinsics in striping pointer casts, and
-// provide an option to ignore GEP indicies for find out the base address only
-// which could be used in simple alias disambigurate.
+// provide an option to ignore GEP indices for find out the base address only
+// which could be used in simple alias disambiguation.
 const Value *
 llvm::skipPointerTransfer(const Value *V, bool ignore_GEP_indices) {
   V = V->stripPointerCasts();
   while (true) {
     if (const IntrinsicInst *IS = dyn_cast<IntrinsicInst>(V)) {
       if (isMemorySpaceTransferIntrinsic(IS->getIntrinsicID())) {
         V = IS->getArgOperand(0)->stripPointerCasts();
         continue;
       }
     } else if (ignore_GEP_indices)
       if (const GEPOperator *GEP = dyn_cast<GEPOperator>(V)) {
         V = GEP->getPointerOperand()->stripPointerCasts();
         continue;
       }
     break;
   }
   return V;
 }
 
 // consider several special intrinsics in striping pointer casts, and
-// - ignore GEP indicies for find out the base address only, and
+// - ignore GEP indices for find out the base address only, and
 // - tracking PHINode
-// which could be used in simple alias disambigurate.
+// which could be used in simple alias disambiguation.
 const Value *
 llvm::skipPointerTransfer(const Value *V, std::set<const Value *> &processed) {
   if (processed.find(V) != processed.end())
     return nullptr;
   processed.insert(V);
 
   const Value *V2 = V->stripPointerCasts();
   if (V2 != V && processed.find(V2) != processed.end())
if (const IntrinsicInst *IS = dyn_cast<IntrinsicInst>(V)) {
         return PN;
       V = common;
     }
     break;
   }
   return V;
 }
 
-// The following are some useful utilities for debuggung
+// The following are some useful utilities for debugging
 
 BasicBlock *llvm::getParentBlock(Value *v) {
   if (BasicBlock *B = dyn_cast<BasicBlock>(v))
     return B;
 
   if (Instruction *I = dyn_cast<Instruction>(v))
     return I->getParent();
 
for (inst_iterator it = inst_begin(F), ie = inst_end(F); it != ie; ++it) {
     if (strcmp(I->getName().data(), instName) == 0) {
       return I;
     }
   }
 
   return nullptr;
 }
 
-// Dump an instruction by nane
+// Dump an instruction by name
 void llvm::dumpInst(Value *base, char *instName) {
   Instruction *I = getInst(base, instName);
   if (I)
     I->dump();
 }
 
 // Dump an instruction and all dependent instructions
 void llvm::dumpInstRec(Value *v, std::set<Instruction *> *visited) {

lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp

static Instruction *unpackLoadToAggregate(InstCombiner &IC, LoadInst &LI) {
   // stores here but it isn't clear that this is important.
   if (!LI.isSimple())
     return nullptr;
 
   Type *T = LI.getType();
   if (!T->isAggregateType())
     return nullptr;
 
-  assert(LI.getAlignment() && "Alignement must be set at this point");
+  assert(LI.getAlignment() && "Alignment must be set at this point");
 
   if (auto *ST = dyn_cast<StructType>(T)) {
     // If the struct only have one element, we unpack.
     if (ST->getNumElements() == 1) {
       LoadInst *NewLoad = combineLoadToNewType(IC, LI, ST->getTypeAtIndex(0U),
                                                ".unpack");
       return IC.ReplaceInstUsesWith(LI, IC.Builder->CreateInsertValue(
         UndefValue::get(T), NewLoad, 0, LI.getName()));
auto IsAllNonNegative = [&]() {
     }
 
     return true;
   };
 
   // FIXME: If the GEP is not inbounds, and there are extra indices after the
   // one we'll replace, those could cause the address computation to wrap
   // (rendering the IsAllNonNegative() check below insufficient). We can do
-  // better, ignoring zero indicies (and other indicies we can prove small
+  // better, ignoring zero indices (and other indices we can prove small
   // enough not to wrap).
   if (Idx+1 != GEPI->getNumOperands() && !GEPI->isInBounds())
     return false;
 
   // Note that isObjectSizeLessThanOrEq will return true only if the pointer is
   // also known to be dereferenceable.
   return isObjectSizeLessThanOrEq(GEPI->getOperand(0), TyAllocSize, DL) &&
          IsAllNonNegative();

 ///
 /// Currently, we also refuse to change the precise type used for an atomic or
 /// volatile store. This is debatable, and might be reasonable to change later.
 /// However, it is risky in case some backend or other part of LLVM is relying
 /// on the exact type stored to select appropriate atomic operations.
 ///
 /// \returns true if the store was successfully combined away. This indicates
 /// the caller must erase the store instruction. We have to let the caller erase
-/// the store instruction sas otherwise there is no way to signal whether it was
+/// the store instruction as otherwise there is no way to signal whether it was
 /// combined or not: IC.EraseInstFromFunction returns a null pointer.
 static bool combineStoreToValueType(InstCombiner &IC, StoreInst &SI) {
   // FIXME: We could probably with some care handle both volatile and atomic
   // stores here but it isn't clear that this is important.
   if (!SI.isSimple())
     return false;
 
   Value *V = SI.getValueOperand();

utils/TableGen/CodeGenDAGPatterns.h

public:
 
     /// EnforceVector - Remove all non-vector types from this type list.
     bool EnforceVector(TreePattern &TP);
 
     /// EnforceSmallerThan - 'this' must be a smaller VT than Other.  Update
     /// this an other based on this information.
     bool EnforceSmallerThan(EEVT::TypeSet &Other, TreePattern &TP);
 
-    /// EnforceVectorEltTypeIs - 'this' is now constrainted to be a vector type
+    /// EnforceVectorEltTypeIs - 'this' is now constrained to be a vector type
     /// whose element is VT.
     bool EnforceVectorEltTypeIs(EEVT::TypeSet &VT, TreePattern &TP);
 
-    /// EnforceVectorEltTypeIs - 'this' is now constrainted to be a vector type
+    /// EnforceVectorEltTypeIs - 'this' is now constrained to be a vector type
     /// whose element is VT.
     bool EnforceVectorEltTypeIs(MVT::SimpleValueType VT, TreePattern &TP);
 
-    /// EnforceVectorSubVectorTypeIs - 'this' is now constrainted to
+    /// EnforceVectorSubVectorTypeIs - 'this' is now constrained to
     /// be a vector type VT.
     bool EnforceVectorSubVectorTypeIs(EEVT::TypeSet &VT, TreePattern &TP);
 
-    /// EnforceVectorSameNumElts - 'this' is now constrainted to
+    /// EnforceVectorSameNumElts - 'this' is now constrained to
     /// be a vector with same num elements as VT.
     bool EnforceVectorSameNumElts(EEVT::TypeSet &VT, TreePattern &TP);
 
     bool operator!=(const TypeSet &RHS) const { return TypeVec != RHS.TypeVec; }
     bool operator==(const TypeSet &RHS) const { return TypeVec == RHS.TypeVec; }
 
   private:
     /// FillWithPossibleTypes - Set to all legal types and return true, only

utils/TableGen/CodeGenDAGPatterns.cpp

if (TypeVec.empty()) {
     return false;
   }
   return MadeChange;
 }
 
 
 
 /// EnforceSmallerThan - 'this' must be a smaller VT than Other. For vectors
-/// this shoud be based on the element type. Update this and other based on
+/// this should be based on the element type. Update this and other based on
 /// this information.
 bool EEVT::TypeSet::EnforceSmallerThan(EEVT::TypeSet &Other, TreePattern &TP) {
   if (TP.hasError())
     return false;
 
   // Both operands must be integer or FP, but we don't care which.
   bool MadeChange = false;
 
if (TypeVec.empty()) {
     TP.error("Type inference contradiction found, '" + InputSet.getName() +
              "' has nothing smaller than '" + Other.getName() +"'!");
     return false;
   }
 
   return MadeChange;
 }
 
-/// EnforceVectorEltTypeIs - 'this' is now constrainted to be a vector type
+/// EnforceVectorEltTypeIs - 'this' is now constrained to be a vector type
 /// whose element is specified by VTOperand.
 bool EEVT::TypeSet::EnforceVectorEltTypeIs(MVT::SimpleValueType VT,
                                            TreePattern &TP) {
   bool MadeChange = false;
 
   MadeChange |= EnforceVector(TP);
 
   TypeSet InputSet(*this);
if (TypeVec.empty()) {  // FIXME: Really want an SMLoc here!
     TP.error("Type inference contradiction found, forcing '" +
              InputSet.getName() + "' to have a vector element");
     return false;
   }
 
   return MadeChange;
 }
 
-/// EnforceVectorEltTypeIs - 'this' is now constrainted to be a vector type
+/// EnforceVectorEltTypeIs - 'this' is now constrained to be a vector type
 /// whose element is specified by VTOperand.
 bool EEVT::TypeSet::EnforceVectorEltTypeIs(EEVT::TypeSet &VTOperand,
                                            TreePattern &TP) {
   if (TP.hasError())
     return false;
 
   // "This" must be a vector and "VTOperand" must be a scalar.
   bool MadeChange = false;
bool EEVT::TypeSet::EnforceVectorEltTypeIs(EEVT::TypeSet &VTOperand,
   if (TypeVec.empty()) {  // FIXME: Really want an SMLoc here!
     TP.error("Type inference contradiction found, forcing '" +
              InputSet.getName() + "' to have a vector element");
     return false;
   }
   return MadeChange;
 }
 
-/// EnforceVectorSubVectorTypeIs - 'this' is now constrainted to be a
+/// EnforceVectorSubVectorTypeIs - 'this' is now constrained to be a
 /// vector type specified by VTOperand.
 bool EEVT::TypeSet::EnforceVectorSubVectorTypeIs(EEVT::TypeSet &VTOperand,
                                                  TreePattern &TP) {
   if (TP.hasError())
     return false;
 
   // "This" must be a vector and "VTOperand" must be a vector.
   bool MadeChange = false;
if (TypeVec.empty()) {  // FIXME: Really want an SMLoc here!
                VTOperand.getName() + "'");
       return false;
     }
   }
 
   return MadeChange;
 }
 
-/// EnforceVectorSameNumElts - 'this' is now constrainted to
+/// EnforceVectorSameNumElts - 'this' is now constrained to
 /// be a vector with same num elements as VTOperand.
 bool EEVT::TypeSet::EnforceVectorSameNumElts(EEVT::TypeSet &VTOperand,
                                              TreePattern &TP) {
   if (TP.hasError())
     return false;
 
   // "This" must be a vector and "VTOperand" must be a vector.
   bool MadeChange = false;
static bool InferFromPattern(CodeGenInstruction &InstInfo,
   if (InstInfo.mayStore != PatInfo.mayStore && !InstInfo.mayStore_Unset) {
     Error = true;
     PrintError(PatDef->getLoc(), "Pattern doesn't match mayStore = " +
                Twine(InstInfo.mayStore));
   }
 
   if (InstInfo.mayLoad != PatInfo.mayLoad && !InstInfo.mayLoad_Unset) {
     // Allow explicitly setting mayLoad = 1, even when the pattern has no loads.
-    // Some targets translate imediates to loads.
+    // Some targets translate immediates to loads.
     if (!InstInfo.mayLoad) {
       Error = true;
       PrintError(PatDef->getLoc(), "Pattern doesn't match mayLoad = " +
                  Twine(InstInfo.mayLoad));
     }
   }
 
   // Transfer inferred flags.
for (ptm_iterator I = ptm_begin(), E = ptm_end(); I != E; ++I) {
     // Provide the location of the relevant instruction definitions.
     for (unsigned i = 0, e = Instrs.size(); i != e; ++i) {
       if (Instrs[i] != PTM.getSrcRecord())
         PrintError(Instrs[i]->getLoc(), "defined here");
       const CodeGenInstruction &InstInfo = Target.getInstruction(Instrs[i]);
       if (InstInfo.InferredFrom &&
           InstInfo.InferredFrom != InstInfo.TheDef &&
           InstInfo.InferredFrom != PTM.getSrcRecord())
-        PrintError(InstInfo.InferredFrom->getLoc(), "inferred from patttern");
+        PrintError(InstInfo.InferredFrom->getLoc(), "inferred from pattern");
     }
   }
   if (Errors)
     PrintFatalError("Errors in DAG patterns");
 }
 
 /// Given a pattern result with an unresolved type, see if we can find one
 /// instruction with an unresolved result type.  Force this result type to an
if (!R->canPatternMatch(ErrString, CDP)) {
 
       if (AlreadyExists)
         delete R;
       else
         OutVariants.push_back(R);
     }
 
     // Increment indices to the next permutation by incrementing the
-    // indicies from last index backward, e.g., generate the sequence
+    // indices from last index backward, e.g., generate the sequence
     // [0, 0], [0, 1], [1, 0], [1, 1].
     int IdxsIdx;
     for (IdxsIdx = Idxs.size() - 1; IdxsIdx >= 0; --IdxsIdx) {
       if (++Idxs[IdxsIdx] == ChildVariants[IdxsIdx].size())
         Idxs[IdxsIdx] = 0;
       else
         break;
     }
for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i) {
       NC++;
     }
     // Consider the commuted order.
     if (isCommIntrinsic) {
       // Commutative intrinsic. First operand is the intrinsic id, 2nd and 3rd
       // operands are the commutative operands, and there might be more operands
       // after those.
       assert(NC >= 3 &&
-             "Commutative intrinsic should have at least 3 childrean!");
+             "Commutative intrinsic should have at least 3 children!");
       std::vector<std::vector<TreePatternNode*> > Variants;
       Variants.push_back(ChildVariants[0]); // Intrinsic id.
       Variants.push_back(ChildVariants[2]);
       Variants.push_back(ChildVariants[1]);
       for (unsigned i = 3; i != NC; ++i)
         Variants.push_back(ChildVariants[i]);
       CombineChildVariants(N, Variants, OutVariants, CDP, DepVars);
     } else if (NC == 2)