AVX512 : vdbpsadbw implementation

[igorb]

Summary

AVX512: Implemented encoding and intrinsics for vdbpsadbw
Added tests for intrinsics and encoding.

[delena]

LGTM

include/llvm/IR/IntrinsicsX86.td

def int_x86_avx512_mask_pmaddubs_w_256 :
           Intrinsic<[llvm_v16i16_ty],
           [llvm_v32i8_ty, llvm_v32i8_ty, llvm_v16i16_ty,  llvm_i16_ty],
           [IntrNoMem]>;
   def int_x86_avx512_mask_pmaddubs_w_512 :
          GCCBuiltin<"__builtin_ia32_pmaddubsw512_mask">,
           Intrinsic<[llvm_v32i16_ty],
           [llvm_v64i8_ty, llvm_v64i8_ty, llvm_v32i16_ty,  llvm_i32_ty],
           [IntrNoMem]>;
+
+  def int_x86_avx512_mask_dbpsadbw_128 :
+         GCCBuiltin<"__builtin_ia32_dbpsadbw128_mask">,
+          Intrinsic<[llvm_v8i16_ty],
+          [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty, llvm_v8i16_ty,
+           llvm_i8_ty], [IntrNoMem]>;
+
+  def int_x86_avx512_mask_dbpsadbw_256 :
+         GCCBuiltin<"__builtin_ia32_dbpsadbw256_mask">,
+          Intrinsic<[llvm_v16i16_ty],
+          [llvm_v32i8_ty, llvm_v32i8_ty, llvm_i32_ty, llvm_v16i16_ty,
+           llvm_i16_ty], [IntrNoMem]>;
+
+  def int_x86_avx512_mask_dbpsadbw_512 :
+         GCCBuiltin<"__builtin_ia32_dbpsadbw512_mask">,
+          Intrinsic<[llvm_v32i16_ty],
+          [llvm_v64i8_ty, llvm_v64i8_ty, llvm_i32_ty, llvm_v32i16_ty,
+           llvm_i32_ty], [IntrNoMem]>;
 }
 
 // Gather and Scatter ops
 let TargetPrefix = "x86" in {
   def int_x86_avx512_gather_dpd_512  : GCCBuiltin<"__builtin_ia32_gathersiv8df">,
           Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty, llvm_ptr_ty,
                      llvm_v8i32_ty, llvm_i8_ty, llvm_i32_ty],
                     [IntrReadArgMem]>;

lib/Target/X86/X86ISelLowering.h

enum NodeType : unsigned {
       /// corresponds to X86::PINSRW.
       PINSRW, MMX_PINSRW,
 
       /// Shuffle 16 8-bit values within a vector.
       PSHUFB,
 
       /// Compute Sum of Absolute Differences.
       PSADBW,
+      /// Compute Double Block Packed Sum-Absolute-Differences
+      DBPSADBW,
 
       /// Bitwise Logical AND NOT of Packed FP values.
       ANDNP,
 
       /// Copy integer sign.
       PSIGN,
 
       /// Blend where the selector is an immediate.

lib/Target/X86/X86ISelLowering.cpp

const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
   case X86ISD::VPERMV3:            return "X86ISD::VPERMV3";
   case X86ISD::VPERMIV3:           return "X86ISD::VPERMIV3";
   case X86ISD::VPERMI:             return "X86ISD::VPERMI";
   case X86ISD::VFIXUPIMM:          return "X86ISD::VFIXUPIMM";
   case X86ISD::VRANGE:             return "X86ISD::VRANGE";
   case X86ISD::PMULUDQ:            return "X86ISD::PMULUDQ";
   case X86ISD::PMULDQ:             return "X86ISD::PMULDQ";
   case X86ISD::PSADBW:             return "X86ISD::PSADBW";
+  case X86ISD::DBPSADBW:           return "X86ISD::DBPSADBW";
   case X86ISD::VASTART_SAVE_XMM_REGS: return "X86ISD::VASTART_SAVE_XMM_REGS";
   case X86ISD::VAARG_64:           return "X86ISD::VAARG_64";
   case X86ISD::WIN_ALLOCA:         return "X86ISD::WIN_ALLOCA";
   case X86ISD::MEMBARRIER:         return "X86ISD::MEMBARRIER";
   case X86ISD::MFENCE:             return "X86ISD::MFENCE";
   case X86ISD::SFENCE:             return "X86ISD::SFENCE";
   case X86ISD::LFENCE:             return "X86ISD::LFENCE";
   case X86ISD::SEG_ALLOCA:         return "X86ISD::SEG_ALLOCA";

lib/Target/X86/X86InstrAVX512.td

defm VPALIGN:   avx512_common_3Op_rm_imm8<0x0F, X86PAlignr, "vpalignr" ,
                                           avx512vl_i8_info, avx512vl_i8_info>,
                 avx512_vpalign_lowering_common<avx512vl_i16_info>,
                 avx512_vpalign_lowering_common<avx512vl_i32_info>,
                 avx512_vpalign_lowering_common<avx512vl_f32_info>,
                 avx512_vpalign_lowering_common<avx512vl_i64_info>,
                 avx512_vpalign_lowering_common<avx512vl_f64_info>,
                 EVEX_CD8<8, CD8VF>;
 
+defm VDBPSADBW: avx512_common_3Op_rm_imm8<0x42, X86dbpsadbw, "vdbpsadbw" ,
+                    avx512vl_i16_info, avx512vl_i8_info>, EVEX_CD8<8, CD8VF>;
+
 multiclass avx512_unary_rm<bits<8> opc, string OpcodeStr, SDNode OpNode,
                            X86VectorVTInfo _> {
   defm rr : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
                     (ins _.RC:$src1), OpcodeStr##_.Suffix,
                     "$src1", "$src1",
                     (_.VT (OpNode _.RC:$src1))>, EVEX, AVX5128IBase;
 
   let mayLoad = 1 in

lib/Target/X86/X86InstrFragmentsSIMD.td

def X86cvtudq2pd: SDNode<"X86ISD::CVTUDQ2PD",
                  SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
                                       SDTCisVT<1, v4i32>]>>;
 def X86pshufb  : SDNode<"X86ISD::PSHUFB",
                  SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
                                       SDTCisSameAs<0,2>]>>;
 def X86psadbw  : SDNode<"X86ISD::PSADBW",
                  SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
                                       SDTCisSameAs<0,2>]>>;
+def X86dbpsadbw : SDNode<"X86ISD::DBPSADBW",
+                  SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisVec<1>,
+                                       SDTCisSameAs<1,2>, SDTCisInt<3>]>>;
 def X86andnp   : SDNode<"X86ISD::ANDNP",
                  SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
                                       SDTCisSameAs<0,2>]>>;
 def X86psign   : SDNode<"X86ISD::PSIGN",
                  SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
                                       SDTCisSameAs<0,2>]>>;
 def X86pextrb  : SDNode<"X86ISD::PEXTRB",
                  SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;

lib/Target/X86/X86IntrinsicsInfo.h

static const IntrinsicData  IntrinsicsWithoutChain[] = {
   X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_512, INTR_TYPE_1OP_MASK,
                      ISD::UINT_TO_FP, ISD::UINT_TO_FP),
   X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_128, INTR_TYPE_1OP_MASK,
                      ISD::UINT_TO_FP, 0),
   X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_256, INTR_TYPE_1OP_MASK,
                      ISD::UINT_TO_FP, 0),
   X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_512, INTR_TYPE_1OP_MASK,
                      ISD::UINT_TO_FP, ISD::UINT_TO_FP),
-
+  X86_INTRINSIC_DATA(avx512_mask_dbpsadbw_128, INTR_TYPE_3OP_IMM8_MASK,
+                     X86ISD::DBPSADBW, 0),
+  X86_INTRINSIC_DATA(avx512_mask_dbpsadbw_256, INTR_TYPE_3OP_IMM8_MASK,
+                     X86ISD::DBPSADBW, 0),
+  X86_INTRINSIC_DATA(avx512_mask_dbpsadbw_512, INTR_TYPE_3OP_IMM8_MASK,
+                     X86ISD::DBPSADBW, 0),
   X86_INTRINSIC_DATA(avx512_mask_div_pd_128, INTR_TYPE_2OP_MASK, ISD::FDIV, 0),
   X86_INTRINSIC_DATA(avx512_mask_div_pd_256, INTR_TYPE_2OP_MASK, ISD::FDIV, 0),
   X86_INTRINSIC_DATA(avx512_mask_div_pd_512, INTR_TYPE_2OP_MASK, ISD::FDIV,
                      X86ISD::FDIV_RND),
   X86_INTRINSIC_DATA(avx512_mask_div_ps_128, INTR_TYPE_2OP_MASK, ISD::FDIV, 0),
   X86_INTRINSIC_DATA(avx512_mask_div_ps_256, INTR_TYPE_2OP_MASK, ISD::FDIV, 0),
   X86_INTRINSIC_DATA(avx512_mask_div_ps_512, INTR_TYPE_2OP_MASK, ISD::FDIV,
                      X86ISD::FDIV_RND),

test/CodeGen/X86/avx512bw-intrinsics.ll

 ; CHECK-NEXT:    retq
   %res = call <64 x i8> @llvm.x86.avx512.mask.palignr.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <64 x i8> %x3, i64 %x4)
   %res1 = call <64 x i8> @llvm.x86.avx512.mask.palignr.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <64 x i8> zeroinitializer, i64 %x4)
   %res2 = call <64 x i8> @llvm.x86.avx512.mask.palignr.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <64 x i8> %x3, i64 -1)
   %res3 = add <64 x i8> %res, %res1
   %res4 = add <64 x i8> %res3, %res2
   ret <64 x i8> %res4
 }
+
+declare <32 x i16> @llvm.x86.avx512.mask.dbpsadbw.512(<64 x i8>, <64 x i8>, i32, <32 x i16>, i32)
+
+define <32 x i16>@test_int_x86_avx512_mask_dbpsadbw_512(<64 x i8> %x0, <64 x i8> %x1, <32 x i16> %x3, i32 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_mask_dbpsadbw_512:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    kmovd %edi, %k1
+; CHECK-NEXT:    vdbpsadbw $2, %zmm1, %zmm0, %zmm2 {%k1}
+; CHECK-NEXT:    vdbpsadbw $2, %zmm1, %zmm0, %zmm3 {%k1} {z}
+; CHECK-NEXT:    vdbpsadbw $2, %zmm1, %zmm0, %zmm0
+; CHECK-NEXT:    vpaddw %zmm3, %zmm2, %zmm1
+; CHECK-NEXT:    vpaddw %zmm0, %zmm1, %zmm0
+; CHECK-NEXT:    retq
+  %res = call <32 x i16> @llvm.x86.avx512.mask.dbpsadbw.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <32 x i16> %x3, i32 %x4)
+  %res1 = call <32 x i16> @llvm.x86.avx512.mask.dbpsadbw.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <32 x i16> zeroinitializer, i32 %x4)
+  %res2 = call <32 x i16> @llvm.x86.avx512.mask.dbpsadbw.512(<64 x i8> %x0, <64 x i8> %x1, i32 2, <32 x i16> %x3, i32 -1)
+  %res3 = add <32 x i16> %res, %res1
+  %res4 = add <32 x i16> %res3, %res2
+  ret <32 x i16> %res4
+}

test/CodeGen/X86/avx512bwvl-intrinsics.ll

 ; CHECK-NEXT:    retq
   %res = call <32 x i8> @llvm.x86.avx512.mask.palignr.256(<32 x i8> %x0, <32 x i8> %x1, i32 2, <32 x i8> %x3, i32 %x4)
   %res1 = call <32 x i8> @llvm.x86.avx512.mask.palignr.256(<32 x i8> %x0, <32 x i8> %x1, i32 2, <32 x i8> zeroinitializer, i32 %x4)
   %res2 = call <32 x i8> @llvm.x86.avx512.mask.palignr.256(<32 x i8> %x0, <32 x i8> %x1, i32 2, <32 x i8> %x3, i32 -1)
   %res3 = add <32 x i8> %res, %res1
   %res4 = add <32 x i8> %res3, %res2
   ret <32 x i8> %res4
 }
+
+declare <8 x i16> @llvm.x86.avx512.mask.dbpsadbw.128(<16 x i8>, <16 x i8>, i32, <8 x i16>, i8)
+
+define <8 x i16>@test_int_x86_avx512_mask_dbpsadbw_128(<16 x i8> %x0, <16 x i8> %x1, <8 x i16> %x3, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_mask_dbpsadbw_128:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vdbpsadbw $2, %xmm1, %xmm0, %xmm2 {%k1}
+; CHECK-NEXT:    vdbpsadbw $2, %xmm1, %xmm0, %xmm3 {%k1} {z}
+; CHECK-NEXT:    vdbpsadbw $2, %xmm1, %xmm0, %xmm0
+; CHECK-NEXT:    vpaddw %xmm3, %xmm2, %xmm1
+; CHECK-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
+; CHECK-NEXT:    retq
+  %res = call <8 x i16> @llvm.x86.avx512.mask.dbpsadbw.128(<16 x i8> %x0, <16 x i8> %x1, i32 2, <8 x i16> %x3, i8 %x4)
+  %res1 = call <8 x i16> @llvm.x86.avx512.mask.dbpsadbw.128(<16 x i8> %x0, <16 x i8> %x1, i32 2, <8 x i16> zeroinitializer, i8 %x4)
+  %res2 = call <8 x i16> @llvm.x86.avx512.mask.dbpsadbw.128(<16 x i8> %x0, <16 x i8> %x1, i32 2, <8 x i16> %x3, i8 -1)
+  %res3 = add <8 x i16> %res, %res1
+  %res4 = add <8 x i16> %res2, %res3
+  ret <8 x i16> %res4
+}
+
+declare <16 x i16> @llvm.x86.avx512.mask.dbpsadbw.256(<32 x i8>, <32 x i8>, i32, <16 x i16>, i16)
+
+define <16 x i16>@test_int_x86_avx512_mask_dbpsadbw_256(<32 x i8> %x0, <32 x i8> %x1, <16 x i16> %x3, i16 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_mask_dbpsadbw_256:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    kmovw %edi, %k1
+; CHECK-NEXT:    vdbpsadbw $2, %ymm1, %ymm0, %ymm2 {%k1}
+; CHECK-NEXT:    vdbpsadbw $2, %ymm1, %ymm0, %ymm3 {%k1} {z}
+; CHECK-NEXT:    vdbpsadbw $2, %ymm1, %ymm0, %ymm0
+; CHECK-NEXT:    vpaddw %ymm3, %ymm2, %ymm1
+; CHECK-NEXT:    vpaddw %ymm0, %ymm1, %ymm0
+; CHECK-NEXT:    retq
+  %res = call <16 x i16> @llvm.x86.avx512.mask.dbpsadbw.256(<32 x i8> %x0, <32 x i8> %x1, i32 2, <16 x i16> %x3, i16 %x4)
+  %res1 = call <16 x i16> @llvm.x86.avx512.mask.dbpsadbw.256(<32 x i8> %x0, <32 x i8> %x1, i32 2, <16 x i16> zeroinitializer, i16 %x4)
+  %res2 = call <16 x i16> @llvm.x86.avx512.mask.dbpsadbw.256(<32 x i8> %x0, <32 x i8> %x1, i32 2, <16 x i16> %x3, i16 -1)
+  %res3 = add <16 x i16> %res, %res1
+  %res4 = add <16 x i16> %res3, %res2
+  ret <16 x i16> %res4
+}

test/MC/X86/x86-64-avx512bw.s

 // CHECK: vpalignr $123, -8192(%rdx), %zmm26, %zmm22
 // CHECK:  encoding: [0x62,0xe3,0x2d,0x40,0x0f,0x72,0x80,0x7b]
           vpalignr $123, -8192(%rdx), %zmm26, %zmm22
 
 // CHECK: vpalignr $123, -8256(%rdx), %zmm26, %zmm22
 // CHECK:  encoding: [0x62,0xe3,0x2d,0x40,0x0f,0xb2,0xc0,0xdf,0xff,0xff,0x7b]
           vpalignr $123, -8256(%rdx), %zmm26, %zmm22
 
+// CHECK: vdbpsadbw $171, %zmm18, %zmm20, %zmm21
+// CHECK:  encoding: [0x62,0xa3,0x5d,0x40,0x42,0xea,0xab]
+          vdbpsadbw $171, %zmm18, %zmm20, %zmm21
+
+// CHECK: vdbpsadbw $171, %zmm18, %zmm20, %zmm21 {%k1}
+// CHECK:  encoding: [0x62,0xa3,0x5d,0x41,0x42,0xea,0xab]
+          vdbpsadbw $171, %zmm18, %zmm20, %zmm21 {%k1}
+
+// CHECK: vdbpsadbw $171, %zmm18, %zmm20, %zmm21 {%k1} {z}
+// CHECK:  encoding: [0x62,0xa3,0x5d,0xc1,0x42,0xea,0xab]
+          vdbpsadbw $171, %zmm18, %zmm20, %zmm21 {%k1} {z}
+
+// CHECK: vdbpsadbw $123, %zmm18, %zmm20, %zmm21
+// CHECK:  encoding: [0x62,0xa3,0x5d,0x40,0x42,0xea,0x7b]
+          vdbpsadbw $123, %zmm18, %zmm20, %zmm21
+
+// CHECK: vdbpsadbw $123, (%rcx), %zmm20, %zmm21
+// CHECK:  encoding: [0x62,0xe3,0x5d,0x40,0x42,0x29,0x7b]
+          vdbpsadbw $123, (%rcx), %zmm20, %zmm21
+
+// CHECK: vdbpsadbw $123, 291(%rax,%r14,8), %zmm20, %zmm21
+// CHECK:  encoding: [0x62,0xa3,0x5d,0x40,0x42,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vdbpsadbw $123, 291(%rax,%r14,8), %zmm20, %zmm21
+
+// CHECK: vdbpsadbw $123, 8128(%rdx), %zmm20, %zmm21
+// CHECK:  encoding: [0x62,0xe3,0x5d,0x40,0x42,0x6a,0x7f,0x7b]
+          vdbpsadbw $123, 8128(%rdx), %zmm20, %zmm21
+
+// CHECK: vdbpsadbw $123, 8192(%rdx), %zmm20, %zmm21
+// CHECK:  encoding: [0x62,0xe3,0x5d,0x40,0x42,0xaa,0x00,0x20,0x00,0x00,0x7b]
+          vdbpsadbw $123, 8192(%rdx), %zmm20, %zmm21
+
+// CHECK: vdbpsadbw $123, -8192(%rdx), %zmm20, %zmm21
+// CHECK:  encoding: [0x62,0xe3,0x5d,0x40,0x42,0x6a,0x80,0x7b]
+          vdbpsadbw $123, -8192(%rdx), %zmm20, %zmm21
+
+// CHECK: vdbpsadbw $123, -8256(%rdx), %zmm20, %zmm21
+// CHECK:  encoding: [0x62,0xe3,0x5d,0x40,0x42,0xaa,0xc0,0xdf,0xff,0xff,0x7b]
+          vdbpsadbw $123, -8256(%rdx), %zmm20, %zmm21
+

test/MC/X86/x86-64-avx512bw_vl.s

 // CHECK: vpalignr $123, -4096(%rdx), %ymm17, %ymm21
 // CHECK:  encoding: [0x62,0xe3,0x75,0x20,0x0f,0x6a,0x80,0x7b]
           vpalignr $0x7b,-4096(%rdx), %ymm17, %ymm21
 
 // CHECK: vpalignr $123, -4128(%rdx), %ymm17, %ymm21
 // CHECK:  encoding: [0x62,0xe3,0x75,0x20,0x0f,0xaa,0xe0,0xef,0xff,0xff,0x7b]
           vpalignr $0x7b,-4128(%rdx), %ymm17, %ymm21
 
+// CHECK: vdbpsadbw $171, %xmm20, %xmm29, %xmm17
+// CHECK:  encoding: [0x62,0xa3,0x15,0x00,0x42,0xcc,0xab]
+          vdbpsadbw $0xab, %xmm20, %xmm29, %xmm17
+
+// CHECK: vdbpsadbw $171, %xmm20, %xmm29, %xmm17 {%k4}
+// CHECK:  encoding: [0x62,0xa3,0x15,0x04,0x42,0xcc,0xab]
+          vdbpsadbw $0xab, %xmm20, %xmm29, %xmm17 {%k4}
+
+// CHECK: vdbpsadbw $171, %xmm20, %xmm29, %xmm17 {%k4} {z}
+// CHECK:  encoding: [0x62,0xa3,0x15,0x84,0x42,0xcc,0xab]
+          vdbpsadbw $0xab, %xmm20, %xmm29, %xmm17 {%k4} {z}
+
+// CHECK: vdbpsadbw $123, %xmm20, %xmm29, %xmm17
+// CHECK:  encoding: [0x62,0xa3,0x15,0x00,0x42,0xcc,0x7b]
+          vdbpsadbw $0x7b, %xmm20, %xmm29, %xmm17
+
+// CHECK: vdbpsadbw $123, (%rcx), %xmm29, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0x15,0x00,0x42,0x09,0x7b]
+          vdbpsadbw $0x7b,(%rcx), %xmm29, %xmm17
+
+// CHECK: vdbpsadbw $123, 4660(%rax,%r14,8), %xmm29, %xmm17
+// CHECK:  encoding: [0x62,0xa3,0x15,0x00,0x42,0x8c,0xf0,0x34,0x12,0x00,0x00,0x7b]
+          vdbpsadbw $0x7b,4660(%rax,%r14,8), %xmm29, %xmm17
+
+// CHECK: vdbpsadbw $123, 2032(%rdx), %xmm29, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0x15,0x00,0x42,0x4a,0x7f,0x7b]
+          vdbpsadbw $0x7b,2032(%rdx), %xmm29, %xmm17
+
+// CHECK: vdbpsadbw $123, 2048(%rdx), %xmm29, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0x15,0x00,0x42,0x8a,0x00,0x08,0x00,0x00,0x7b]
+          vdbpsadbw $0x7b,2048(%rdx), %xmm29, %xmm17
+
+// CHECK: vdbpsadbw $123, -2048(%rdx), %xmm29, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0x15,0x00,0x42,0x4a,0x80,0x7b]
+          vdbpsadbw $0x7b,-2048(%rdx), %xmm29, %xmm17
+
+// CHECK: vdbpsadbw $123, -2064(%rdx), %xmm29, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0x15,0x00,0x42,0x8a,0xf0,0xf7,0xff,0xff,0x7b]
+          vdbpsadbw $0x7b,-2064(%rdx), %xmm29, %xmm17
+
+// CHECK: vdbpsadbw $171, %ymm26, %ymm28, %ymm26
+// CHECK:  encoding: [0x62,0x03,0x1d,0x20,0x42,0xd2,0xab]
+          vdbpsadbw $0xab, %ymm26, %ymm28, %ymm26
+
+// CHECK: vdbpsadbw $171, %ymm26, %ymm28, %ymm26 {%k4}
+// CHECK:  encoding: [0x62,0x03,0x1d,0x24,0x42,0xd2,0xab]
+          vdbpsadbw $0xab, %ymm26, %ymm28, %ymm26 {%k4}
+
+// CHECK: vdbpsadbw $171, %ymm26, %ymm28, %ymm26 {%k4} {z}
+// CHECK:  encoding: [0x62,0x03,0x1d,0xa4,0x42,0xd2,0xab]
+          vdbpsadbw $0xab, %ymm26, %ymm28, %ymm26 {%k4} {z}
+
+// CHECK: vdbpsadbw $123, %ymm26, %ymm28, %ymm26
+// CHECK:  encoding: [0x62,0x03,0x1d,0x20,0x42,0xd2,0x7b]
+          vdbpsadbw $0x7b, %ymm26, %ymm28, %ymm26
+
+// CHECK: vdbpsadbw $123, (%rcx), %ymm28, %ymm26
+// CHECK:  encoding: [0x62,0x63,0x1d,0x20,0x42,0x11,0x7b]
+          vdbpsadbw $0x7b,(%rcx), %ymm28, %ymm26
+
+// CHECK: vdbpsadbw $123, 4660(%rax,%r14,8), %ymm28, %ymm26
+// CHECK:  encoding: [0x62,0x23,0x1d,0x20,0x42,0x94,0xf0,0x34,0x12,0x00,0x00,0x7b]
+          vdbpsadbw $0x7b,4660(%rax,%r14,8), %ymm28, %ymm26
+
+// CHECK: vdbpsadbw $123, 4064(%rdx), %ymm28, %ymm26
+// CHECK:  encoding: [0x62,0x63,0x1d,0x20,0x42,0x52,0x7f,0x7b]
+          vdbpsadbw $0x7b,4064(%rdx), %ymm28, %ymm26
+
+// CHECK: vdbpsadbw $123, 4096(%rdx), %ymm28, %ymm26
+// CHECK:  encoding: [0x62,0x63,0x1d,0x20,0x42,0x92,0x00,0x10,0x00,0x00,0x7b]
+          vdbpsadbw $0x7b,4096(%rdx), %ymm28, %ymm26
+
+// CHECK: vdbpsadbw $123, -4096(%rdx), %ymm28, %ymm26
+// CHECK:  encoding: [0x62,0x63,0x1d,0x20,0x42,0x52,0x80,0x7b]
+          vdbpsadbw $0x7b,-4096(%rdx), %ymm28, %ymm26
+
+// CHECK: vdbpsadbw $123, -4128(%rdx), %ymm28, %ymm26
+// CHECK:  encoding: [0x62,0x63,0x1d,0x20,0x42,0x92,0xe0,0xef,0xff,0xff,0x7b]
+          vdbpsadbw $0x7b,-4128(%rdx), %ymm28, %ymm26
+
+// CHECK: vdbpsadbw $171, %xmm17, %xmm25, %xmm22
+// CHECK:  encoding: [0x62,0xa3,0x35,0x00,0x42,0xf1,0xab]
+          vdbpsadbw $171, %xmm17, %xmm25, %xmm22
+
+// CHECK: vdbpsadbw $171, %xmm17, %xmm25, %xmm22 {%k3}
+// CHECK:  encoding: [0x62,0xa3,0x35,0x03,0x42,0xf1,0xab]
+          vdbpsadbw $171, %xmm17, %xmm25, %xmm22 {%k3}
+
+// CHECK: vdbpsadbw $171, %xmm17, %xmm25, %xmm22 {%k3} {z}
+// CHECK:  encoding: [0x62,0xa3,0x35,0x83,0x42,0xf1,0xab]
+          vdbpsadbw $171, %xmm17, %xmm25, %xmm22 {%k3} {z}
+
+// CHECK: vdbpsadbw $123, %xmm17, %xmm25, %xmm22
+// CHECK:  encoding: [0x62,0xa3,0x35,0x00,0x42,0xf1,0x7b]
+          vdbpsadbw $123, %xmm17, %xmm25, %xmm22
+
+// CHECK: vdbpsadbw $123, (%rcx), %xmm25, %xmm22
+// CHECK:  encoding: [0x62,0xe3,0x35,0x00,0x42,0x31,0x7b]
+          vdbpsadbw $123, (%rcx), %xmm25, %xmm22
+
+// CHECK: vdbpsadbw $123, 291(%rax,%r14,8), %xmm25, %xmm22
+// CHECK:  encoding: [0x62,0xa3,0x35,0x00,0x42,0xb4,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vdbpsadbw $123, 291(%rax,%r14,8), %xmm25, %xmm22
+
+// CHECK: vdbpsadbw $123, 2032(%rdx), %xmm25, %xmm22
+// CHECK:  encoding: [0x62,0xe3,0x35,0x00,0x42,0x72,0x7f,0x7b]
+          vdbpsadbw $123, 2032(%rdx), %xmm25, %xmm22
+
+// CHECK: vdbpsadbw $123, 2048(%rdx), %xmm25, %xmm22
+// CHECK:  encoding: [0x62,0xe3,0x35,0x00,0x42,0xb2,0x00,0x08,0x00,0x00,0x7b]
+          vdbpsadbw $123, 2048(%rdx), %xmm25, %xmm22
+
+// CHECK: vdbpsadbw $123, -2048(%rdx), %xmm25, %xmm22
+// CHECK:  encoding: [0x62,0xe3,0x35,0x00,0x42,0x72,0x80,0x7b]
+          vdbpsadbw $123, -2048(%rdx), %xmm25, %xmm22
+
+// CHECK: vdbpsadbw $123, -2064(%rdx), %xmm25, %xmm22
+// CHECK:  encoding: [0x62,0xe3,0x35,0x00,0x42,0xb2,0xf0,0xf7,0xff,0xff,0x7b]
+          vdbpsadbw $123, -2064(%rdx), %xmm25, %xmm22
+
+// CHECK: vdbpsadbw $171, %ymm20, %ymm19, %ymm17
+// CHECK:  encoding: [0x62,0xa3,0x65,0x20,0x42,0xcc,0xab]
+          vdbpsadbw $171, %ymm20, %ymm19, %ymm17
+
+// CHECK: vdbpsadbw $171, %ymm20, %ymm19, %ymm17 {%k5}
+// CHECK:  encoding: [0x62,0xa3,0x65,0x25,0x42,0xcc,0xab]
+          vdbpsadbw $171, %ymm20, %ymm19, %ymm17 {%k5}
+
+// CHECK: vdbpsadbw $171, %ymm20, %ymm19, %ymm17 {%k5} {z}
+// CHECK:  encoding: [0x62,0xa3,0x65,0xa5,0x42,0xcc,0xab]
+          vdbpsadbw $171, %ymm20, %ymm19, %ymm17 {%k5} {z}
+
+// CHECK: vdbpsadbw $123, %ymm20, %ymm19, %ymm17
+// CHECK:  encoding: [0x62,0xa3,0x65,0x20,0x42,0xcc,0x7b]
+          vdbpsadbw $123, %ymm20, %ymm19, %ymm17
+
+// CHECK: vdbpsadbw $123, (%rcx), %ymm19, %ymm17
+// CHECK:  encoding: [0x62,0xe3,0x65,0x20,0x42,0x09,0x7b]
+          vdbpsadbw $123, (%rcx), %ymm19, %ymm17
+
+// CHECK: vdbpsadbw $123, 291(%rax,%r14,8), %ymm19, %ymm17
+// CHECK:  encoding: [0x62,0xa3,0x65,0x20,0x42,0x8c,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vdbpsadbw $123, 291(%rax,%r14,8), %ymm19, %ymm17
+
+// CHECK: vdbpsadbw $123, 4064(%rdx), %ymm19, %ymm17
+// CHECK:  encoding: [0x62,0xe3,0x65,0x20,0x42,0x4a,0x7f,0x7b]
+          vdbpsadbw $123, 4064(%rdx), %ymm19, %ymm17
+
+// CHECK: vdbpsadbw $123, 4096(%rdx), %ymm19, %ymm17
+// CHECK:  encoding: [0x62,0xe3,0x65,0x20,0x42,0x8a,0x00,0x10,0x00,0x00,0x7b]
+          vdbpsadbw $123, 4096(%rdx), %ymm19, %ymm17
+
+// CHECK: vdbpsadbw $123, -4096(%rdx), %ymm19, %ymm17
+// CHECK:  encoding: [0x62,0xe3,0x65,0x20,0x42,0x4a,0x80,0x7b]
+          vdbpsadbw $123, -4096(%rdx), %ymm19, %ymm17
+
+// CHECK: vdbpsadbw $123, -4128(%rdx), %ymm19, %ymm17
+// CHECK:  encoding: [0x62,0xe3,0x65,0x20,0x42,0x8a,0xe0,0xef,0xff,0xff,0x7b]
+          vdbpsadbw $123, -4128(%rdx), %ymm19, %ymm17