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AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order
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Authored by • tstellarAMD on Aug 28 2015, 3:32 PM.

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• tstellarAMD retitled this revision from to AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order.

• tstellarAMD updated this object.

LGTM. A comment saying the first ones are in SGPRs might be useful

This revision is now accepted and ready to land.Aug 28 2015, 3:38 PM

This revision was automatically updated to reflect the committed changes.

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AMDGPU/

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bool opCanUseLiteralConstant(unsigned OpType) const;		bool opCanUseLiteralConstant(unsigned OpType) const;

/// \returns True if operands defined with this operand type can accept		/// \returns True if operands defined with this operand type can accept
/// an inline constant. i.e. An integer value in the range (-16, 64) or		/// an inline constant. i.e. An integer value in the range (-16, 64) or
/// -4.0f, -2.0f, -1.0f, -0.5f, 0.0f, 0.5f, 1.0f, 2.0f, 4.0f.		/// -4.0f, -2.0f, -1.0f, -0.5f, 0.0f, 0.5f, 1.0f, 2.0f, 4.0f.
bool opCanUseInlineConstant(unsigned OpType) const;		bool opCanUseInlineConstant(unsigned OpType) const;

enum PreloadedValue {		enum PreloadedValue {
TGID_X,		SCRATCH_PTR = 0,
TGID_Y,		INPUT_PTR = 3,
TGID_Z,		TGID_X = 10,
SCRATCH_WAVE_OFFSET,		TGID_Y = 11,
SCRATCH_PTR,		TGID_Z = 12,
INPUT_PTR,		SCRATCH_WAVE_OFFSET = 14,
TIDIG_X,		FIRST_VGPR_VALUE = 15,
TIDIG_Y,		TIDIG_X = FIRST_VGPR_VALUE,
TIDIG_Z		TIDIG_Y = 16,
		TIDIG_Z = 17,
};		};

/// \brief Returns the physical register that \p Value is stored in.		/// \brief Returns the physical register that \p Value is stored in.
unsigned getPreloadedValue(const MachineFunction &MF,		unsigned getPreloadedValue(const MachineFunction &MF,
enum PreloadedValue Value) const;		enum PreloadedValue Value) const;

/// \brief Give the maximum number of VGPRs that can be used by \p WaveCount		/// \brief Give the maximum number of VGPRs that can be used by \p WaveCount
/// concurrent waves.		/// concurrent waves.
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