[clang][AVR] Implement standard calling convention for AVR and AVRTiny

[benshi001]

Summary

The standard calling convention of AVR is documented at
https://gcc.gnu.org/wiki/avr-gcc#Calling_Convention

clang/lib/Basic/Targets/AVR.h

public:
   }
 
   const char *getClobbers() const override { return ""; }
 
   ArrayRef<const char *> getGCCRegNames() const override {
     static const char *const GCCRegNames[] = {
         "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",  "r8",  "r9",
         "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
-        "r20", "r21", "r22", "r23", "r24", "r25", "X",   "Y",   "Z",   "SP"
-    };
+        "r20", "r21", "r22", "r23", "r24", "r25", "X",   "Y",   "Z",   "SP"};
     return llvm::makeArrayRef(GCCRegNames);
   }
 
   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
     return None;
   }
 
   ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override {
IntType getLeastIntTypeByWidth(unsigned BitWidth, bool IsSigned) const final {
     // AVR uses int for int_least16_t and int_fast16_t.
     return BitWidth == 16
                ? (IsSigned ? SignedInt : UnsignedInt)
                : TargetInfo::getLeastIntTypeByWidth(BitWidth, IsSigned);
   }
 
   bool isValidCPUName(StringRef Name) const override;
   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
-  bool setCPU(const std::string &Name) override {
-    bool isValid = isValidCPUName(Name);
-    if (isValid)
-      CPU = Name;
-    return isValid;
-  }
+  bool setCPU(const std::string &Name) override;
+  StringRef getABI() const override { return ABI; }
 
 protected:
   std::string CPU;
+  StringRef ABI;
 };
 
 } // namespace targets
 } // namespace clang
 
 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_AVR_H

clang/lib/Basic/Targets/AVR.cpp

 
 namespace clang {
 namespace targets {
 
 /// Information about a specific microcontroller.
 struct LLVM_LIBRARY_VISIBILITY MCUInfo {
   const char *Name;
   const char *DefineName;
-  const int NumFlashBanks; // -1 means the device does not support LPM/ELPM.
+  const int NumFlashBanks; // Set to 0 for the devices do not support LPM/ELPM.
+  bool IsTiny; // Set to true for the devices belong to the avrtiny family.
 };
 
 // This list should be kept up-to-date with AVRDevices.td in LLVM.
 static MCUInfo AVRMcus[] = {
     {"at90s1200", "__AVR_AT90S1200__", 0},
     {"attiny11", "__AVR_ATtiny11__", 0},
     {"attiny12", "__AVR_ATtiny12__", 0},
     {"attiny15", "__AVR_ATtiny15__", 0},
static MCUInfo AVRMcus[] = {
     {"atxmega256a3bu", "__AVR_ATxmega256A3BU__", 4},
     {"atxmega256c3", "__AVR_ATxmega256C3__", 4},
     {"atxmega256d3", "__AVR_ATxmega256D3__", 4},
     {"atxmega384c3", "__AVR_ATxmega384C3__", 6},
     {"atxmega384d3", "__AVR_ATxmega384D3__", 6},
     {"atxmega128a1", "__AVR_ATxmega128A1__", 2},
     {"atxmega128a1u", "__AVR_ATxmega128A1U__", 2},
     {"atxmega128a4u", "__AVR_ATxmega128A4U__", 2},
-    {"attiny4", "__AVR_ATtiny4__", 0},
-    {"attiny5", "__AVR_ATtiny5__", 0},
-    {"attiny9", "__AVR_ATtiny9__", 0},
-    {"attiny10", "__AVR_ATtiny10__", 0},
-    {"attiny20", "__AVR_ATtiny20__", 0},
-    {"attiny40", "__AVR_ATtiny40__", 0},
-    {"attiny102", "__AVR_ATtiny102__", 0},
-    {"attiny104", "__AVR_ATtiny104__", 0},
+    {"attiny4", "__AVR_ATtiny4__", 0, true},
+    {"attiny5", "__AVR_ATtiny5__", 0, true},
+    {"attiny9", "__AVR_ATtiny9__", 0, true},
+    {"attiny10", "__AVR_ATtiny10__", 0, true},
+    {"attiny20", "__AVR_ATtiny20__", 0, true},
+    {"attiny40", "__AVR_ATtiny40__", 0, true},
+    {"attiny102", "__AVR_ATtiny102__", 0, true},
+    {"attiny104", "__AVR_ATtiny104__", 0, true},
     {"attiny202", "__AVR_ATtiny202__", 1},
     {"attiny402", "__AVR_ATtiny402__", 1},
     {"attiny204", "__AVR_ATtiny204__", 1},
     {"attiny404", "__AVR_ATtiny404__", 1},
     {"attiny804", "__AVR_ATtiny804__", 1},
     {"attiny1604", "__AVR_ATtiny1604__", 1},
     {"attiny406", "__AVR_ATtiny406__", 1},
     {"attiny806", "__AVR_ATtiny806__", 1},

 }
 
 void AVRTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
   Values.append(std::begin(ValidFamilyNames), std::end(ValidFamilyNames));
   for (const MCUInfo &Info : AVRMcus)
     Values.push_back(Info.Name);
 }
 
+bool AVRTargetInfo::setCPU(const std::string &Name) {
+  // Set the ABI and CPU fields if parameter Name is a family name.
+  if (llvm::is_contained(ValidFamilyNames, Name)) {
+    CPU = Name;
+    ABI = Name == "avrtiny" ? "avrtiny" : "avr";
+    return true;
+  }
+
+  // Set the ABI field if parameter Name is a device name.
+  auto It = llvm::find_if(
+      AVRMcus, [&](const MCUInfo &Info) { return Info.Name == Name; });
+  if (It != std::end(AVRMcus)) {
+    CPU = Name;
+    ABI = It->IsTiny ? "avrtiny" : "avr";
+    return true;
+  }
+
+  // Parameter Name is neither valid family name nor valid device name.
+  return false;
+}
+
 void AVRTargetInfo::getTargetDefines(const LangOptions &Opts,
                                      MacroBuilder &Builder) const {
   Builder.defineMacro("AVR");
   Builder.defineMacro("__AVR");
   Builder.defineMacro("__AVR__");
   Builder.defineMacro("__ELF__");
 
   if (!this->CPU.empty()) {

clang/lib/CodeGen/TargetInfo.cpp

 
 #include "TargetInfo.h"
 #include "ABIInfo.h"
 #include "CGBlocks.h"
 #include "CGCXXABI.h"
 #include "CGValue.h"
 #include "CodeGenFunction.h"
 #include "clang/AST/Attr.h"
 #include "clang/AST/RecordLayout.h"
 #include "clang/Basic/CodeGenOptions.h"
 #include "clang/Basic/DiagnosticFrontend.h"
 #include "clang/Basic/Builtins.h"
 #include "clang/CodeGen/CGFunctionInfo.h"
 #include "clang/CodeGen/SwiftCallingConv.h"
 #include "llvm/ADT/SmallBitVector.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/IntrinsicsNVPTX.h"
 #include "llvm/IR/IntrinsicsS390.h"
 #include "llvm/IR/Type.h"
+#include "llvm/Support/MathExtras.h"
 #include "llvm/Support/raw_ostream.h"
 #include <algorithm> // std::sort
 
 using namespace clang;
 using namespace CodeGen;
 
 // Helper for coercing an aggregate argument or return value into an integer
 // array of the same size (including padding) and alignment.  This alternate

 //===----------------------------------------------------------------------===//
 // AVR ABI Implementation. Documented at
 // https://gcc.gnu.org/wiki/avr-gcc#Calling_Convention
 // https://gcc.gnu.org/wiki/avr-gcc#Reduced_Tiny
 //===----------------------------------------------------------------------===//
 
 namespace {
 class AVRABIInfo : public DefaultABIInfo {
+private:
+  // The total amount of registers can be used to pass parameters. It is 18 on
+  // AVR, or 8 on AVRTiny.
+  unsigned ParamRegs;
+
 public:
-  AVRABIInfo(CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
+  AVRABIInfo(CodeGenTypes &CGT, unsigned N)
+      : DefaultABIInfo(CGT), ParamRegs(N) {}
 
   ABIArgInfo classifyReturnType(QualType Ty) const {
     // A return struct with size less than or equal to 8 bytes is returned
     // directly via registers R18-R25.
     if (isAggregateTypeForABI(Ty) && getContext().getTypeSize(Ty) <= 64)
       return ABIArgInfo::getDirect();
     else
       return DefaultABIInfo::classifyReturnType(Ty);
   }
 
-  // Just copy the original implementation of DefaultABIInfo::computeInfo(),
-  // since DefaultABIInfo::classify{Return,Argument}Type() are not virtual.
+  ABIArgInfo classifyArgumentType(QualType Ty, unsigned &NumRegs) const {
+    unsigned TySize = getContext().getTypeSize(Ty);
+
+    // An int8 type argument always occupies two registers like an int16.
+    if (TySize == 8 && NumRegs >= 2) {
+      NumRegs -= 2;
+      return ABIArgInfo::getExtend(Ty);
+    }
+
+    // If the argument size is an odd number of bytes, round up the size
+    // to the next even number.
+    TySize = llvm::alignTo(TySize, 16);
+
+    // Any type including an array/struct type can be passed in rgisters,
+    // if there are enough registers left.
+    if (TySize <= NumRegs * 8) {
+      NumRegs -= TySize / 8;
+      return ABIArgInfo::getDirect();
+    }
+
+    // An argument is passed either completely in registers or completely in
+    // memory. Since there are not enough registers left, current argument
+    // and all other unprocessed arguments should be passed in memory.
+    NumRegs = 0;
+    return ABIInfo::getNaturalAlignIndirect(Ty);
+  }
+
   void computeInfo(CGFunctionInfo &FI) const override {
+    // Decide the return type.
     if (!getCXXABI().classifyReturnType(FI))
       FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
+    // Decide each argument type.
+    unsigned NumRegs = ParamRegs;
     for (auto &I : FI.arguments())
-      I.info = classifyArgumentType(I.type);
+      if (FI.isVariadic())
+        // Arguments of varargs functions are passed on the stack.
+        // This applies even to the named arguments.
+        I.info = ABIInfo::getNaturalAlignIndirect(I.type);
+      else
+        // Process each argument according to the ABI is avr or avrtiny.
+        // Total 18 registers can be used on avr and 8 ones on avrtiny.
+        I.info = classifyArgumentType(I.type, NumRegs);
   }
 };
 
 class AVRTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
-  AVRTargetCodeGenInfo(CodeGenTypes &CGT)
-      : TargetCodeGenInfo(std::make_unique<AVRABIInfo>(CGT)) {}
+  AVRTargetCodeGenInfo(CodeGenTypes &CGT, unsigned N)
+      : TargetCodeGenInfo(std::make_unique<AVRABIInfo>(CGT, N)) {}
 
   LangAS getGlobalVarAddressSpace(CodeGenModule &CGM,
                                   const VarDecl *D) const override {
     // Check if global/static variable is defined in address space
     // 1~6 (__flash, __flash1, __flash2, __flash3, __flash4, __flash5)
     // but not constant.
     if (D) {
       LangAS AS = D->getType().getAddressSpace();
case llvm::Triple::mipsel:
     if (Triple.getOS() == llvm::Triple::NaCl)
       return SetCGInfo(new PNaClTargetCodeGenInfo(Types));
     return SetCGInfo(new MIPSTargetCodeGenInfo(Types, true));
 
   case llvm::Triple::mips64:
   case llvm::Triple::mips64el:
     return SetCGInfo(new MIPSTargetCodeGenInfo(Types, false));
 
-  case llvm::Triple::avr:
-    return SetCGInfo(new AVRTargetCodeGenInfo(Types));
+  case llvm::Triple::avr: {
+    // R8 ~ R25 are used to pass parameters on avr, while R18 ~ R25
+    // are used on avrtiny.
+    unsigned N = getTarget().getABI() == "avrtiny" ? 8 : 18;
+    return SetCGInfo(new AVRTargetCodeGenInfo(Types, N));
+  }
 
   case llvm::Triple::aarch64:
   case llvm::Triple::aarch64_32:
   case llvm::Triple::aarch64_be: {
     AArch64ABIInfo::ABIKind Kind = AArch64ABIInfo::AAPCS;
     if (getTarget().getABI() == "darwinpcs")
       Kind = AArch64ABIInfo::DarwinPCS;
     else if (Triple.isOSWindows())

clang/test/CodeGen/avr/argument.c

+// RUN: %clang_cc1 -triple avr -target-cpu atmega328 -emit-llvm %s -o - \
+// RUN:     | FileCheck %s --check-prefix AVR
+// RUN: %clang_cc1 -triple avr -target-cpu attiny40 -emit-llvm %s -o - \
+// RUN:     | FileCheck %s --check-prefix TINY
+
+// NOTE: All arguments are passed in memory for functions with variable arguments.
+// AVR:  define {{.*}} i16 @foo_varargs(i16* {{.*}} %0, i16* {{.*}} %1, ...)
+// TINY: define {{.*}} i16 @foo_varargs(i16* {{.*}} %0, i16* {{.*}} %1, ...)
+int foo_varargs(int a, int b, ...) {
+  return a + b;
+}
+
+// NOTE: A 10-byte argument is passed in registers on avr but in memory on avrtiny.
+// AVR:  define {{.*}} i16 @foo0([10 x i8]    {{.*}})
+// TINY: define {{.*}} i16 @foo0(%struct.s10* {{.*}})
+struct s10 {
+  char arr[10];
+};
+int foo0(struct s10 v) {
+  return v.arr[0] + v.arr[1];
+}
+
+// NOTE: The 8-byte argument is always passed in registers. The other arguments are passed
+// NOTE: in registers on avr but in memory on avrtiny.
+// AVR:  define {{.*}} i16 @foo1([8 x i8] {{.*}}, i16  {{.*}}, i32  {{.*}})
+// TINY: define {{.*}} i16 @foo1([8 x i8] {{.*}}, i16* {{.*}}, i32* {{.*}})
+struct s8 {
+  char arr[8];
+};
+int foo1(struct s8 a, int b, long c) {
+  return a.arr[b + c];
+}
+
+// NOTE: All arguments are passed in registers.
+// AVR:  define {{.*}} i32 @foo2(i32 {{.*}}, i16 {{.*}}, i16 {{.*}})
+// TINY: define {{.*}} i32 @foo2(i32 {{.*}}, i16 {{.*}}, i16 {{.*}})
+long foo2(long a, int b, int c) {
+  return a + b + c;
+}
+
+// NOTE: The arguments a&b are passed in registers. The argument c is passed
+// NOTE: in register on avr but in memory on avrtiny.
+// AVR:  define {{.*}} i32 @foo3(i32 {{.*}}, i16 {{.*}}, i32  {{.*}})
+// TINY: define {{.*}} i32 @foo3(i32 {{.*}}, i16 {{.*}}, i32* {{.*}})
+long foo3(long a, int b, long c) {
+  return a + b + c;
+}
+
+// NOTE: An int8 arguments will be extended to i16 if passed in registers.
+// AVR:  define {{.*}} i16 @foo4(i8 {{.*}} signext {{.*}}, i8 {{.*}} zeroext {{.*}})
+// TINY: define {{.*}} i16 @foo4(i8 {{.*}} signext {{.*}}, i8 {{.*}} zeroext {{.*}})
+int foo4(char a, unsigned char b) {
+  return (int)a + (int)b;
+}
+
+// NOTE: On avrtiny, although the first argument only costs 7 registers, the second
+// NOTE: argument (with i8 type) is passed in memory. So there is one register
+// NOTE: that is vacant.
+// TINY: define {{.*}} i16 @foo5([7 x i8] {{.*}}, i8* {{.*}})
+struct s7 {
+  char arr[7];
+};
+int foo5(struct s7 a, char b) {
+  return a.arr[b];
+}
+
+// NOTE: On avr, although the first argument only costs 17 registers, the second
+// NOTE: argument (with i8 type) is passed in memory. So there is one register
+// NOTE: that is vacant.
+// AVR: define {{.*}} i16 @foo6([17 x i8] {{.*}}, i8* {{.*}})
+struct s17 {
+  char arr[17];
+};
+int foo6(struct s17 a, char b) {
+  return a.arr[b];
+}
+
+// NOTE: On avr, all arguments are passed in registers.
+// AVR: define {{.*}} i32 @foo7(i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, i16 {{.*}})
+long foo7(long a, long b, long c, long d, int e) {
+  return a + b + c + d + e;
+}
+
+// NOTE: On avr, the arguments a&b&c&d are passed in registers, but e is
+// NOTE: passed in memory. Actually 16 registers are used, while 2 ones
+// NOTE: are vacant.
+// AVR: define {{.*}} i32 @foo8(i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, i32 {{.*}}, i32* {{.*}})
+long foo8(long a, long b, long c, long d, long e) {
+  return a + b + c + d + e;
+}