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Differential D119936

[VE] Enable v256 fcmp true|false tests
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Authored by simoll on Feb 16 2022, 5:37 AM.

Details

Reviewers
kaz7
Commits
rGf27423027dc7: [VE] Enable v256 fcmp true|false tests
Summary

The broadcast patterns for all-true|false masks are available now. Enable the true|fast fcmp predicate tests that use them.

Diff Detail

Event Timeline

simoll requested review of this revision.Feb 16 2022, 5:37 AM
simoll created this revision.
Herald added a project: Restricted Project. · View Herald TranscriptFeb 16 2022, 5:37 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
Harbormaster completed remote builds in B149942: Diff 409219.Feb 16 2022, 6:03 AM
kaz7 accepted this revision.Feb 18 2022, 3:56 AM

LGTM. Thank you for updating regression tests.

This revision is now accepted and ready to land.Feb 18 2022, 3:56 AM
This revision was landed with ongoing or failed builds.Feb 18 2022, 4:27 AM
Closed by commit rGf27423027dc7: [VE] Enable v256 fcmp true|false tests (authored by simoll). · Explain Why
This revision was automatically updated to reflect the committed changes.
simoll added a commit: rGf27423027dc7: [VE] Enable v256 fcmp true|false tests.

Revision Contents

PathSize
llvm/
test/
CodeGen/
VE/
Vector/
110 lines

Diff 409898

llvm/test/CodeGen/VE/Vector/vec_fcmp.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s ; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
; <256 x float> ; <256 x float>
;; TODO v256i1 zero-mask isel ; Function Attrs: nounwind
;; ; Function Attrs: nounwind define fastcc <256 x i1> @fcmp_false_vv_v256f32(<256 x float> %x, <256 x float> %y) {
;; define fastcc <256 x i1> @fcmp_false_vv_v256f32(<256 x float> %x, <256 x float> %y) { ; CHECK-LABEL: fcmp_false_vv_v256f32:
;; %z = fcmp false <256 x float> %x, %y ; CHECK: # %bb.0:
;; ret <256 x i1> %z ; CHECK-NEXT: xorm %vm1, %vm0, %vm0
;; } ; CHECK-NEXT: b.l.t (, %s10)
;; %z = fcmp false <256 x float> %x, %y
;; ; Function Attrs: nounwind ret <256 x i1> %z
;; define fastcc <256 x i1> @fcmp_false_sv_v256f32(float %x, <256 x float> %y) { }
;; %xins = insertelement <256 x float> undef, float %x, i32 0
;; %vx = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer ; Function Attrs: nounwind
;; %z = fcmp false <256 x float> %vx, %y define fastcc <256 x i1> @fcmp_false_sv_v256f32(float %x, <256 x float> %y) {
;; ret <256 x i1> %z ; CHECK-LABEL: fcmp_false_sv_v256f32:
;; } ; CHECK: # %bb.0:
;; ; CHECK-NEXT: xorm %vm1, %vm0, %vm0
;; ; Function Attrs: nounwind ; CHECK-NEXT: b.l.t (, %s10)
;; define fastcc <256 x i1> @fcmp_false_vs_v256f32(<256 x float> %x, float %y) { %xins = insertelement <256 x float> undef, float %x, i32 0
;; %yins = insertelement <256 x float> undef, float %y, i32 0 %vx = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer
;; %vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer %z = fcmp false <256 x float> %vx, %y
;; %z = fcmp false <256 x float> %x, %vy ret <256 x i1> %z
;; ret <256 x i1> %z }
;; }
; Function Attrs: nounwind
define fastcc <256 x i1> @fcmp_false_vs_v256f32(<256 x float> %x, float %y) {
; CHECK-LABEL: fcmp_false_vs_v256f32:
; CHECK: # %bb.0:
; CHECK-NEXT: xorm %vm1, %vm0, %vm0
; CHECK-NEXT: b.l.t (, %s10)
%yins = insertelement <256 x float> undef, float %y, i32 0
%vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer
%z = fcmp false <256 x float> %x, %vy
ret <256 x i1> %z
}
; Function Attrs: nounwind ; Function Attrs: nounwind
define fastcc <256 x i1> @fcmp_oeq_vv_v256f32(<256 x float> %x, <256 x float> %y) { define fastcc <256 x i1> @fcmp_oeq_vv_v256f32(<256 x float> %x, <256 x float> %y) {
; CHECK-LABEL: fcmp_oeq_vv_v256f32: ; CHECK-LABEL: fcmp_oeq_vv_v256f32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: lea %s0, 256 ; CHECK-NEXT: lea %s0, 256
; CHECK-NEXT: lvl %s0 ; CHECK-NEXT: lvl %s0
; CHECK-NEXT: vfcmp.s %v0, %v0, %v1 ; CHECK-NEXT: vfcmp.s %v0, %v0, %v1
▲ Show 20 Lines • Show All 615 Lines • ▼ Show 20 Lines
; CHECK-NEXT: vfmk.s.nenan %vm1, %v0 ; CHECK-NEXT: vfmk.s.nenan %vm1, %v0
; CHECK-NEXT: b.l.t (, %s10) ; CHECK-NEXT: b.l.t (, %s10)
%yins = insertelement <256 x float> undef, float %y, i32 0 %yins = insertelement <256 x float> undef, float %y, i32 0
%vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer %vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer
%z = fcmp une <256 x float> %x, %vy %z = fcmp une <256 x float> %x, %vy
ret <256 x i1> %z ret <256 x i1> %z
} }
;; TODO v256i1 all-one mask isel. ; Function Attrs: nounwind
;; ; Function Attrs: nounwind define fastcc <256 x i1> @fcmp_true_vv_v256f32(<256 x float> %x, <256 x float> %y) {
;; define fastcc <256 x i1> @fcmp_true_vv_v256f32(<256 x float> %x, <256 x float> %y) { ; CHECK-LABEL: fcmp_true_vv_v256f32:
;; %z = fcmp true <256 x float> %x, %y ; CHECK: # %bb.0:
;; ret <256 x i1> %z ; CHECK-NEXT: andm %vm1, %vm0, %vm0
;; } ; CHECK-NEXT: b.l.t (, %s10)
;; %z = fcmp true <256 x float> %x, %y
;; ; Function Attrs: nounwind ret <256 x i1> %z
;; define fastcc <256 x i1> @fcmp_true_sv_v256f32(float %x, <256 x float> %y) { }
;; %xins = insertelement <256 x float> undef, float %x, i32 0
;; %vx = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer ; Function Attrs: nounwind
;; %z = fcmp true <256 x float> %vx, %y define fastcc <256 x i1> @fcmp_true_sv_v256f32(float %x, <256 x float> %y) {
;; ret <256 x i1> %z ; CHECK-LABEL: fcmp_true_sv_v256f32:
;; } ; CHECK: # %bb.0:
;; ; CHECK-NEXT: andm %vm1, %vm0, %vm0
;; ; Function Attrs: nounwind ; CHECK-NEXT: b.l.t (, %s10)
;; define fastcc <256 x i1> @fcmp_true_vs_v256f32(<256 x float> %x, float %y) { %xins = insertelement <256 x float> undef, float %x, i32 0
;; %yins = insertelement <256 x float> undef, float %y, i32 0 %vx = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer
;; %vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer %z = fcmp true <256 x float> %vx, %y
;; %z = fcmp true <256 x float> %x, %vy ret <256 x i1> %z
;; ret <256 x i1> %z }
;; }
; Function Attrs: nounwind
define fastcc <256 x i1> @fcmp_true_vs_v256f32(<256 x float> %x, float %y) {
; CHECK-LABEL: fcmp_true_vs_v256f32:
; CHECK: # %bb.0:
; CHECK-NEXT: andm %vm1, %vm0, %vm0
; CHECK-NEXT: b.l.t (, %s10)
%yins = insertelement <256 x float> undef, float %y, i32 0
%vy = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer
%z = fcmp true <256 x float> %x, %vy
ret <256 x i1> %z
}