[sanitizers] Avoid macro clash in SignalContext::WriteFlag (NFC)

[nikic]

Summary

D116208 may cause a macro clash on older versions of linux, where fs.h defines a READ macro. I'm resolving this by switching to a more typical casing style for non-macro symbols. If preferred, I can prefix them instead.

[vitalybuka]

compiler-rt/lib/sanitizer_common/sanitizer_common.h

959

I guess we use WRITE_FLAG_UNKNOWN style for C-enums.
However proposed names seems consistent with "enum class".

compiler-rt/lib/asan/asan_errors.h

if (signal.IsStackOverflow()) {
       scariness.Scare(10, "stack-overflow");
     } else if (!signal.is_memory_access) {
       scariness.Scare(10, "signal");
     } else if (signal.is_true_faulting_addr &&
                signal.addr < GetPageSizeCached()) {
       scariness.Scare(10, "null-deref");
     } else if (signal.addr == signal.pc) {
       scariness.Scare(60, "wild-jump");
-    } else if (signal.write_flag == SignalContext::WRITE) {
+    } else if (signal.write_flag == SignalContext::Write) {
       scariness.Scare(30, "wild-addr-write");
-    } else if (signal.write_flag == SignalContext::READ) {
+    } else if (signal.write_flag == SignalContext::Read) {
       scariness.Scare(20, "wild-addr-read");
     } else {
       scariness.Scare(25, "wild-addr");
     }
   }
   void Print();
 };
 

compiler-rt/lib/sanitizer_common/sanitizer_common.h

 struct SignalContext {
   void *siginfo;
   void *context;
   uptr addr;
   uptr pc;
   uptr sp;
   uptr bp;
   bool is_memory_access;
-  enum WriteFlag { UNKNOWN, READ, WRITE } write_flag;
+  enum WriteFlag { Unknown, Read, Write } write_flag;
 
   // In some cases the kernel cannot provide the true faulting address; `addr`
   // will be zero then.  This field allows to distinguish between these cases
   // and dereferences of null.
   bool is_true_faulting_addr;
 
   // VS2013 doesn't implement unrestricted unions, so we need a trivial default
   // constructor

compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp

 #elif SANITIZER_NETBSD
   uptr err = ucontext->uc_mcontext.__gregs[_REG_ERR];
 #elif SANITIZER_SOLARIS && defined(__i386__)
   const int Err = 13;
   uptr err = ucontext->uc_mcontext.gregs[Err];
 #else
   uptr err = ucontext->uc_mcontext.gregs[REG_ERR];
 #endif // SANITIZER_FREEBSD
-  return err & PF_WRITE ? WRITE : READ;
+  return err & PF_WRITE ? Write : Read;
 #elif defined(__mips__)
   uint32_t *exception_source;
   uint32_t faulty_instruction;
   uint32_t op_code;
 
   exception_source = (uint32_t *)ucontext->uc_mcontext.pc;
   faulty_instruction = (uint32_t)(*exception_source);
 
   op_code = (faulty_instruction >> 26) & 0x3f;
 
   // FIXME: Add support for FPU, microMIPS, DSP, MSA memory instructions.
   switch (op_code) {
     case 0x28:  // sb
     case 0x29:  // sh
     case 0x2b:  // sw
     case 0x3f:  // sd
 #if __mips_isa_rev < 6
     case 0x2c:  // sdl
     case 0x2d:  // sdr
     case 0x2a:  // swl
     case 0x2e:  // swr
 #endif
       return SignalContext::WRITE;
 
     case 0x20:  // lb
     case 0x24:  // lbu
     case 0x21:  // lh
     case 0x25:  // lhu
     case 0x23:  // lw
     case 0x27:  // lwu
     case 0x37:  // ld
 #if __mips_isa_rev < 6
     case 0x1a:  // ldl
     case 0x1b:  // ldr
     case 0x22:  // lwl
     case 0x26:  // lwr
 #endif
       return SignalContext::READ;
 #if __mips_isa_rev == 6
     case 0x3b:  // pcrel
       op_code = (faulty_instruction >> 19) & 0x3;
       switch (op_code) {
         case 0x1:  // lwpc
         case 0x2:  // lwupc
           return SignalContext::READ;
       }
 #endif
   }
   return SignalContext::UNKNOWN;
 #elif defined(__arm__)
   static const uptr FSR_WRITE = 1U << 11;
   uptr fsr = ucontext->uc_mcontext.error_code;
   return fsr & FSR_WRITE ? WRITE : READ;
 #elif defined(__aarch64__)
   static const u64 ESR_ELx_WNR = 1U << 6;
   u64 esr;
   if (!Aarch64GetESR(ucontext, &esr)) return UNKNOWN;
   return esr & ESR_ELx_WNR ? WRITE : READ;
 #elif defined(__sparc__)
   // Decode the instruction to determine the access type.
   // From OpenSolaris $SRC/uts/sun4/os/trap.c (get_accesstype).
 #if SANITIZER_SOLARIS
   uptr pc = ucontext->uc_mcontext.gregs[REG_PC];
 #else
   // Historical BSDism here.
   struct sigcontext *scontext = (struct sigcontext *)context;
 #if defined(__arch64__)
   uptr pc = scontext->sigc_regs.tpc;
 #else
   uptr pc = scontext->si_regs.pc;
 #endif
 #endif
   u32 instr = *(u32 *)pc;
   return (instr >> 21) & 1 ? WRITE: READ;
 #elif defined(__riscv)
 #if SANITIZER_FREEBSD
   unsigned long pc = ucontext->uc_mcontext.mc_gpregs.gp_sepc;
 #else
   unsigned long pc = ucontext->uc_mcontext.__gregs[REG_PC];
 #endif
   unsigned faulty_instruction = *(uint16_t *)pc;
 
 #if defined(__riscv_compressed)
   if ((faulty_instruction & 0x3) != 0x3) {  // it's a compressed instruction
     // set op_bits to the instruction bits [1, 0, 15, 14, 13]
     unsigned op_bits =
         ((faulty_instruction & 0x3) << 3) | (faulty_instruction >> 13);
     unsigned rd = faulty_instruction & 0xF80;  // bits 7-11, inclusive
     switch (op_bits) {
       case 0b10'010:  // c.lwsp (rd != x0)
 #if __riscv_xlen == 64
       case 0b10'011:  // c.ldsp (rd != x0)
 #endif
         return rd ? SignalContext::READ : SignalContext::UNKNOWN;
       case 0b00'010:  // c.lw
 #if __riscv_flen >= 32 && __riscv_xlen == 32
       case 0b10'011:  // c.flwsp
 #endif
 #if __riscv_flen >= 32 || __riscv_xlen == 64
       case 0b00'011:  // c.flw / c.ld
 #endif
 #if __riscv_flen == 64
       case 0b00'001:  // c.fld
       case 0b10'001:  // c.fldsp
 #endif
         return SignalContext::READ;
       case 0b00'110:  // c.sw
       case 0b10'110:  // c.swsp
 #if __riscv_flen >= 32 || __riscv_xlen == 64
       case 0b00'111:  // c.fsw / c.sd
       case 0b10'111:  // c.fswsp / c.sdsp
 #endif
 #if __riscv_flen == 64
       case 0b00'101:  // c.fsd
       case 0b10'101:  // c.fsdsp
 #endif
         return SignalContext::WRITE;
       default:
         return SignalContext::UNKNOWN;
     }
   }
 #endif
 
   unsigned opcode = faulty_instruction & 0x7f;         // lower 7 bits
   unsigned funct3 = (faulty_instruction >> 12) & 0x7;  // bits 12-14, inclusive
   switch (opcode) {
     case 0b0000011:  // loads
       switch (funct3) {
         case 0b000:  // lb
         case 0b001:  // lh
         case 0b010:  // lw
 #if __riscv_xlen == 64
         case 0b011:  // ld
 #endif
         case 0b100:  // lbu
         case 0b101:  // lhu
           return SignalContext::READ;
         default:
           return SignalContext::UNKNOWN;
       }
     case 0b0100011:  // stores
       switch (funct3) {
         case 0b000:  // sb
         case 0b001:  // sh
         case 0b010:  // sw
 #if __riscv_xlen == 64
         case 0b011:  // sd
 #endif
           return SignalContext::WRITE;
         default:
           return SignalContext::UNKNOWN;
       }
 #if __riscv_flen >= 32
     case 0b0000111:  // floating-point loads
       switch (funct3) {
         case 0b010:  // flw
 #if __riscv_flen == 64
         case 0b011:  // fld
 #endif
           return SignalContext::READ;
         default:
           return SignalContext::UNKNOWN;
       }
     case 0b0100111:  // floating-point stores
       switch (funct3) {
         case 0b010:  // fsw
 #if __riscv_flen == 64
         case 0b011:  // fsd
 #endif
           return SignalContext::WRITE;
         default:
           return SignalContext::UNKNOWN;
       }
 #endif
     default:
       return SignalContext::UNKNOWN;
   }
 #else
   (void)ucontext;
   return UNKNOWN;  // FIXME: Implement.
 #endif
 }
 
 bool SignalContext::IsTrueFaultingAddress() const {
   auto si = static_cast<const siginfo_t *>(siginfo);
   // SIGSEGV signals without a true fault address have si_code set to 128.
   return si->si_signo == SIGSEGV && si->si_code != 128;
 }
 

compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp

else
     Report("ERROR: %s: %s on unknown address %p (pc %p bp %p sp %p T%d)\n",
            SanitizerToolName, description, (void *)sig.addr, (void *)sig.pc,
            (void *)sig.bp, (void *)sig.sp, tid);
   Printf("%s", d.Default());
   if (sig.pc < GetPageSizeCached())
     Report("Hint: pc points to the zero page.\n");
   if (sig.is_memory_access) {
     const char *access_type =
-        sig.write_flag == SignalContext::WRITE
+        sig.write_flag == SignalContext::Write
             ? "WRITE"
-            : (sig.write_flag == SignalContext::READ ? "READ" : "UNKNOWN");
+            : (sig.write_flag == SignalContext::Read ? "READ" : "UNKNOWN");
     Report("The signal is caused by a %s memory access.\n", access_type);
     if (!sig.is_true_faulting_addr)
       Report("Hint: this fault was caused by a dereference of a high value "
              "address (see register values below).  Disassemble the provided "
              "pc to learn which register was used.\n");
     else if (sig.addr < GetPageSizeCached())
       Report("Hint: address points to the zero page.\n");
   }