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Differential D11748

Fix FBLD and FBSTP
ClosedPublic

Authored by myatsina on Aug 4 2015, 12:51 AM.

Details

Reviewers
ab
spyffe
Commits
rGbce1ab67a54d: [X86] Fix FBLD and FBSTP
rL245553: [X86] Fix FBLD and FBSTP
Summary

FBLD and FBSTP should receive TBYTE because it is defined as
FBLD m80
FBSTP m80

Diff Detail

Repository
rL LLVM

Event Timeline

myatsina updated this revision to Diff 31298.Aug 4 2015, 12:51 AM
myatsina retitled this revision from to Fix FBLD and FBSTP.
myatsina updated this object.
myatsina added a reviewer: spyffe.
myatsina set the repository for this revision to rL LLVM.
myatsina added a subscriber: llvm-commits.
mkuper added a subscriber: mkuper.Aug 4 2015, 1:13 AM
mkuper added inline comments.
test/MC/X86/intel-syntax.s
689

Can you add a newline, please?

myatsina updated this revision to Diff 31323.Aug 4 2015, 6:25 AM
myatsina updated this object.
myatsina marked an inline comment as done.Aug 19 2015, 1:01 AM

ping

ab accepted this revision.Aug 19 2015, 10:17 AM
ab added a reviewer: ab.
ab added a subscriber: ab.

LGTM

This revision is now accepted and ready to land.Aug 19 2015, 10:17 AM
Closed by commit rL245553: [X86] Fix FBLD and FBSTP (authored by myatsina). · Explain WhyAug 20 2015, 4:52 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
X86/
X86InstrFPStack.td
X86InstrFPStack.td (revision 243641)
4 lines
test/
MC/
X86/
intel-syntax.s
intel-syntax.s (revision 243641)
5 lines

Diff 31323

lib/Target/X86/X86InstrFPStack.td

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def FRSTORm : FPI<0xDD, MRM4m, (outs f32mem:$dst), (ins), "frstor\t$dst">; def FRSTORm : FPI<0xDD, MRM4m, (outs f32mem:$dst), (ins), "frstor\t$dst">;
def FSAVEm : FPI<0xDD, MRM6m, (outs f32mem:$dst), (ins), "fnsave\t$dst">; def FSAVEm : FPI<0xDD, MRM6m, (outs f32mem:$dst), (ins), "fnsave\t$dst">;
def FNSTSWm : FPI<0xDD, MRM7m, (outs f32mem:$dst), (ins), "fnstsw\t$dst">; def FNSTSWm : FPI<0xDD, MRM7m, (outs f32mem:$dst), (ins), "fnstsw\t$dst">;
def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">; def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">;
def FICOMP16m: FPI<0xDE, MRM3m, (outs), (ins i16mem:$src), "ficomp{s}\t$src">; def FICOMP16m: FPI<0xDE, MRM3m, (outs), (ins i16mem:$src), "ficomp{s}\t$src">;
def FBLDm : FPI<0xDF, MRM4m, (outs), (ins f32mem:$src), "fbld\t$src">; def FBLDm : FPI<0xDF, MRM4m, (outs), (ins f80mem:$src), "fbld\t$src">;
def FBSTPm : FPI<0xDF, MRM6m, (outs f32mem:$dst), (ins), "fbstp\t$dst">; def FBSTPm : FPI<0xDF, MRM6m, (outs f80mem:$dst), (ins), "fbstp\t$dst">;
// Floating point cmovs. // Floating point cmovs.
class FpIf32CMov<dag outs, dag ins, FPFormat fp, list<dag> pattern> : class FpIf32CMov<dag outs, dag ins, FPFormat fp, list<dag> pattern> :
FpI_<outs, ins, fp, pattern>, Requires<[FPStackf32, HasCMov]>; FpI_<outs, ins, fp, pattern>, Requires<[FPStackf32, HasCMov]>;
class FpIf64CMov<dag outs, dag ins, FPFormat fp, list<dag> pattern> : class FpIf64CMov<dag outs, dag ins, FPFormat fp, list<dag> pattern> :
FpI_<outs, ins, fp, pattern>, Requires<[FPStackf64, HasCMov]>; FpI_<outs, ins, fp, pattern>, Requires<[FPStackf64, HasCMov]>;
multiclass FPCMov<PatLeaf cc> { multiclass FPCMov<PatLeaf cc> {
▲ Show 20 Lines • Show All 374 Lines • Show Last 20 Lines

test/MC/X86/intel-syntax.s

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// CHECK: insl %dx, %es:(%rdi) // CHECK: insl %dx, %es:(%rdi)
outsb outsb
outsw outsw
outsd outsd
// CHECK: outsb (%rsi), %dx // CHECK: outsb (%rsi), %dx
// CHECK: outsw (%rsi), %dx // CHECK: outsw (%rsi), %dx
// CHECK: outsl (%rsi), %dx // CHECK: outsl (%rsi), %dx
fbld tbyte ptr [eax]
fbstp tbyte ptr [eax]
// CHECK: fbld (%eax)
// CHECK: fbstp (%eax)
mkuperUnsubmitted
Done
ReplyInline Actions

Can you add a newline, please?

mkuper: Can you add a newline, please?