WebAssembly: handle more than int32 argument/return

[jfb]

Summary

Also test 64-bit integers, except shifts for now which are broken because isel dislikes the 32-bit truncate that precedes them.

[sunfish]

test/CodeGen/WebAssembly/integer64.ll

113 ↗

(On Diff #31179)

The solution here is to implement getScalarShiftAmountTy for WebAssembly.

[jfb]

• Mention getScalarShiftAmountTy.

llvm/trunk/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp

if (NumDefs != 0) {
     unsigned Reg = MO.getReg();
     OS << "(setlocal @" << TargetRegisterInfo::virtReg2Index(Reg) << ' ';
   }
 
   OS << '(';
 
   bool PrintOperands = true;
   switch (MI->getOpcode()) {
-  case WebAssembly::ARGUMENT:
+  case WebAssembly::ARGUMENT_Int32:
+  case WebAssembly::ARGUMENT_Int64:
+  case WebAssembly::ARGUMENT_Float32:
+  case WebAssembly::ARGUMENT_Float64:
     OS << "argument " << MI->getOperand(1).getImm();
     PrintOperands = false;
     break;
+  case WebAssembly::RETURN_Int32:
+  case WebAssembly::RETURN_Int64:
+  case WebAssembly::RETURN_Float32:
+  case WebAssembly::RETURN_Float64:
+  case WebAssembly::RETURN_VOID:
+    // FIXME This is here only so "return" prints nicely, instead of printing
+    //       the isel name. Other operations have the same problem, fix this in
+    //       a generic way instead.
+    OS << "return";
+    break;
   default:
     OS << TII->getName(MI->getOpcode());
     break;
   }
 
   if (PrintOperands)
     for (const MachineOperand &MO : MI->uses()) {
       if (MO.isReg() && MO.isImplicit())

llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

for (const ISD::InputArg &In : Ins) {
     if (In.Flags.isReturned())
       fail(DL, DAG, "WebAssembly hasn't implemented returned arguments");
     if (In.Flags.isInConsecutiveRegs())
       fail(DL, DAG, "WebAssembly hasn't implemented cons regs arguments");
     if (In.Flags.isInConsecutiveRegsLast())
       fail(DL, DAG, "WebAssembly hasn't implemented cons regs last arguments");
     if (In.Flags.isSplit())
       fail(DL, DAG, "WebAssembly hasn't implemented split arguments");
-    if (In.VT != MVT::i32)
-      fail(DL, DAG, "WebAssembly hasn't implemented non-i32 arguments");
     // FIXME Do something with In.getOrigAlign()?
     InVals.push_back(
         In.Used
             ? DAG.getNode(WebAssemblyISD::ARGUMENT, DL, In.VT,
                           DAG.getTargetConstant(ArgNo, DL, MVT::i32))
             : DAG.getNode(ISD::UNDEF, DL, In.VT));
     ++ArgNo;
   }

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrControl.td

  * do_while: do while statement, basically a loop with a conditional branch
  * forever: infinite loop statement (like while (1)), basically an unconditional
  *          branch (back to the top of the loop)
  * continue: continue to start of nested loop
  * break: break to end from nested loop or block
  * switch: switch statement with fallthrough
  */
 
+multiclass RETURN<WebAssemblyRegClass vt> {
+  def RETURN_#vt : I<(outs), (ins vt:$val), [(WebAssemblyreturn vt:$val)]>;
+}
 let hasSideEffects = 1, isReturn = 1, isTerminator = 1, hasCtrlDep = 1,
     isBarrier = 1 in {
-//FIXME return more than just int32.
-def RETURN : I<(outs), (ins Int32:$val), [(WebAssemblyreturn Int32:$val)]>;
+  defm : RETURN<Int32>;
+  defm : RETURN<Int64>;
+  defm : RETURN<Float32>;
+  defm : RETURN<Float64>;
   def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)]>;
 } // hasSideEffects = 1, isReturn = 1, isTerminator = 1, hasCtrlDep = 1,
   // isBarrier = 1

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td

 */
 
 //===----------------------------------------------------------------------===//
 // WebAssembly Instruction Format Definitions.
 //===----------------------------------------------------------------------===//
 
 include "WebAssemblyInstrFormats.td"
 
-def ARGUMENT : I<(outs Int32:$res), (ins i32imm:$argno),
-                 [(set Int32:$res, (WebAssemblyargument timm:$argno))]>;
+multiclass ARGUMENT<WebAssemblyRegClass vt> {
+  def ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno),
+                       [(set vt:$res, (WebAssemblyargument timm:$argno))]>;
+}
+defm : ARGUMENT<Int32>;
+defm : ARGUMENT<Int64>;
+defm : ARGUMENT<Float32>;
+defm : ARGUMENT<Float64>;
 
 //===----------------------------------------------------------------------===//
 // Additional sets of instructions.
 //===----------------------------------------------------------------------===//
 
 include "WebAssemblyInstrMemory.td"
 include "WebAssemblyInstrCall.td"
 include "WebAssemblyInstrControl.td"
 include "WebAssemblyInstrInteger.td"
 include "WebAssemblyInstrFloat.td"
 include "WebAssemblyInstrConv.td"
 include "WebAssemblyInstrAtomics.td"
 include "WebAssemblyInstrSIMD.td"

llvm/trunk/test/CodeGen/WebAssembly/integer.ll

-; RUN: llc < %s -asm-verbose=false | FileCheck %s
-
-target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
-target triple = "wasm32-unknown-unknown"
-
-declare i32 @llvm.ctlz.i32(i32, i1)
-declare i32 @llvm.cttz.i32(i32, i1)
-declare i32 @llvm.ctpop.i32(i32)
-
-; CHECK-LABEL: add32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (ADD_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @add32(i32 %x, i32 %y) {
-  %a = add i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: sub32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (SUB_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @sub32(i32 %x, i32 %y) {
-  %a = sub i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: mul32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (MUL_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @mul32(i32 %x, i32 %y) {
-  %a = mul i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: sdiv32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (SDIV_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @sdiv32(i32 %x, i32 %y) {
-  %a = sdiv i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: udiv32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (UDIV_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @udiv32(i32 %x, i32 %y) {
-  %a = udiv i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: srem32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (SREM_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @srem32(i32 %x, i32 %y) {
-  %a = srem i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: urem32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (UREM_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @urem32(i32 %x, i32 %y) {
-  %a = urem i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: and32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (AND_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @and32(i32 %x, i32 %y) {
-  %a = and i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: ior32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (IOR_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @ior32(i32 %x, i32 %y) {
-  %a = or i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: xor32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (XOR_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @xor32(i32 %x, i32 %y) {
-  %a = xor i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: shl32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (SHL_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @shl32(i32 %x, i32 %y) {
-  %a = shl i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: shr32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (SHR_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @shr32(i32 %x, i32 %y) {
-  %a = lshr i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: sar32:
-; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (setlocal @1 (argument 0))
-; CHECK-NEXT: (setlocal @2 (SAR_I32 @1 @0))
-; CHECK-NEXT: (RETURN @2)
-define i32 @sar32(i32 %x, i32 %y) {
-  %a = ashr i32 %x, %y
-  ret i32 %a
-}
-
-; CHECK-LABEL: clz32:
-; CHECK-NEXT: (setlocal @0 (argument 0))
-; CHECK-NEXT: (setlocal @1 (CLZ_I32 @0))
-; CHECK-NEXT: (RETURN @1)
-define i32 @clz32(i32 %x) {
-  %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
-  ret i32 %a
-}
-
-; CHECK-LABEL: ctz32:
-; CHECK-NEXT: (setlocal @0 (argument 0))
-; CHECK-NEXT: (setlocal @1 (CTZ_I32 @0))
-; CHECK-NEXT: (RETURN @1)
-define i32 @ctz32(i32 %x) {
-  %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
-  ret i32 %a
-}
-
-; CHECK-LABEL: popcnt32:
-; CHECK-NEXT: (setlocal @0 (argument 0))
-; CHECK-NEXT: (setlocal @1 (POPCNT_I32 @0))
-; CHECK-NEXT: (RETURN @1)
-define i32 @popcnt32(i32 %x) {
-  %a = call i32 @llvm.ctpop.i32(i32 %x)
-  ret i32 %a
-}

llvm/trunk/test/CodeGen/WebAssembly/integer32.ll

+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 32-bit integer operations assemble as expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+declare i32 @llvm.ctlz.i32(i32, i1)
+declare i32 @llvm.cttz.i32(i32, i1)
+declare i32 @llvm.ctpop.i32(i32)
+
+; CHECK-LABEL: add32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (ADD_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @add32(i32 %x, i32 %y) {
+  %a = add i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: sub32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SUB_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @sub32(i32 %x, i32 %y) {
+  %a = sub i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: mul32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (MUL_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @mul32(i32 %x, i32 %y) {
+  %a = mul i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: sdiv32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SDIV_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @sdiv32(i32 %x, i32 %y) {
+  %a = sdiv i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: udiv32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (UDIV_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @udiv32(i32 %x, i32 %y) {
+  %a = udiv i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: srem32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SREM_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @srem32(i32 %x, i32 %y) {
+  %a = srem i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: urem32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (UREM_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @urem32(i32 %x, i32 %y) {
+  %a = urem i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: and32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (AND_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @and32(i32 %x, i32 %y) {
+  %a = and i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: ior32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (IOR_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @ior32(i32 %x, i32 %y) {
+  %a = or i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: xor32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (XOR_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @xor32(i32 %x, i32 %y) {
+  %a = xor i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: shl32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SHL_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @shl32(i32 %x, i32 %y) {
+  %a = shl i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: shr32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SHR_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @shr32(i32 %x, i32 %y) {
+  %a = lshr i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: sar32:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SAR_I32 @1 @0))
+; CHECK-NEXT: (return @2)
+define i32 @sar32(i32 %x, i32 %y) {
+  %a = ashr i32 %x, %y
+  ret i32 %a
+}
+
+; CHECK-LABEL: clz32:
+; CHECK-NEXT: (setlocal @0 (argument 0))
+; CHECK-NEXT: (setlocal @1 (CLZ_I32 @0))
+; CHECK-NEXT: (return @1)
+define i32 @clz32(i32 %x) {
+  %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
+  ret i32 %a
+}
+
+; CHECK-LABEL: ctz32:
+; CHECK-NEXT: (setlocal @0 (argument 0))
+; CHECK-NEXT: (setlocal @1 (CTZ_I32 @0))
+; CHECK-NEXT: (return @1)
+define i32 @ctz32(i32 %x) {
+  %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
+  ret i32 %a
+}
+
+; CHECK-LABEL: popcnt32:
+; CHECK-NEXT: (setlocal @0 (argument 0))
+; CHECK-NEXT: (setlocal @1 (POPCNT_I32 @0))
+; CHECK-NEXT: (return @1)
+define i32 @popcnt32(i32 %x) {
+  %a = call i32 @llvm.ctpop.i32(i32 %x)
+  ret i32 %a
+}

llvm/trunk/test/CodeGen/WebAssembly/integer64.ll

+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+
+; Test that basic 64-bit integer operations assemble as expected.
+
+target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+declare i64 @llvm.ctlz.i64(i64, i1)
+declare i64 @llvm.cttz.i64(i64, i1)
+declare i64 @llvm.ctpop.i64(i64)
+
+; CHECK-LABEL: add64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (ADD_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @add64(i64 %x, i64 %y) {
+  %a = add i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: sub64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SUB_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @sub64(i64 %x, i64 %y) {
+  %a = sub i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: mul64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (MUL_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @mul64(i64 %x, i64 %y) {
+  %a = mul i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: sdiv64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SDIV_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @sdiv64(i64 %x, i64 %y) {
+  %a = sdiv i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: udiv64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (UDIV_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @udiv64(i64 %x, i64 %y) {
+  %a = udiv i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: srem64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (SREM_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @srem64(i64 %x, i64 %y) {
+  %a = srem i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: urem64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (UREM_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @urem64(i64 %x, i64 %y) {
+  %a = urem i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: and64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (AND_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @and64(i64 %x, i64 %y) {
+  %a = and i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: ior64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (IOR_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @ior64(i64 %x, i64 %y) {
+  %a = or i64 %x, %y
+  ret i64 %a
+}
+
+; CHECK-LABEL: xor64:
+; CHECK-NEXT: (setlocal @0 (argument 1))
+; CHECK-NEXT: (setlocal @1 (argument 0))
+; CHECK-NEXT: (setlocal @2 (XOR_I64 @1 @0))
+; CHECK-NEXT: (return @2)
+define i64 @xor64(i64 %x, i64 %y) {
+  %a = xor i64 %x, %y
+  ret i64 %a
+}
+
+; FIXME: 64-bit shifts have an extra truncate of the input shift value, which
+;        WebAssembly hasn't taught isel to match yet. Fix with
+;        getScalarShiftAmountTy.
+
+; C;HECK-LABEL: shl64:
+; C;HECK-NEXT: (setlocal @0 (argument 1))
+; C;HECK-NEXT: (setlocal @1 (argument 0))
+; C;HECK-NEXT: (setlocal @2 (SHL_I64 @1 @0))
+; C;HECK-NEXT: (return @2)
+;define i64 @shl64(i64 %x, i64 %y) {
+;  %a = shl i64 %x, %y
+;  ret i64 %a
+;}
+
+; C;HECK-LABEL: shr64:
+; C;HECK-NEXT: (setlocal @0 (argument 1))
+; C;HECK-NEXT: (setlocal @1 (argument 0))
+; C;HECK-NEXT: (setlocal @2 (SHR_I64 @1 @0))
+; C;HECK-NEXT: (return @2)
+;define i64 @shr64(i64 %x, i64 %y) {
+;  %a = lshr i64 %x, %y
+;  ret i64 %a
+;}
+
+; C;HECK-LABEL: sar64:
+; C;HECK-NEXT: (setlocal @0 (argument 1))
+; C;HECK-NEXT: (setlocal @1 (argument 0))
+; C;HECK-NEXT: (setlocal @2 (SAR_I64 @1 @0))
+; C;HECK-NEXT: (return @2)
+;define i64 @sar64(i64 %x, i64 %y) {
+;  %a = ashr i64 %x, %y
+;  ret i64 %a
+;}
+
+; CHECK-LABEL: clz64:
+; CHECK-NEXT: (setlocal @0 (argument 0))
+; CHECK-NEXT: (setlocal @1 (CLZ_I64 @0))
+; CHECK-NEXT: (return @1)
+define i64 @clz64(i64 %x) {
+  %a = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
+  ret i64 %a
+}
+
+; CHECK-LABEL: ctz64:
+; CHECK-NEXT: (setlocal @0 (argument 0))
+; CHECK-NEXT: (setlocal @1 (CTZ_I64 @0))
+; CHECK-NEXT: (return @1)
+define i64 @ctz64(i64 %x) {
+  %a = call i64 @llvm.cttz.i64(i64 %x, i1 false)
+  ret i64 %a
+}
+
+; CHECK-LABEL: popcnt64:
+; CHECK-NEXT: (setlocal @0 (argument 0))
+; CHECK-NEXT: (setlocal @1 (POPCNT_I64 @0))
+; CHECK-NEXT: (return @1)
+define i64 @popcnt64(i64 %x) {
+  %a = call i64 @llvm.ctpop.i64(i64 %x)
+  ret i64 %a
+}

llvm/trunk/test/CodeGen/WebAssembly/return-void.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: return_void:
-; CHECK-NEXT: (RETURN_VOID)
+; CHECK-NEXT: (return)
 define void @return_void() {
   ret void
 }

llvm/trunk/test/CodeGen/WebAssembly/unused-argument.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Make sure that argument offsets are correct even if some arguments are unused.
 
 target datalayout = "e-p:32:32-i64:64-v128:8:128-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: unused_first:
 ; CHECK-NEXT: (setlocal @0 (argument 1))
-; CHECK-NEXT: (RETURN @0)
+; CHECK-NEXT: (return @0)
 define i32 @unused_first(i32 %x, i32 %y) {
   ret i32 %y
 }
 
 ; CHECK-LABEL: unused_second:
 ; CHECK-NEXT: (setlocal @0 (argument 0))
-; CHECK-NEXT: (RETURN @0)
+; CHECK-NEXT: (return @0)
 define i32 @unused_second(i32 %x, i32 %y) {
   ret i32 %x
 }