Keep track of ScopArrayInfo objects that model PHI node storage

[grosser]

Summary

When translating PHI nodes into memory dependences during code generation we
require two kinds of memory. 'Normal memory' as for all scalar dependences and
'PHI node memory' to store the incoming values of the PHI node. With this
patch we now mark and track these two kinds of memories, which we previously
incorrectly marked as a single memory object.

Being aware of PHI node storage makes code generation easier, as we do not need
to guess what kind of storage a scalar reference requires. This simplifies the
code nicely.

[grosser]

Also simplify some of the RegionInfo code

[jdoerfert]

Some comments but overall LGTM.

include/polly/ScopInfo.h

1053–1055

typo.

lib/Analysis/ScopInfo.cpp

357

I would have used the suffix (last argument) of this call to encode the __phi but you don't have to.

std::string BasePtrName = getIslCompatibleName("MemRef_", BasePtr, IsPHI ? "__phi" : "");

1713

Why not use a bool in the pair but introduce this 1/0 integer?

1721

auto *

[grosser]

I addressed all your remarks, except:

Why not use a bool in the pair but introduce this 1/0 integer?

Because there is currently no DenseMapInfo available for bool and it is not 100% clear for me how to add this. However, I realized that I can even with char write just use IsPHI instead of IsPHI ? 1: 0. It would good to add such an implementation (which is super small), but I am not sure how to add thumbstones, empty keys and two boolean values, if only a bool can
be returned as key. As an implementation based on 'char' has almost the same properties, I did not spend more time to look into this.

Thanks again for your review,
Best Tobias

include/polly/ScopInfo.h

 class ScopArrayInfo {
 public:
   /// @brief Construct a ScopArrayInfo object.
   ///
   /// @param BasePtr        The array base pointer.
   /// @param ElementType    The type of the elements stored in the array.
   /// @param IslCtx         The isl context used to create the base pointer id.
   /// @param DimensionSizes A vector containing the size of each dimension.
+  /// @param IsPHI          Is this a PHI node specific array info object.
   ScopArrayInfo(Value *BasePtr, Type *ElementType, isl_ctx *IslCtx,
-                const SmallVector<const SCEV *, 4> &DimensionSizes);
+                const SmallVector<const SCEV *, 4> &DimensionSizes, bool IsPHI);
 
   /// @brief Destructor to free the isl id of the base pointer.
   ~ScopArrayInfo();
 
   /// @brief Return the base pointer.
   Value *getBasePtr() const { return BasePtr; }
 
   /// @brief Return the number of dimensions.
public:
   int getElemSizeInBytes() const;
 
   /// @brief Get the name of this memory reference.
   std::string getName() const;
 
   /// @brief Return the isl id for the base pointer.
   __isl_give isl_id *getBasePtrId() const;
 
+  /// @brief Is this array info modeling special PHI node memory?
+  ///
+  /// During code generation of PHI nodes, there is a need for two kinds of
+  /// virtual storage. The normal one as it is used for all scalar dependences,
+  /// where the result of the PHI node is stored and later loaded from as well
+  /// as a second one where the incoming values of the PHI nodes are stored
+  /// into and reloaded when the PHI is executed. As both memories use the
+  /// original PHI node as virtual base pointer, we have this additional
+  /// attribute to distinguish the PHI node specific array modeling from the
+  /// normal scalar array modeling.
+  bool isPHI() const { return IsPHI; };
+
   /// @brief Dump a readable representation to stderr.
   void dump() const;
 
   /// @brief Print a readable representation to @p OS.
   void print(raw_ostream &OS) const;
 
   /// @brief Access the ScopArrayInfo associated with an access function.
   static const ScopArrayInfo *
private:
   /// @brief The type of the elements stored in this array.
   Type *ElementType;
 
   /// @brief The isl id for the base pointer.
   isl_id *Id;
 
   /// @brief The sizes of each dimension.
   SmallVector<const SCEV *, 4> DimensionSizes;
+
+  /// @brief Is this PHI node specific storage?
+  bool IsPHI;
 };
 
 /// @brief Represent memory accesses in statements.
 class MemoryAccess {
 public:
   /// @brief The access type of a memory access
   ///
   /// There are three kind of access types:
private:
   isl_ctx *IslCtx;
 
   /// @brief A map from basic blocks to SCoP statements.
   DenseMap<BasicBlock *, ScopStmt *> StmtMap;
 
   /// Constraints on parameters.
   isl_set *Context;
 
-  typedef MapVector<const Value *, std::unique_ptr<ScopArrayInfo>>
-      ArrayInfoMapTy;
+  typedef MapVector<std::pair<const Value *, int>,
+                    std::unique_ptr<ScopArrayInfo>> ArrayInfoMapTy;
   /// @brief A map to remember ScopArrayInfo objects for all base pointers.
+  ///
+  /// As PHI nodes may have two array info objects associated, we add a flag
+  /// that distinguishes between the PHI node specific ArrayInfo object
+  /// and the normal one.
   ArrayInfoMapTy ScopArrayInfoMap;
 
   /// @brief The assumptions under which this scop was built.
   ///
   /// When constructing a scop sometimes the exact representation of a statement
   /// or condition would be very complex, but there is a common case which is a
   /// lot simpler, but which is only valid under certain assumptions. The
   /// assumed context records the assumptions taken during the construction of
public:
   reverse_iterator rbegin() { return Stmts.rbegin(); }
   reverse_iterator rend() { return Stmts.rend(); }
   const_reverse_iterator rbegin() const { return Stmts.rbegin(); }
   const_reverse_iterator rend() const { return Stmts.rend(); }
   //@}
 
   /// @brief Return the (possibly new) ScopArrayInfo object for @p Access.
   ///
-  /// @param ElementType The type of the elements stored in this array.
+  /// @param ElementType The type of the elements stored ino this array.
+  /// @param IsPHI       Is this ScopArrayInfo object modeling special
+  ///                    PHI node storage.
   const ScopArrayInfo *
   getOrCreateScopArrayInfo(Value *BasePtr, Type *ElementType,
-                           const SmallVector<const SCEV *, 4> &Sizes);
+                           const SmallVector<const SCEV *, 4> &Sizes,
+                           bool IsPHI = false);
 
   /// @brief Return the cached ScopArrayInfo object for @p BasePtr.
-  const ScopArrayInfo *getScopArrayInfo(Value *BasePtr);
+  ///
+  /// @param BasePtr The base pointer the object has been stored for
+  /// @param IsPHI   Are we looking for special PHI storage.
+  const ScopArrayInfo *getScopArrayInfo(Value *BasePtr, bool IsPHI = false);
 
   void setContext(isl_set *NewContext);
 
   /// @brief Align the parameters in the statement to the scop context
   void realignParams();
 
   /// @brief Print the static control part.
   ///

include/polly/TempScopInfo.h

enum TypeKind {
     MAY_WRITE = 0x3,
   };
 
 private:
   unsigned ElemBytes;
   TypeKind Type;
   bool IsAffine;
 
+  /// @brief Is this IRAccess modeling special PHI node accesses?
+  bool IsPHI;
+
 public:
   SmallVector<const SCEV *, 4> Subscripts, Sizes;
 
+  /// @brief Create a new IRAccess
+  ///
+  /// @param IsPHI Are we modeling special PHI node accesses?
   explicit IRAccess(TypeKind Type, Value *BaseAddress, const SCEV *Offset,
-                    unsigned elemBytes, bool Affine)
+                    unsigned elemBytes, bool Affine, bool IsPHI = false)
       : BaseAddress(BaseAddress), Offset(Offset), ElemBytes(elemBytes),
-        Type(Type), IsAffine(Affine) {}
+        Type(Type), IsAffine(Affine), IsPHI(IsPHI) {}
 
   explicit IRAccess(TypeKind Type, Value *BaseAddress, const SCEV *Offset,
                     unsigned elemBytes, bool Affine,
                     SmallVector<const SCEV *, 4> Subscripts,
                     SmallVector<const SCEV *, 4> Sizes)
       : BaseAddress(BaseAddress), Offset(Offset), ElemBytes(elemBytes),
-        Type(Type), IsAffine(Affine), Subscripts(Subscripts), Sizes(Sizes) {}
+        Type(Type), IsAffine(Affine), IsPHI(false), Subscripts(Subscripts),
+        Sizes(Sizes) {}
 
   enum TypeKind getType() const { return Type; }
 
   Value *getBase() const { return BaseAddress; }
 
   const SCEV *getOffset() const { return Offset; }
 
   unsigned getElemSizeInBytes() const { return ElemBytes; }
 
   bool isAffine() const { return IsAffine; }
 
   bool isRead() const { return Type == READ; }
 
   bool isWrite() const { return Type == MUST_WRITE; }
 
   void setMayWrite() { Type = MAY_WRITE; }
 
   bool isMayWrite() const { return Type == MAY_WRITE; }
 
   bool isScalar() const { return Subscripts.size() == 0; }
 
+  // @brief Is this IRAccess modeling special PHI node accesses?
+  bool isPHI() const { return IsPHI; }
+
   void print(raw_ostream &OS) const;
 };
 
 class Comparison {
   const SCEV *LHS;
   const SCEV *RHS;
 
   ICmpInst::Predicate Pred;

lib/Analysis/ScopInfo.cpp

static __isl_give isl_set *addRangeBoundsToSet(__isl_take isl_set *S,
 
   if (useLowerUpperBound)
     return isl_set_union(SLB, SUB);
   else
     return isl_set_intersect(SLB, SUB);
 }
 
 ScopArrayInfo::ScopArrayInfo(Value *BasePtr, Type *ElementType, isl_ctx *Ctx,
-                             const SmallVector<const SCEV *, 4> &DimensionSizes)
+                             const SmallVector<const SCEV *, 4> &DimensionSizes,
+                             bool IsPHI)
     : BasePtr(BasePtr), ElementType(ElementType),
-      DimensionSizes(DimensionSizes) {
-  const std::string BasePtrName = getIslCompatibleName("MemRef_", BasePtr, "");
+      DimensionSizes(DimensionSizes), IsPHI(IsPHI) {
+  std::string BasePtrName = getIslCompatibleName("MemRef_", BasePtr, "");
+  if (IsPHI)
+    BasePtrName += "__phi";
   Id = isl_id_alloc(Ctx, BasePtrName.c_str(), this);
 }
 
 ScopArrayInfo::~ScopArrayInfo() { isl_id_free(Id); }
 
 std::string ScopArrayInfo::getName() const { return isl_id_get_name(Id); }
 
 int ScopArrayInfo::getElemSizeInBytes() const {
if (!AFS)
     return;
 
   for (auto &AccessPair : *AFS) {
     IRAccess &Access = AccessPair.first;
     Instruction *AccessInst = AccessPair.second;
 
     Type *ElementType = getAccessInstType(AccessInst);
     const ScopArrayInfo *SAI = getParent()->getOrCreateScopArrayInfo(
-        Access.getBase(), ElementType, Access.Sizes);
+        Access.getBase(), ElementType, Access.Sizes, Access.isPHI());
 
     if (isApproximated && Access.isWrite())
       Access.setMayWrite();
 
     MemoryAccessList *&MAL = InstructionToAccess[AccessInst];
     if (!MAL)
       MAL = new MemoryAccessList();
     MAL->emplace_front(Access, AccessInst, this, SAI, MemAccs.size());
for (MinMaxAccessTy &MMA : MinMaxAccessPair.second) {
       isl_pw_multi_aff_free(MMA.first);
       isl_pw_multi_aff_free(MMA.second);
     }
   }
 }
 
 const ScopArrayInfo *
 Scop::getOrCreateScopArrayInfo(Value *BasePtr, Type *AccessType,
-                               const SmallVector<const SCEV *, 4> &Sizes) {
-  auto &SAI = ScopArrayInfoMap[BasePtr];
+                               const SmallVector<const SCEV *, 4> &Sizes,
+                               bool IsPHI) {
+  auto &SAI = ScopArrayInfoMap[std::make_pair(BasePtr, IsPHI ? 1 : 0)];
   if (!SAI)
-    SAI.reset(new ScopArrayInfo(BasePtr, AccessType, getIslCtx(), Sizes));
+    SAI.reset(
+        new ScopArrayInfo(BasePtr, AccessType, getIslCtx(), Sizes, IsPHI));
   return SAI.get();
 }
 
-const ScopArrayInfo *Scop::getScopArrayInfo(Value *BasePtr) {
-  const ScopArrayInfo *SAI = ScopArrayInfoMap[BasePtr].get();
+const ScopArrayInfo *Scop::getScopArrayInfo(Value *BasePtr, bool IsPHI) {
+  auto SAI = ScopArrayInfoMap[std::make_pair(BasePtr, IsPHI ? 1 : 0)].get();
   assert(SAI && "No ScopArrayInfo available for this base pointer");
   return SAI;
 }
 
 std::string Scop::getContextStr() const { return stringFromIslObj(Context); }
 std::string Scop::getAssumedContextStr() const {
   return stringFromIslObj(AssumedContext);
 }

lib/Analysis/TempScopInfo.cpp

for (unsigned u = 0; u < PHI->getNumIncomingValues(); u++) {
 
     // If the operand is a constant, global or argument we need an access
     // instruction and just choose the PHI.
     if (!OpI)
       OpI = PHI;
 
     Written = true;
 
-    IRAccess ScalarAccess(IRAccess::MUST_WRITE, PHI, ZeroOffset, 1, true);
+    IRAccess ScalarAccess(IRAccess::MUST_WRITE, PHI, ZeroOffset, 1, true,
+                          /* IsPHI */ true);
     AccFuncMap[OpBB].push_back(std::make_pair(ScalarAccess, OpI));
   }
 
   if (Written) {
-    IRAccess ScalarAccess(IRAccess::READ, PHI, ZeroOffset, 1, true);
+    IRAccess ScalarAccess(IRAccess::READ, PHI, ZeroOffset, 1, true,
+                          /* IsPHI */ true);
     Functions.push_back(std::make_pair(ScalarAccess, PHI));
   }
 }
 
 bool TempScopInfo::buildScalarDependences(Instruction *Inst, Region *R,
                                           Region *NonAffineSubRegion) {
   bool canSynthesizeInst = canSynthesize(Inst, LI, SE, R);
   if (isIgnoredIntrinsic(Inst))

lib/CodeGen/BlockGenerators.cpp

void BlockGenerator::generateScalarLoads(ScopStmt &Stmt,
 
   for (MemoryAccess &MA : *MAL) {
     AllocaInst *Address;
     if (!MA.isScalar() || !MA.isRead())
       continue;
 
     auto Base = cast<Instruction>(MA.getBaseAddr());
 
-    // This is either a common scalar use (second case) or the use of a phi
-    // operand by the PHI node (first case).
-    if (isa<PHINode>(Base) && Base == MA.getAccessInstruction())
+    if (MA.getScopArrayInfo()->isPHI())
       Address = getOrCreateAlloca(Base, PHIOpMap, ".phiops");
     else
       Address = getOrCreateAlloca(Base, ScalarMap, ".s2a");
 
     BBMap[Base] = Builder.CreateLoad(Address, Address->getName() + ".reload");
   }
 }
 
void BlockGenerator::generateScalarStores(ScopStmt &Stmt, BasicBlock *BB,
                                           ValueMapT &BBMap,
                                           ValueMapT &GlobalMap) {
   const Region &R = Stmt.getParent()->getRegion();
 
   assert(Stmt.isBlockStmt() && BB == Stmt.getBasicBlock() &&
          "Region statements need to use the generateScalarStores() "
          "function in the RegionGenerator");
 
-  // Set to remember a store to the phiops alloca of a PHINode. It is needed as
-  // we might have multiple write accesses to the same PHI and while one is the
-  // self write of the PHI (to the ScalarMap alloca) the other is the write to
-  // the operand alloca (PHIOpMap).
-  SmallPtrSet<PHINode *, 4> SeenPHIs;
-
-  // Iterate over all accesses in the given statement.
   for (MemoryAccess *MA : Stmt) {
-
-    // Skip non-scalar and read accesses.
     if (!MA->isScalar() || MA->isRead())
       continue;
 
-    Instruction *ScalarBase = cast<Instruction>(MA->getBaseAddr());
-    Instruction *ScalarInst = MA->getAccessInstruction();
-    PHINode *ScalarBasePHI = dyn_cast<PHINode>(ScalarBase);
+    Instruction *Base = cast<Instruction>(MA->getBaseAddr());
+    Instruction *Inst = MA->getAccessInstruction();
 
-    // Get the alloca node for the base instruction and the value we want to
-    // store. In total there are 4 options:
-    //  (1) The base is no PHI, hence it is a simple scalar def-use chain.
-    //  (2) The base is a PHI,
-    //      (a) and the write is caused by an operand in the block.
-    //      (b) and it is the PHI self write (same as case (1)).
-    //      (c) (2a) and (2b) are not distinguishable.
-    // For case (1) and (2b) we get the alloca from the scalar map and the value
-    // we want to store is initialized with the instruction attached to the
-    // memory access. For case (2a) we get the alloca from the PHI operand map
-    // and the value we want to store is initialized with the incoming value for
-    // this block. The tricky case (2c) is when both (2a) and (2b) match. This
-    // happens if the PHI operand is in the same block as the PHI. To handle
-    // that we choose the alloca of (2a) first and (2b) for the next write
-    // access to that PHI (there must be 2).
-    Value *ScalarValue = nullptr;
-    AllocaInst *ScalarAddr = nullptr;
+    Value *Val = nullptr;
+    AllocaInst *Address = nullptr;
 
-    if (!ScalarBasePHI) {
-      // Case (1)
-      ScalarAddr = getOrCreateAlloca(ScalarBase, ScalarMap, ".s2a");
-      ScalarValue = ScalarInst;
-    } else {
-      int PHIIdx = ScalarBasePHI->getBasicBlockIndex(BB);
-      if (ScalarBasePHI != ScalarInst) {
-        // Case (2a)
-        assert(PHIIdx >= 0 && "Bad scalar write to PHI operand");
-        SeenPHIs.insert(ScalarBasePHI);
-        ScalarAddr = getOrCreateAlloca(ScalarBase, PHIOpMap, ".phiops");
-        ScalarValue = ScalarBasePHI->getIncomingValue(PHIIdx);
-      } else if (PHIIdx < 0) {
-        // Case (2b)
-        ScalarAddr = getOrCreateAlloca(ScalarBase, ScalarMap, ".s2a");
-        ScalarValue = ScalarInst;
-      } else {
-        // Case (2c)
-        if (SeenPHIs.insert(ScalarBasePHI).second) {
-          // First access ==> same as (2a)
-          ScalarAddr = getOrCreateAlloca(ScalarBase, PHIOpMap, ".phiops");
-          ScalarValue = ScalarBasePHI->getIncomingValue(PHIIdx);
-        } else {
-          // Second access ==> same as (2b)
-          ScalarAddr = getOrCreateAlloca(ScalarBase, ScalarMap, ".s2a");
-          ScalarValue = ScalarInst;
-        }
-      }
+    if (MA->getScopArrayInfo()->isPHI()) {
+      PHINode *BasePHI = dyn_cast<PHINode>(Base);
+      int PHIIdx = BasePHI->getBasicBlockIndex(BB);
+      Address = getOrCreateAlloca(Base, PHIOpMap, ".phiops");
+      Val = BasePHI->getIncomingValue(PHIIdx);
+      Address = getOrCreateAlloca(Base, ScalarMap, ".s2a");
+      Val = Inst;
     }
-
-    ScalarValue =
-        getNewScalarValue(ScalarValue, R, ScalarMap, BBMap, GlobalMap);
-    Builder.CreateStore(ScalarValue, ScalarAddr);
+    Val = getNewScalarValue(Val, R, ScalarMap, BBMap, GlobalMap);
+    Builder.CreateStore(Val, Address);
   }
 }
 
 void BlockGenerator::createScalarInitialization(Region &R,
                                                 ValueMapT &GlobalMap) {
   // The split block __just before__ the region and optimized region.
   BasicBlock *SplitBB = R.getEnteringBlock();
   BranchInst *SplitBBTerm = cast<BranchInst>(SplitBB->getTerminator());
void RegionGenerator::generateScalarStores(ScopStmt &Stmt, BasicBlock *BB,
                                            ValueMapT &BBMap,
                                            ValueMapT &GlobalMap) {
   const Region &R = Stmt.getParent()->getRegion();
 
   Region *StmtR = Stmt.getRegion();
   assert(StmtR && "Block statements need to use the generateScalarStores() "
                   "function in the BlockGenerator");
 
-  BasicBlock *ExitBB = StmtR->getExit();
-
-  // For region statements three kinds of scalar stores exists:
-  //  (1) A definition used by a non-phi instruction outside the region.
-  //  (2) A phi-instruction in the region entry.
-  //  (3) A write to a phi instruction in the region exit.
-  // The last case is the tricky one since we do not know anymore which
-  // predecessor of the exit needs to store the operand value that doesn't
-  // have a definition in the region. Therefore, we have to check in each
-  // block in the region if we should store the value or not.
-
-  // Iterate over all accesses in the given statement.
   for (MemoryAccess *MA : Stmt) {
 
-    // Skip non-scalar and read accesses.
     if (!MA->isScalar() || MA->isRead())
       continue;
 
     Instruction *ScalarBase = cast<Instruction>(MA->getBaseAddr());
     Instruction *ScalarInst = MA->getAccessInstruction();
     PHINode *ScalarBasePHI = dyn_cast<PHINode>(ScalarBase);
 
-    Value *ScalarValue = nullptr;
+    Value *Val = nullptr;
     AllocaInst *ScalarAddr = nullptr;
 
-    if (!ScalarBasePHI) {
-      // Case (1)
-      ScalarAddr = getOrCreateAlloca(ScalarBase, ScalarMap, ".s2a");
-      ScalarValue = ScalarInst;
-    } else if (ScalarBasePHI->getParent() != ExitBB) {
-      // Case (2)
-      assert(ScalarBasePHI->getParent() == StmtR->getEntry() &&
-             "Bad PHI self write in non-affine region");
-      assert(ScalarBase == ScalarInst &&
-             "Bad PHI self write in non-affine region");
-      ScalarAddr = getOrCreateAlloca(ScalarBase, ScalarMap, ".s2a");
-      ScalarValue = ScalarInst;
-    } else {
+    if (MA->getScopArrayInfo()->isPHI()) {
       int PHIIdx = ScalarBasePHI->getBasicBlockIndex(BB);
-      // Skip accesses we will not handle in this basic block but in another one
-      // in the statement region.
-      if (PHIIdx < 0)
-        continue;
-
-      // Case (3)
       ScalarAddr = getOrCreateAlloca(ScalarBase, PHIOpMap, ".phiops");
-      ScalarValue = ScalarBasePHI->getIncomingValue(PHIIdx);
+      Val = ScalarBasePHI->getIncomingValue(PHIIdx);
+    } else {
+      ScalarAddr = getOrCreateAlloca(ScalarBase, ScalarMap, ".s2a");
+      Val = ScalarInst;
     }
 
-    ScalarValue =
-        getNewScalarValue(ScalarValue, R, ScalarMap, BBMap, GlobalMap);
-    Builder.CreateStore(ScalarValue, ScalarAddr);
+    Val = getNewScalarValue(Val, R, ScalarMap, BBMap, GlobalMap);
+    Builder.CreateStore(Val, ScalarAddr);
   }
 }
 
 void RegionGenerator::addOperandToPHI(ScopStmt &Stmt, const PHINode *PHI,
                                       PHINode *PHICopy, BasicBlock *IncomingBB,
                                       ValueMapT &GlobalMap,
                                       LoopToScevMapT &LTS) {
   Region *StmtR = Stmt.getRegion();

test/ScopInfo/NonAffine/non_affine_loop_used_later.ll

 ; CHECK:        n/a
 ; CHECK:    Statements {
 ; CHECK:      Stmt_bb2
 ; CHECK:            Domain :=
 ; CHECK:                [N] -> { Stmt_bb2[i0] : i0 >= 0 and N >= 1 and i0 <= N; Stmt_bb2[0] : N <= 0 }
 ; CHECK:            Schedule :=
 ; CHECK:                [N] -> { Stmt_bb2[i0] -> [i0, 0] : i0 <= N and N >= 1; Stmt_bb2[0] -> [0, 0] : N <= 0 }
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N] -> { Stmt_bb2[i0] -> MemRef_j_0[] };
+; CHECK:                [N] -> { Stmt_bb2[i0] -> MemRef_j_0__phi[] };
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                [N] -> { Stmt_bb2[i0] -> MemRef_j_0[] };
 ; CHECK:      Stmt_bb4__TO__bb18
 ; CHECK:            Domain :=
 ; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] : i0 >= 0 and N >= 1 and i0 <= -1 + N };
 ; CHECK:            Schedule :=
 ; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> [i0, 1] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_0[] };
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2[] };
+; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };
 ; CHECK:            MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_A[i0] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_smax[] };
 ; CHECK:            MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2[] };
+; CHECK:                [N] -> { Stmt_bb4__TO__bb18[i0] -> MemRef_j_2__phi[] };
 ; CHECK:      Stmt_bb18
 ; CHECK:            Domain :=
 ; CHECK:                [N] -> { Stmt_bb18[i0] : i0 >= 0 and N >= 1 and i0 <= -1 + N };
 ; CHECK:            Schedule :=
 ; CHECK:                [N] -> { Stmt_bb18[i0] -> [i0, 2] };
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                [N] -> { Stmt_bb18[i0] -> MemRef_j_2[] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N] -> { Stmt_bb18[i0] -> MemRef_j_2[] };
+; CHECK:                [N] -> { Stmt_bb18[i0] -> MemRef_j_2__phi[] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                [N] -> { Stmt_bb18[i0] -> MemRef_A[o0] : o0 >= -2147483648 and o0 <= 2147483645 };
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                [N] -> { Stmt_bb18[i0] -> MemRef_A[i0] };
 ; CHECK:      Stmt_bb23
 ; CHECK:            Domain :=
 ; CHECK:                [N] -> { Stmt_bb23[i0] : i0 >= 0 and N >= 1 and i0 <= -1 + N };
 ; CHECK:            Schedule :=
 ; CHECK:                [N] -> { Stmt_bb23[i0] -> [i0, 3] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                [N] -> { Stmt_bb23[i0] -> MemRef_j_2[] };
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N] -> { Stmt_bb23[i0] -> MemRef_j_0[] };
+; CHECK:                [N] -> { Stmt_bb23[i0] -> MemRef_j_0__phi[] };
 ; CHECK:    }
 ;
 ;    void f(int *A, int N, int M) {
 ;      int i = 0, j = 0;
 ;      for (i = 0; i < N; i++) {
 ;        if (A[i])
 ;          for (j = 0; j < M; j++)
 ;            A[i]++;

test/ScopInfo/loop_carry.ll

 ; CHECK: [n] -> { : }
 ; CHECK:     Statements {
 ; CHECK:      Stmt_bb
 ; CHECK:             Domain :=
 ; CHECK:                 [n] -> { Stmt_bb[i0] : i0 >= 0 and i0 <= -2 + n };
 ; CHECK:             Schedule :=
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> [i0] };
 ; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_1[] };
+; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
 ; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_k_05[] };
+; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
 ; CHECK:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_1[] };
+; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
 ; CHECK:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_k_05[] };
+; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
 ; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_a[1 + i0] };
 ; CHECK:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_a[2 + 2i0] };
 ; CHECK:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_a[4 + i0] };
 

test/ScopInfo/non_affine_region_1.ll

 ;        if (A[x])
 ;          A[x] = 0;
 ;      }
 ;    }
 ;
 ; CHECK:       Region: %bb1---%bb21
 ; CHECK:       Stmt_bb3
 ; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                 [b] -> { Stmt_bb3[i0] -> MemRef_x_1[] };
+; CHECK:                 [b] -> { Stmt_bb3[i0] -> MemRef_x_1__phi[] };
 ; CHECK:       Stmt_bb7
 ; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                 [b] -> { Stmt_bb7[i0] -> MemRef_x_1[] };
+; CHECK:                 [b] -> { Stmt_bb7[i0] -> MemRef_x_1__phi[] };
 ; CHECK:       Stmt_bb8
 ; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                 [b] -> { Stmt_bb8[i0] -> MemRef_x_1[] };
+; CHECK:                 [b] -> { Stmt_bb8[i0] -> MemRef_x_1__phi[] };
 ; CHECK:       Stmt_bb10__TO__bb18
 ; CHECK-NEXT:        Domain :=
 ; CHECK-NEXT:            [b] -> { Stmt_bb10__TO__bb18[i0] : i0 >= 0 and i0 <= 1023 };
 ; CHECK-NEXT:        Schedule :=
 ; CHECK-NEXT:            [b] -> { Stmt_bb10__TO__bb18[i0] -> [i0, 3] };
 ; CHECK-NEXT:        ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:            [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_x_1[] }
+; CHECK-NEXT:            [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_x_1__phi[] }
 ; CHECK-NOT:   [Scalar: 1]
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 define void @f(i32* %A, i32 %b) {
 bb:
   br label %bb1
 

test/ScopInfo/non_affine_region_2.ll

 ; CHECK:             { Stmt_bb3__TO__bb18[i0] -> [i0, 0] };
 ; CHECK-NOT:         { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] };
 ; CHECK-NOT:         { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] };
 ; CHECK:         ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK-NEXT:        { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] };
 ; CHECK-NOT:         { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] };
 ; CHECK-NOT:         { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] };
 ; CHECK:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:        { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2[] };
+; CHECK-NEXT:        { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
 ; CHECK-NOT:         { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] };
 ; CHECK-NOT:         { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] };
 ; CHECK:         MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK-NEXT:        { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2[] };
+; CHECK-NEXT:        { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
 ; CHECK-NOT:         { Stmt_bb3__TO__bb18[i0] -> MemRef_x_0[] };
 ; CHECK-NOT:         { Stmt_bb3__TO__bb18[i0] -> MemRef_x_1[] };
 ; CHECK:   Stmt_bb18
 ; CHECK:         Domain :=
 ; CHECK:             { Stmt_bb18[i0] : i0 >= 0 and i0 <= 1023 };
 ; CHECK:         Schedule :=
 ; CHECK:             { Stmt_bb18[i0] -> [i0, 1] };
 ; CHECK:         ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:             { Stmt_bb18[i0] -> MemRef_x_2[] };
+; CHECK:             { Stmt_bb18[i0] -> MemRef_x_2__phi[] };
 ; CHECK:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:             { Stmt_bb18[i0] -> MemRef_A[i0] };
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 define void @f(i32* %A, i32 %b) {
 bb:
   %tmp = sext i32 %b to i64

test/ScopInfo/non_affine_region_3.ll

 ; CHECK:   Stmt_bb3__TO__bb18
 ; CHECK:         Domain :=
 ; CHECK:             { Stmt_bb3__TO__bb18[i0] : i0 >= 0 and i0 <= 1023 };
 ; CHECK:         Schedule :=
 ; CHECK:             { Stmt_bb3__TO__bb18[i0] -> [i0, 0] };
 ; CHECK:         ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:             { Stmt_bb3__TO__bb18[i0] -> MemRef_A[i0] };
 ; CHECK:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:             { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2[] };
+; CHECK:             { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
 ; CHECK:         MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:             { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2[] };
+; CHECK:             { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
 ; CHECK:         MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:             { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2[] };
+; CHECK:             { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
 ; CHECK:         MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:             { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2[] };
+; CHECK:             { Stmt_bb3__TO__bb18[i0] -> MemRef_x_2__phi[] };
 ; CHECK:   Stmt_bb18
 ; CHECK:         Domain :=
 ; CHECK:             { Stmt_bb18[i0] : i0 >= 0 and i0 <= 1023 };
 ; CHECK:         Schedule :=
 ; CHECK:             { Stmt_bb18[i0] -> [i0, 1] };
 ; CHECK:         ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:             { Stmt_bb18[i0] -> MemRef_x_2[] };
+; CHECK:             { Stmt_bb18[i0] -> MemRef_x_2__phi[] };
 ; CHECK:         MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:             { Stmt_bb18[i0] -> MemRef_A[i0] };
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 define void @f(i32* %A, i32 %b) {
 bb:
   %tmp = sext i32 %b to i64

test/ScopInfo/non_affine_region_4.ll

 ; CHECK:                { Stmt_bb2__TO__bb7[i0] : i0 >= 0 and i0 <= 1023 };
 ; CHECK:            Schedule :=
 ; CHECK:                { Stmt_bb2__TO__bb7[i0] -> [i0, 0] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                { Stmt_bb2__TO__bb7[i0] -> MemRef_A[i0] };
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                { Stmt_bb2__TO__bb7[i0] -> MemRef_x[] };
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                { Stmt_bb2__TO__bb7[i0] -> MemRef_y[] };
+; CHECK:                { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] };
 ; CHECK:            MayWriteAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                { Stmt_bb2__TO__bb7[i0] -> MemRef_y[] };
+; CHECK:                { Stmt_bb2__TO__bb7[i0] -> MemRef_y__phi[] };
 ; CHECK:      Stmt_bb7
 ; CHECK:            Domain :=
 ; CHECK:                { Stmt_bb7[i0] : i0 >= 0 and i0 <= 1023 };
 ; CHECK:            Schedule :=
 ; CHECK:                { Stmt_bb7[i0] -> [i0, 1] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                { Stmt_bb7[i0] -> MemRef_x[] };
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                { Stmt_bb7[i0] -> MemRef_y[] };
+; CHECK:                { Stmt_bb7[i0] -> MemRef_y__phi[] };
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                { Stmt_bb7[i0] -> MemRef_A[i0] };
 ;
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 define void @f(i32* %A, i32 %b) {
 bb:
   br label %bb1

test/ScopInfo/phi_condition_modeling_1.ll

 ;        A[i] = tmp;
 ;      }
 ;    }
 ;
 ; CHECK:    Statements {
 ; CHECK-LABEL:      Stmt_bb6
 ; CHECK-NOT: Access
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0[] };
+; CHECK:                [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK-LABEL:      Stmt_bb7
 ; CHECK-NOT: Access
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0[] };
+; CHECK:                [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK-LABEL:      Stmt_bb8
 ; CHECK-NOT: Access
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N, c] -> { Stmt_bb8[i0] -> MemRef_tmp_0[] };
+; CHECK:                [N, c] -> { Stmt_bb8[i0] -> MemRef_tmp_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                [N, c] -> { Stmt_bb8[i0] -> MemRef_A[i0] };
 ; CHECK-NOT: Access
 ; CHECK:    }
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 

test/ScopInfo/phi_condition_modeling_2.ll

 ;        A[i] = tmp;
 ;      }
 ;    }
 ;
 ; CHECK:    Statements {
 ; CHECK-LABEL:      Stmt_bb6
 ; CHECK-NOT: Access
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0[] };
+; CHECK:                [N, c] -> { Stmt_bb6[i0] -> MemRef_tmp_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK-LABEL:      Stmt_bb7
 ; CHECK-NOT: Access
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0[] };
+; CHECK:                [N, c] -> { Stmt_bb7[i0] -> MemRef_tmp_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK-LABEL:      Stmt_bb8
 ; CHECK-NOT: Access
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [N, c] -> { Stmt_bb8[i0] -> MemRef_tmp_0[] };
+; CHECK:                [N, c] -> { Stmt_bb8[i0] -> MemRef_tmp_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                [N, c] -> { Stmt_bb8[i0] -> MemRef_tmp_0[] };
 ; CHECK-NOT: Access
 ; CHECK-LABEL:      Stmt_bb8b
 ; CHECK-NOT: Access
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                [N, c] -> { Stmt_bb8b[i0] -> MemRef_tmp_0[] };

test/ScopInfo/phi_conditional_simple_1.ll

 ; RUN: opt %loadPolly -polly-detect-unprofitable -analyze -polly-scops < %s | FileCheck %s
 ;
 ;    void jd(int *A, int c) {
 ;      for (int i = 0; i < 1024; i++) {
 ;        if (c)
 ;          A[i] = 1;
 ;        else
 ;          A[i] = 2;
 ;      }
 ;    }
 ;
 ; CHECK:    Statements {
 ; CHECK-LABEL:      Stmt_if_else
 ; CHECK-NOT: Access
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [c] -> { Stmt_if_else[i0] -> MemRef_phi[] };
+; CHECK:                [c] -> { Stmt_if_else[i0] -> MemRef_phi__phi[] };
 ; CHECK-NOT: Access
 ; CHECK-LABEL:      Stmt_if_then
 ; CHECK-NOT: Access
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [c] -> { Stmt_if_then[i0] -> MemRef_phi[] };
+; CHECK:                [c] -> { Stmt_if_then[i0] -> MemRef_phi__phi[] };
 ; CHECK-NOT: Access
 ; CHECK-LABEL:      Stmt_if_end
 ; CHECK-NOT: Access
 ; CHECK:            ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                [c] -> { Stmt_if_end[i0] -> MemRef_phi[] };
+; CHECK:                [c] -> { Stmt_if_end[i0] -> MemRef_phi__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:            MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                [c] -> { Stmt_if_end[i0] -> MemRef_A[i0] };
 ; CHECK-NOT: Access
 ; CHECK:    }
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 

test/ScopInfo/phi_loop_carried_float.ll

 ; RUN: opt %loadPolly -polly-detect-unprofitable -polly-scops -analyze < %s | FileCheck %s
 ;
 ;    float f(float *A, int N) {
 ;      float tmp = 0;
 ;      for (int i = 0; i < N; i++)
 ;        tmp += A[i];
 ;    }
 ;
 ; CHECK:      Statements {
 ; CHECK-LABEL:   Stmt_bb1
 ; CHECK-NOT: Access
 ; CHECK:              ReadAccess := [Reduction Type: NONE]
-; CHECK:                  [N] -> { Stmt_bb1[i0] -> MemRef_tmp_0[] };
+; CHECK:                  [N] -> { Stmt_bb1[i0] -> MemRef_tmp_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:              MustWriteAccess :=  [Reduction Type: NONE]
 ; CHECK:                  [N] -> { Stmt_bb1[i0] -> MemRef_tmp_0[] };
 ; CHECK-NOT: Access
 ; CHECK-LABEL:   Stmt_bb4
 ; CHECK-NOT: Access
 ; CHECK:              MustWriteAccess :=  [Reduction Type: NONE]
-; CHECK:                  [N] -> { Stmt_bb4[i0] -> MemRef_tmp_0[] };
+; CHECK:                  [N] -> { Stmt_bb4[i0] -> MemRef_tmp_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:              ReadAccess := [Reduction Type: NONE]
 ; CHECK:                  [N] -> { Stmt_bb4[i0] -> MemRef_tmp_0[] };
 ; CHECK-NOT: Access
 ; CHECK:              ReadAccess := [Reduction Type: NONE]
 ; CHECK:                  [N] -> { Stmt_bb4[i0] -> MemRef_A[i0] };
 ; CHECK-NOT: Access
 ; CHECK:      }

test/ScopInfo/phi_scalar_simple_1.ll

 define i32 @jd(i32* noalias %A, i32 %x, i32 %N) {
 entry:
   %tmp = sext i32 %N to i64
   br label %for.cond
 
 for.cond:                                         ; preds = %for.inc4, %entry
 ; CHECK-LABEL: Stmt_for_cond
 ; CHECK:       ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:           [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
+; CHECK:           [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:       MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:           [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
 ; CHECK-NOT: Access
 ; CHECK:       MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:           [N] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
 ; CHECK-NOT: Access
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc4 ], [ 1, %entry ]
   %x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1.lcssa, %for.inc4 ]
   %cmp = icmp slt i64 %indvars.iv, %tmp
   br i1 %cmp, label %for.body, label %for.end6
 
 for.body:                                         ; preds = %for.cond
 ; CHECK-LABEL: Stmt_for_body
 ; CHECK:       ReadAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:           [N] -> { Stmt_for_body[i0] -> MemRef_x_addr_0[] };
 ; CHECK-NOT: Access
 ; CHECK:       MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:           [N] -> { Stmt_for_body[i0] -> MemRef_x_addr_1[] };
+; CHECK:           [N] -> { Stmt_for_body[i0] -> MemRef_x_addr_1__phi[] };
 ; CHECK-NOT: Access
   br label %for.cond1
 
 for.cond1:                                        ; preds = %for.inc, %for.body
 ; CHECK-LABEL: Stmt_for_cond1
 ; CHECK:       ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:           [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
+; CHECK:           [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:       MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:           [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
 ; CHECK-NOT: Access
 ; CHECK:       MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:           [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1_lcssa[] };
+; CHECK:           [N] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1_lcssa__phi[] };
 ; CHECK-NOT: Access
   %x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %add, %for.inc ]
   %j.0 = phi i32 [ 3, %for.body ], [ %inc, %for.inc ]
   %exitcond = icmp ne i32 %j.0, %N
   br i1 %exitcond, label %for.body3, label %for.end
 
 for.body3:                                        ; preds = %for.cond1
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body3
 ; CHECK-LABEL: Stmt_for_inc
 ; CHECK:       MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:           [N] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1[] };
+; CHECK:           [N] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:       ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:           [N] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1[] };
 ; CHECK-NOT: Access
 ; CHECK:       ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:           [N] -> { Stmt_for_inc[i0, i1] -> MemRef_A[1 + i0] };
 ; CHECK-NOT: Access
   %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
   %tmp1 = load i32, i32* %arrayidx, align 4
   %add = add nsw i32 %x.addr.1, %tmp1
   %inc = add nsw i32 %j.0, 1
   br label %for.cond1
 
 for.end:                                          ; preds = %for.cond1
 ; CHECK-LABEL: Stmt_for_end
 ; CHECK-NOT: Access
 ; CHECK:       MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:           [N] -> { Stmt_for_end[i0] -> MemRef_x_addr_1_lcssa[] };
 ; CHECK-NOT: Access
 ; CHECK:       ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:           [N] -> { Stmt_for_end[i0] -> MemRef_x_addr_1_lcssa[] };
+; CHECK:           [N] -> { Stmt_for_end[i0] -> MemRef_x_addr_1_lcssa__phi[] };
 ; CHECK-NOT: Access
   %x.addr.1.lcssa = phi i32 [ %x.addr.1, %for.cond1 ]
   br label %for.inc4
 
 for.inc4:                                         ; preds = %for.end
 ; CHECK-LABEL: Stmt_for_inc4
 ; CHECK-NOT: Access
 ; CHECK:       ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:           [N] -> { Stmt_for_inc4[i0] -> MemRef_x_addr_1_lcssa[] };
 ; CHECK-NOT: Access
 ; CHECK:       MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:           [N] -> { Stmt_for_inc4[i0] -> MemRef_x_addr_0[] };
+; CHECK:           [N] -> { Stmt_for_inc4[i0] -> MemRef_x_addr_0__phi[] };
 ; CHECK-NOT: Access
   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
   br label %for.cond
 
 for.end6:                                         ; preds = %for.cond
   ret i32 %x.addr.0
 }

test/ScopInfo/phi_scalar_simple_2.ll

entry:
   %tmp = sext i32 %N to i64
   %tmp1 = sext i32 %c to i64
   br label %for.cond
 
 for.cond:                                         ; preds = %for.inc5, %entry
 ; CHECK-LABEL: Stmt_for_cond
 ; CHECK-NOT: Access
 ; CHECK:     ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:         [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
+; CHECK:         [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:         [N, c] -> { Stmt_for_cond[i0] -> MemRef_A[i0] };
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
 ; CHECK-NOT: Access
   %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc5 ], [ 0, %entry ]
   %x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1, %for.inc5 ]
   %arrayidx2 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
   store i32 %x.addr.0, i32* %arrayidx2
   %cmp = icmp slt i64 %indvars.iv, %tmp
   br i1 %cmp, label %for.body, label %for.end7
 
 for.body:                                         ; preds = %for.cond
 ; CHECK-LABEL: Stmt_for_body
 ; CHECK-NOT: Access
 ; CHECK:     ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_for_body[i0] -> MemRef_x_addr_0[] };
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:         [N, c] -> { Stmt_for_body[i0] -> MemRef_x_addr_1[] };
+; CHECK:         [N, c] -> { Stmt_for_body[i0] -> MemRef_x_addr_1__phi[] };
 ; CHECK-NOT: Access
   br label %for.cond1
 
 for.cond1:                                        ; preds = %for.inc, %for.body
 ; CHECK-LABEL: Stmt_for_cond1
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
 ; CHECK-NOT: Access
 ; CHECK:     ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:         [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
+; CHECK:         [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1__phi[] };
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
 ; CHECK-NOT: Access
   %x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %x.addr.2, %for.inc ]
   %j.0 = phi i32 [ 0, %for.body ], [ %inc, %for.inc ]
   %exitcond = icmp ne i32 %j.0, %N
   br i1 %exitcond, label %for.body3, label %for.end
 
 for.body3:                                        ; preds = %for.cond1
 ; CHECK-LABEL: Stmt_for_body3
 ; CHECK-NOT: Access
 ; CHECK:     ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_for_body3[i0, i1] -> MemRef_x_addr_1[] };
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:         [N, c] -> { Stmt_for_body3[i0, i1] -> MemRef_x_addr_2[] };
+; CHECK:         [N, c] -> { Stmt_for_body3[i0, i1] -> MemRef_x_addr_2__phi[] };
 ; CHECK-NOT: Access
   %cmp4 = icmp slt i64 %indvars.iv, %tmp1
   br i1 %cmp4, label %if.then, label %if.end
 
 if.then:                                          ; preds = %for.body3
 ; CHECK-LABEL: Stmt_if_then
 ; CHECK-NOT: Access
 ; CHECK:     ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_x_addr_1[] };
 ; CHECK-NOT: Access
 ; CHECK:     ReadAccess := [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:         [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_A[i0] };
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:         [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_x_addr_2[] };
+; CHECK:         [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_x_addr_2__phi[] };
 ; CHECK-NOT: Access
   %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
   %tmp2 = load i32, i32* %arrayidx, align 4
   %add = add nsw i32 %x.addr.1, %tmp2
   br label %if.end
 
 if.end:                                           ; preds = %if.then, %for.body3
 ; CHECK-LABEL: Stmt_if_end
 ; CHECK-NOT: Access
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_if_end[i0, i1] -> MemRef_x_addr_2[] };
 ; CHECK-NOT: Access
 ; CHECK:     ReadAccess := [Reduction Type: NONE] [Scalar: 1]
-; CHECK:         [N, c] -> { Stmt_if_end[i0, i1] -> MemRef_x_addr_2[] };
+; CHECK:         [N, c] -> { Stmt_if_end[i0, i1] -> MemRef_x_addr_2__phi[] };
 ; CHECK-NOT: Access
   %x.addr.2 = phi i32 [ %add, %if.then ], [ %x.addr.1, %for.body3 ]
   br label %for.inc
 
 for.inc:                                          ; preds = %if.end
 ; CHECK-LABEL: Stmt_for_inc
 ; CHECK:     ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_2[] };
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:         [N, c] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1[] };
+; CHECK:         [N, c] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1__phi[] };
   %inc = add nsw i32 %j.0, 1
   br label %for.cond1
 
 for.end:                                          ; preds = %for.cond1
   br label %for.inc5
 
 for.inc5:                                         ; preds = %for.end
 ; CHECK-LABEL: Stmt_for_inc5
 ; CHECK:     ReadAccess := [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:         [N, c] -> { Stmt_for_inc5[i0] -> MemRef_x_addr_1[] };
 ; CHECK:     MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:         [N, c] -> { Stmt_for_inc5[i0] -> MemRef_x_addr_0[] };
+; CHECK:         [N, c] -> { Stmt_for_inc5[i0] -> MemRef_x_addr_0__phi[] };
   %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
   br label %for.cond
 
 for.end7:                                         ; preds = %for.cond
   ret i32 %x.addr.0
 }