[ADT] Allow zero-width zext

[seldridge]

Summary

Remove assertion that disallows zero-extending a zero-width APInt. This
check is too restrictive and makes it difficult to use APInt to model
zero-width things, e.g., zero-width wires in the CIRCT project.

Signed-off-by: Schuyler Eldridge <[e-mail]>

[seldridge]

Opened a second revision when I meant to drop a commit from https://reviews.llvm.org/D114768. Whoops. 🤦

llvm/include/llvm/ADT/APInt.h

#endif
   unsigned getMinSignedBits() const { return BitWidth - getNumSignBits() + 1; }
 
   /// Get zero extended value
   ///
   /// This method attempts to return the value of this APInt as a zero extended
   /// uint64_t. The bitwidth must be <= 64 or the value must fit within a
   /// uint64_t. Otherwise an assertion will result.
   uint64_t getZExtValue() const {
-    if (isSingleWord()) {
-      assert(BitWidth && "zero width values not allowed");
+    if (isSingleWord())
       return U.VAL;
-    }
     assert(getActiveBits() <= 64 && "Too many bits for uint64_t");
     return U.pVal[0];
   }
 
   /// Get sign extended value
   ///
   /// This method attempts to return the value of this APInt as a sign extended
   /// int64_t. The bit width must be <= 64 or the value must fit within an