pre-commit test for D109767

llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir

+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK
+
+--- |
+
+  define i32 @test(i32 %a) {
+  entry:
+    %cmp = trunc i32 %a to i1
+    br i1 %cmp, label %true, label %false
+
+  true:                                             ; preds = %entry
+    ret i32 0
+
+  false:                                            ; preds = %entry
+    ret i32 1
+  }
+
+...
+---
+name:            test
+alignment:       16
+legalized:       true
+regBankSelected: true
+registers:
+  - { id: 0, class: gpr, preferred-register: '' }
+  - { id: 1, class: gpr, preferred-register: '' }
+  - { id: 2, class: gpr, preferred-register: '' }
+  - { id: 3, class: gpr, preferred-register: '' }
+body:             |
+  bb.1.entry:
+    successors: %bb.2(0x40000000), %bb.3(0x40000000)
+    liveins: $edi
+
+    %0(s32) = COPY $edi
+    %2(s32) = G_CONSTANT i32 0
+    %3(s32) = G_CONSTANT i32 1
+    %1(s1) = G_TRUNC %0(s32)
+    G_BRCOND %1(s1), %bb.2
+    G_BR %bb.3
+
+  bb.2.true:
+    $eax = COPY %2(s32)
+    RET 0, implicit $eax
+
+  bb.3.false:
+    $eax = COPY %3(s32)
+    RET 0, implicit $eax
+
+...

llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected

+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK
+
+--- |
+
+  define i32 @test(i32 %a) {
+  entry:
+    %cmp = trunc i32 %a to i1
+    br i1 %cmp, label %true, label %false
+
+  true:                                             ; preds = %entry
+    ret i32 0
+
+  false:                                            ; preds = %entry
+    ret i32 1
+  }
+
+...
+---
+name:            test
+alignment:       16
+legalized:       true
+regBankSelected: true
+registers:
+  - { id: 0, class: gpr, preferred-register: '' }
+  - { id: 1, class: gpr, preferred-register: '' }
+  - { id: 2, class: gpr, preferred-register: '' }
+  - { id: 3, class: gpr, preferred-register: '' }
+body:             |
+  ; CHECK-LABEL: name: test
+  ; CHECK: bb.0.entry:
+  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK:   [[COPY:%[0-9]+]]:gr32 = COPY $edi
+  ; CHECK:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
+  ; CHECK:   [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 1
+  ; CHECK:   [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+  ; CHECK:   TEST8ri [[COPY1]], 1, implicit-def $eflags
+  ; CHECK:   JCC_1 %bb.1, 5, implicit $eflags
+  ; CHECK:   JMP_1 %bb.2
+  ; CHECK: bb.1.true:
+  ; CHECK:   $eax = COPY [[MOV32r0_]]
+  ; CHECK:   RET 0, implicit $eax
+  ; CHECK: bb.2.false:
+  ; CHECK:   $eax = COPY [[MOV32ri]]
+  ; CHECK:   RET 0, implicit $eax
+  bb.1.entry:
+    successors: %bb.2(0x40000000), %bb.3(0x40000000)
+    liveins: $edi
+
+    %0(s32) = COPY $edi
+    %2(s32) = G_CONSTANT i32 0
+    %3(s32) = G_CONSTANT i32 1
+    %1(s1) = G_TRUNC %0(s32)
+    G_BRCOND %1(s1), %bb.2
+    G_BR %bb.3
+
+  bb.2.true:
+    $eax = COPY %2(s32)
+    RET 0, implicit $eax
+
+  bb.3.false:
+    $eax = COPY %3(s32)
+    RET 0, implicit $eax
+
+...

llvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg

+# These tests require llc.
+if 'llc-binary' not in config.available_features:
+    config.unsupported = True

llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test

+# REQUIRES: x86-registered-target
+## Check that update_mir_test_checks uses CHECK-NEXT directories
+
+# RUN: cp -f %S/Inputs/x86-condbr.mir %t.mir && %update_mir_test_checks %t.mir
+# RUN: diff -u %S/Inputs/x86-condbr.mir.expected %t.mir