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Differential D10763

Cortex-R4F is not VFPOnlySP
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Authored by javed.absar on Jun 26 2015, 1:53 AM.

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rG99a9343ae6b9: [ARM] Cortex-R4F is not VFPOnlySP
rL240776: [ARM] Cortex-R4F is not VFPOnlySP

Summary

The model in ARM.td describes cortex-r4f as "FeatureVPOnlySP". This is incorect as Cortex-R4F TRM Sec 11.1.1 , explicitly states "FPU fully supports single-precision and double-precision add, subtract.."

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javed.absar updated this revision to Diff 28546.Jun 26 2015, 1:53 AM

javed.absar retitled this revision from to Cortex-R4F is not VFPOnlySP.

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javed.absar edited the test plan for this revision. (Show Details)

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Herald added a subscriber: aemerson. · View Herald TranscriptJun 26 2015, 1:53 AM

LGTM. Thanks!

This revision is now accepted and ready to land.Jun 26 2015, 2:54 AM

Closed by commit rL240776: [ARM] Cortex-R4F is not VFPOnlySP (authored by javed.absar). · Explain WhyJun 26 2015, 5:15 AM

This revision was automatically updated to reflect the committed changes.

Revision Contents

Path

Size

lib/

Target/

ARM/

2 lines

test/

CodeGen/

ARM/

build-attributes.ll

2 lines

Diff 28546

lib/Target/ARM/ARM.td

	Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
	// FIXME: R4 has currently the same ProcessorModel as A8.			// FIXME: R4 has currently the same ProcessorModel as A8.
	def : ProcessorModel<"cortex-r4", CortexA8Model,			def : ProcessorModel<"cortex-r4", CortexA8Model,
	[ProcR4]>;			[ProcR4]>;

	// FIXME: R4F has currently the same ProcessorModel as A8.			// FIXME: R4F has currently the same ProcessorModel as A8.
	def : ProcessorModel<"cortex-r4f", CortexA8Model,			def : ProcessorModel<"cortex-r4f", CortexA8Model,
	[ProcR4,			[ProcR4,
	FeatureSlowFPBrcc, FeatureHasSlowFPVMLx,			FeatureSlowFPBrcc, FeatureHasSlowFPVMLx,
	FeatureVFP3, FeatureVFPOnlySP, FeatureD16]>;			FeatureVFP3, FeatureD16]>;

	// FIXME: R5 has currently the same ProcessorModel as A8.			// FIXME: R5 has currently the same ProcessorModel as A8.
	def : ProcessorModel<"cortex-r5", CortexA8Model,			def : ProcessorModel<"cortex-r5", CortexA8Model,
	[ProcR5, HasV7Ops, FeatureDB,			[ProcR5, HasV7Ops, FeatureDB,
	FeatureVFP3, FeatureDSPThumb2,			FeatureVFP3, FeatureDSPThumb2,
	FeatureHasRAS, FeatureVFPOnlySP,			FeatureHasRAS, FeatureVFPOnlySP,
	FeatureD16, FeatureRClass]>;			FeatureD16, FeatureRClass]>;

	▲ Show 20 Lines • Show All 86 Lines • Show Last 20 Lines

test/CodeGen/ARM/build-attributes.ll

	Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
	; CORTEX-R4F-NOT: .eabi_attribute 19			; CORTEX-R4F-NOT: .eabi_attribute 19
	;; We default to IEEE 754 compliance			;; We default to IEEE 754 compliance
	; CORTEX-R4F: .eabi_attribute 20, 1			; CORTEX-R4F: .eabi_attribute 20, 1
	; CORTEX-R4F: .eabi_attribute 21, 1			; CORTEX-R4F: .eabi_attribute 21, 1
	; CORTEX-R4F-NOT: .eabi_attribute 22			; CORTEX-R4F-NOT: .eabi_attribute 22
	; CORTEX-R4F: .eabi_attribute 23, 3			; CORTEX-R4F: .eabi_attribute 23, 3
	; CORTEX-R4F: .eabi_attribute 24, 1			; CORTEX-R4F: .eabi_attribute 24, 1
	; CORTEX-R4F: .eabi_attribute 25, 1			; CORTEX-R4F: .eabi_attribute 25, 1
	; CORTEX-R4F: .eabi_attribute 27, 1			; CORTEX-R4F-NOT: .eabi_attribute 27, 1
	; CORTEX-R4F-NOT: .eabi_attribute 28			; CORTEX-R4F-NOT: .eabi_attribute 28
	; CORTEX-R4F-NOT: .eabi_attribute 36			; CORTEX-R4F-NOT: .eabi_attribute 36
	; CORTEX-R4F: .eabi_attribute 38, 1			; CORTEX-R4F: .eabi_attribute 38, 1
	; CORTEX-R4F-NOT: .eabi_attribute 42			; CORTEX-R4F-NOT: .eabi_attribute 42
	; CORTEX-R4F-NOT: .eabi_attribute 44			; CORTEX-R4F-NOT: .eabi_attribute 44
	; CORTEX-R4F-NOT: .eabi_attribute 68			; CORTEX-R4F-NOT: .eabi_attribute 68

	; CORTEX-R5: .cpu cortex-r5			; CORTEX-R5: .cpu cortex-r5
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