MIR Serialization: Serialize immediate machine operands.

[arphaman]

Summary

This patch is based on a previous serialization patch that serializes physical register operands (http://reviews.llvm.org/D10525).

This patch serialized immediate machine operands by using integer literals.

llvm/trunk/lib/CodeGen/MIRParser/MILexer.h

 // This file declares the function that lexes the machine instruction source
 // string.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_LIB_CODEGEN_MIRPARSER_MILEXER_H
 #define LLVM_LIB_CODEGEN_MIRPARSER_MILEXER_H
 
+#include "llvm/ADT/APSInt.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/STLExtras.h"
 #include <functional>
 
 namespace llvm {
 
 class Twine;
 
 /// A token produced by the machine instruction lexer.
 struct MIToken {
   enum TokenKind {
     // Markers
     Eof,
     Error,
 
     // Tokens with no info.
     comma,
     equal,
 
     // Identifier tokens
     Identifier,
-    NamedRegister
+    NamedRegister,
+
+    // Other tokens
+    IntegerLiteral
   };
 
 private:
   TokenKind Kind;
   StringRef Range;
+  APSInt IntVal;
 
 public:
   MIToken(TokenKind Kind, StringRef Range) : Kind(Kind), Range(Range) {}
 
+  MIToken(TokenKind Kind, StringRef Range, const APSInt &IntVal)
+      : Kind(Kind), Range(Range), IntVal(IntVal) {}
+
   TokenKind kind() const { return Kind; }
 
   bool isError() const { return Kind == Error; }
 
   bool isRegister() const { return Kind == NamedRegister; }
 
   bool is(TokenKind K) const { return Kind == K; }
 
   bool isNot(TokenKind K) const { return Kind != K; }
 
   StringRef::iterator location() const { return Range.begin(); }
 
   StringRef stringValue() const { return Range; }
+
+  const APSInt &integerValue() const { return IntVal; }
 };
 
 /// Consume a single machine instruction token in the given source and return
 /// the remaining source string.
 StringRef lexMIToken(
     StringRef Source, MIToken &Token,
     function_ref<void(StringRef::iterator, const Twine &)> ErrorCallback);
 
 } // end namespace llvm
 
 #endif

llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp

 public:
   explicit Cursor(StringRef Str) {
     Ptr = Str.data();
     End = Ptr + Str.size();
   }
 
   bool isEOF() const { return Ptr == End; }
 
-  char peek() const { return isEOF() ? 0 : *Ptr; }
+  char peek(unsigned I = 0) const { return End - Ptr <= I ? 0 : Ptr[I]; }
 
   void advance() { ++Ptr; }
 
   StringRef remaining() const { return StringRef(Ptr, End - Ptr); }
 
   StringRef upto(Cursor C) const {
     assert(C.Ptr >= Ptr && C.Ptr <= End);
     return StringRef(Ptr, C.Ptr - Ptr);
static Cursor lexPercent(Cursor C, MIToken &Token) {
   auto Range = C;
   C.advance(); // Skip '%'
   while (isIdentifierChar(C.peek()))
     C.advance();
   Token = MIToken(MIToken::NamedRegister, Range.upto(C));
   return C;
 }
 
+static Cursor lexIntegerLiteral(Cursor C, MIToken &Token) {
+  auto Range = C;
+  C.advance();
+  while (isdigit(C.peek()))
+    C.advance();
+  StringRef StrVal = Range.upto(C);
+  Token = MIToken(MIToken::IntegerLiteral, StrVal, APSInt(StrVal));
+  return C;
+}
+
 static MIToken::TokenKind symbolToken(char C) {
   switch (C) {
   case ',':
     return MIToken::comma;
   case '=':
     return MIToken::equal;
   default:
     return MIToken::Error;
if (C.isEOF()) {
     return C.remaining();
   }
 
   auto Char = C.peek();
   if (isalpha(Char) || Char == '_')
     return lexIdentifier(C, Token).remaining();
   if (Char == '%')
     return lexPercent(C, Token).remaining();
+  if (isdigit(Char) || (Char == '-' && isdigit(C.peek(1))))
+    return lexIntegerLiteral(C, Token).remaining();
   MIToken::TokenKind Kind = symbolToken(Char);
   if (Kind != MIToken::Error)
     return lexSymbol(C, Kind, Token).remaining();
   Token = MIToken(MIToken::Error, C.remaining());
   ErrorCallback(C.location(),
                 Twine("unexpected character '") + Twine(Char) + "'");
   return C.remaining();
 }

llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp

public:
   ///
   /// This function always return true.
   bool error(StringRef::iterator Loc, const Twine &Msg);
 
   MachineInstr *parse();
 
   bool parseRegister(unsigned &Reg);
   bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
+  bool parseImmediateOperand(MachineOperand &Dest);
   bool parseMachineOperand(MachineOperand &Dest);
 
 private:
   void initNames2InstrOpCodes();
 
   /// Try to convert an instruction name to an opcode. Return true if the
   /// instruction name is invalid.
   bool parseInstrName(StringRef InstrName, unsigned &OpCode);
bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
   if (parseRegister(Reg))
     return true;
   lex();
   // TODO: Parse subregister.
   Dest = MachineOperand::CreateReg(Reg, IsDef);
   return false;
 }
 
+bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
+  assert(Token.is(MIToken::IntegerLiteral));
+  const APSInt &Int = Token.integerValue();
+  if (Int.getMinSignedBits() > 64)
+    // TODO: Replace this with an error when we can parse CIMM Machine Operands.
+    llvm_unreachable("Can't parse large integer literals yet!");
+  Dest = MachineOperand::CreateImm(Int.getExtValue());
+  lex();
+  return false;
+}
+
 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
   switch (Token.kind()) {
   case MIToken::NamedRegister:
     return parseRegisterOperand(Dest);
+  case MIToken::IntegerLiteral:
+    return parseImmediateOperand(Dest);
   case MIToken::Error:
     return true;
   default:
     // TODO: parse the other machine operands.
     return error("expected a machine operand");
   }
   return false;
 }

llvm/trunk/lib/CodeGen/MIRPrinter.cpp

 
 void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
   switch (Op.getType()) {
   case MachineOperand::MO_Register:
     // TODO: Print register flags.
     printReg(Op.getReg(), OS, TRI);
     // TODO: Print sub register.
     break;
+  case MachineOperand::MO_Immediate:
+    OS << Op.getImm();
+    break;
   default:
     // TODO: Print the other machine operands.
     llvm_unreachable("Can't print this machine operand at the moment");
   }
 }
 
 void llvm::printMIR(raw_ostream &OS, const Module &M) {
   yaml::Output Out(OS);
   Out << const_cast<Module &>(M);
 }
 
 void llvm::printMIR(raw_ostream &OS, const MachineFunction &MF) {
   MIRPrinter Printer(OS);
   Printer.print(MF);
 }

llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir

+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# This test ensures that the MIR parser parses immediate machine operands.
+
+--- |
+
+  define i32 @foo() {
+  entry:
+    ret i32 42
+  }
+
+  define i32 @bar() {
+  entry:
+    ret i32 -11
+  }
+
+...
+---
+# CHECK: name: foo
+name:            foo
+body:
+ - name:         entry
+   instructions:
+     # CHECK:      - '%eax = MOV32ri 42'
+     # CHECK-NEXT: - 'RETQ %eax'
+     - '%eax = MOV32ri 42'
+     - 'RETQ %eax'
+...
+---
+# CHECK: name: bar
+name:            bar
+body:
+ - name:         entry
+   instructions:
+     # CHECK:      - '%eax = MOV32ri -11'
+     # CHECK-NEXT: - 'RETQ %eax'
+     - '%eax = MOV32ri -11'
+     - 'RETQ %eax'
+...