This is an archive of the discontinued LLVM Phabricator instance.

Differential D10569

[WebAssembly] Skeleton WebAssembly target
AbandonedPublic

Authored by sunfish on Jun 19 2015, 7:28 AM.

Details

Reviewers
None
Summary

This patch introduces the WebAssembly target triples and a skeleton WebAssembly target in lib/Target/WebAssembly, per discussion in [0].

[0] http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-June/086890.html

Diff Detail

Event Timeline

sunfish updated this revision to Diff 28024.Jun 19 2015, 7:28 AM
sunfish retitled this revision from to [WebAssembly] Skeleton WebAssembly target.
sunfish updated this object.
sunfish edited the test plan for this revision. (Show Details)
sunfish added subscribers: jfb, Unknown Object (MLST).
• rafael added a subscriber: • rafael.Jun 19 2015, 11:37 AM

I am really happy to see this!

I just tried to build it with cmake and got some errors:

WebAssemblyInstPrinter.cpp:28:10: fatal error:
'WebAssemblyGenAsmWriter.inc' file not found
WebAssemblyISelDAGToDAG.cpp:60:10: fatal error:
'WebAssemblyGenDAGISel.inc' file not found

Do code models and relocation models have any meaning in webassembly?

Is SIMD an optional feature?

Atomics? Is there a memory model? You mentioned that there is nothing
like C's undefined behavior...

It is a bit funny that webassembly is an OS. Targeting web assembly
always implies the same apis, no?

Cheers,
Rafael

sunfish updated this revision to Diff 28045.Jun 19 2015, 1:50 PM

Update to fix includes of generated include files and remove the code for code models and relocation models.

jfb added inline comments.Jun 29 2015, 2:28 PM
CODE_OWNERS.TXT
70

Could you add me as well for WebAssembly? I could do a different change too...

include/llvm/ADT/Triple.h
89

Add a mention of little-endian in both comment.

156–157

I'd rather spell the OS enum the same as its textual representation in IR (uppercase enum, lowercase string seems to be the trend). That's not a problem anymore since arch are wasm32/wasm64, so I'd rather have WASM as the OS.

lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
36

report_fatal_error instead, here and below?

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
25

PointerSize is 4 by default, we need to set it for wasm64.
CalleeSaveStackSlotSize doesn't seem relevant, so the 4 default is fine?

(a bunch of others have OK defaults)

MaxInstLength doesn't seem relevant? Default is 4, but we don't have inline asm that matters because we're doing an AST. Maybe comment?
Same for MinInstAlignment.

(a bunch of others have OK defaults)

Should we do anything about Code16Directive / Code32Directive / Code64Directive? They don't make sense for us, so default is OK.

(a bunch of others have OK defaults)

What about UseIntegratedAssembler?

26

It seems better to have .align be bytes? The historical confusion is annoying, so I'd just force people to use .balign and .p2align anyways, but I think in general folks expect .align to be bytes?

30

Move this up, so it's in the same order as declared in the struct.

36

The defaults are "L", which is the dot needed?

lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
29

add "(little endian)" to the description.

lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
43

return_fatal_error in this file too.

lib/Target/WebAssembly/WebAssemblyFrameLowering.h
11

CodingStandards.rst does say that \file and \brief should be in every file header. If we're trying to be on top of the standard then other files should also have this (it looks like you followed the local convention per-file, instead of blindly doing all-doxygen).

31

Could you add a FIXME to implement assignCalleeSavedSpillSlots and getCalleeSavedSpillSlots? It looks like it's something we'll eventually want.

lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
38

OptimizeForSize instead?

lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
41

Redundant.

lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
28

No need for private: here.

lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
49

There doesn't seem to be a default mangling for datalayout, ELF seems like what we want: m:e.
These are the defaults, but would be nice to specify: f32:32-f64:64 ?

sunfish added inline comments.Jun 29 2015, 4:01 PM
CODE_OWNERS.TXT
70

There doesn't seem to be a precedent for having multiple code owners. I think this is something we should talk with others in the LLVM community about first. Fortunately, one doesn't need to be a code owner to review patches, so I don't think we need to block on this.

include/llvm/ADT/Triple.h
89

Other targets that don't have a big-endian variant don't do this.

156–157

This is following the convention of using WebAssembly in capital-letters contexts, and wasm in lower-letters contexts.

lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
36

This code is totally unusable without this function, so it doesn't really matter. Crashing is better because we get a stack trace to where we need to write code.

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
25

Ok, I set PointerSize and CalleeSaveStackSlotSize. I added a comment for MaxInstLength. MinInstAlignment seems fine with the default for now. I think we're ok with the defaults for the .code directives (which we probably won't use). I added a comment for UseIntegratedAssembler.

26

I'm all for forcing people to use .p2align/.balign; is that an option? Otherwise, looking at LLVM's other targets, making .align be .p2align seems fairly popular.

30

Ok, sorted.

36

"L" as a symbol prefix is an ugly name mangling because it requires all C symbols be mangled too (since 'L' is a valid C identifier character). I've now changed this to be "", and we can plan to use directives to set symbol visibilities rather than prefixes.

lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
29

Other targets that don't have big-endian variants don't do this.

lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
43

As above. Nothing works if this doesn't work.

lib/Target/WebAssembly/WebAssemblyFrameLowering.h
11

I missed adding \file and \brief in InstPrinter/*. Fixed now.

31

It's not clear yet whether we'll use the code that uses these. We can add them later if we need them.

lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
38

ForCodeSize is the name used in a few other places in LLVM. It's not just OptimizeForSize but also MinSize.

lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
41

Fixed.

lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
28

Fixed.

lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
49

The default is MM_None, which is what I think we really want for now, unless we decide for sure we're using ELF.

I like leaving f32/f64 as defaults because it keeps the string shorter, and it makes it easier to see what the more interesting parts are.

sunfish updated this revision to Diff 28725.Jun 29 2015, 4:08 PM

Update per jfb's review comments.

jfb added a comment.Jun 29 2015, 4:16 PM

No strong preference on the last comments, would be nice to fix, but lgtm either way.

lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
36

llvm_unreachable will only crash in debug, though?

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
26

I don't think it's an option... Asking folks around me they expect .balign behavior.

sunfish abandoned this revision.Jul 2 2015, 8:40 PM

Revision Contents

PathSize
4 lines
3 lines
autoconf/
7 lines
cmake/
4 lines
8 lines
include/
llvm/
ADT/
5 lines
lib/
Support/
16 lines
Target/
1 line
WebAssembly/
24 lines
InstPrinter/
3 lines
23 lines
16 lines
42 lines
47 lines
32 lines
MCTargetDesc/
4 lines
23 lines
16 lines
30 lines
43 lines
52 lines
86 lines
19 lines
15 lines
TargetInfo/
7 lines
23 lines
15 lines
29 lines
31 lines
58 lines
48 lines
74 lines
109 lines
49 lines
59 lines
46 lines
28 lines
37 lines
28 lines
41 lines
15 lines
37 lines
19 lines
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28 lines
31 lines
23 lines
78 lines
48 lines
51 lines
166 lines
67 lines
87 lines
28 lines
unittests/
ADT/
30 lines

Diff 28024

CODE_OWNERS.TXT

Context not available.
E: hfinkel@anl.gov E: hfinkel@anl.gov
D: BBVectorize, the loop reroller, alias analysis and the PowerPC target D: BBVectorize, the loop reroller, alias analysis and the PowerPC target
N: Dan Gohman
E: sunfish@mozilla.com
D: WebAssembly Backend (lib/Target/WebAssembly/*)
jfbUnsubmitted
Not Done
ReplyInline Actions

Could you add me as well for WebAssembly? I could do a different change too...

jfb: Could you add me as well for WebAssembly? I could do a different change too...
sunfishAuthorUnsubmitted
Not Done
ReplyInline Actions

There doesn't seem to be a precedent for having multiple code owners. I think this is something we should talk with others in the LLVM community about first. Fortunately, one doesn't need to be a code owner to review patches, so I don't think we need to block on this.

sunfish: There doesn't seem to be a precedent for having multiple code owners. I think this is something…
N: Renato Golin N: Renato Golin
E: renato.golin@linaro.org E: renato.golin@linaro.org
D: ARM Linux support D: ARM Linux support
Context not available.

CREDITS.TXT

Context not available.
D: Author of llvmc2 D: Author of llvmc2
N: Dan Gohman N: Dan Gohman
E: dan433584@gmail.com E: sunfish@mozilla.com
D: Miscellaneous bug fixes D: Miscellaneous bug fixes
D: WebAssembly Backend
N: David Goodwin N: David Goodwin
E: david@goodwinz.net E: david@goodwinz.net
Context not available.

autoconf/configure.ac

Context not available.
hexagon-*) llvm_cv_target_arch="Hexagon" ;; hexagon-*) llvm_cv_target_arch="Hexagon" ;;
nvptx-*) llvm_cv_target_arch="NVPTX" ;; nvptx-*) llvm_cv_target_arch="NVPTX" ;;
s390x-*) llvm_cv_target_arch="SystemZ" ;; s390x-*) llvm_cv_target_arch="SystemZ" ;;
wasm*-*) llvm_cv_target_arch="WebAssembly" ;;
*) llvm_cv_target_arch="Unknown" ;; *) llvm_cv_target_arch="Unknown" ;;
esac]) esac])
Context not available.
msp430-*) host_arch="MSP430" ;; msp430-*) host_arch="MSP430" ;;
hexagon-*) host_arch="Hexagon" ;; hexagon-*) host_arch="Hexagon" ;;
s390x-*) host_arch="SystemZ" ;; s390x-*) host_arch="SystemZ" ;;
wasm*-*) host_arch="WebAssembly" ;;
*) host_arch="Unknown" ;; *) host_arch="Unknown" ;;
esac esac
Context not available.
Hexagon) AC_SUBST(TARGET_HAS_JIT,0) ;; Hexagon) AC_SUBST(TARGET_HAS_JIT,0) ;;
NVPTX) AC_SUBST(TARGET_HAS_JIT,0) ;; NVPTX) AC_SUBST(TARGET_HAS_JIT,0) ;;
SystemZ) AC_SUBST(TARGET_HAS_JIT,1) ;; SystemZ) AC_SUBST(TARGET_HAS_JIT,1) ;;
WebAssembly) AC_SUBST(TARGET_HAS_JIT,0) ;;
*) AC_SUBST(TARGET_HAS_JIT,0) ;; *) AC_SUBST(TARGET_HAS_JIT,0) ;;
esac esac
fi fi
Context not available.
AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets], AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
[Build specific host targets: all or target1,target2,... Valid targets are: [Build specific host targets: all or target1,target2,... Valid targets are:
host, x86, x86_64, sparc, powerpc, arm64, arm, aarch64, mips, hexagon, host, x86, x86_64, sparc, powerpc, arm64, arm, aarch64, mips, hexagon,
xcore, msp430, nvptx, systemz, r600, bpf, and cpp (default=all)]),, xcore, msp430, nvptx, systemz, r600, bpf, wasm, and cpp (default=all)]),,
enableval=all) enableval=all)
if test "$enableval" = host-only ; then if test "$enableval" = host-only ; then
enableval=host enableval=host
Context not available.
systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;; systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
amdgpu) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;; amdgpu) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;;
r600) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;; r600) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;;
wasm) TARGETS_TO_BUILD="WebAssembly $TARGETS_TO_BUILD" ;;
host) case "$llvm_cv_target_arch" in host) case "$llvm_cv_target_arch" in
x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
Context not available.
Hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; Hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;;
NVPTX) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;; NVPTX) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
SystemZ) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;; SystemZ) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
WebAssembly) TARGETS_TO_BUILD="WebAssembly $TARGETS_TO_BUILD" ;;
*) AC_MSG_ERROR([Can not set target to build]) ;; *) AC_MSG_ERROR([Can not set target to build]) ;;
esac ;; esac ;;
*) AC_MSG_ERROR([Unrecognized target $a_target]) ;; *) AC_MSG_ERROR([Unrecognized target $a_target]) ;;
Context not available.

cmake/config-ix.cmake

Context not available.
set(LLVM_NATIVE_ARCH Hexagon) set(LLVM_NATIVE_ARCH Hexagon)
elseif (LLVM_NATIVE_ARCH MATCHES "s390x") elseif (LLVM_NATIVE_ARCH MATCHES "s390x")
set(LLVM_NATIVE_ARCH SystemZ) set(LLVM_NATIVE_ARCH SystemZ)
elseif (LLVM_NATIVE_ARCH MATCHES "wasm32")
set(LLVM_NATIVE_ARCH WebAssembly)
elseif (LLVM_NATIVE_ARCH MATCHES "wasm64")
set(LLVM_NATIVE_ARCH WebAssembly)
else () else ()
message(FATAL_ERROR "Unknown architecture ${LLVM_NATIVE_ARCH}") message(FATAL_ERROR "Unknown architecture ${LLVM_NATIVE_ARCH}")
endif () endif ()
Context not available.

configure

Context not available.
target1,target2,... Valid targets are: host, x86, target1,target2,... Valid targets are: host, x86,
x86_64, sparc, powerpc, arm64, arm, aarch64, mips, x86_64, sparc, powerpc, arm64, arm, aarch64, mips,
hexagon, xcore, msp430, nvptx, systemz, r600, bpf, hexagon, xcore, msp430, nvptx, systemz, r600, bpf,
and cpp (default=all) wasm, and cpp (default=all)
--enable-experimental-targets --enable-experimental-targets
Build experimental host targets: disable or Build experimental host targets: disable or
target1,target2,... (default=disable) target1,target2,... (default=disable)
Context not available.
hexagon-*) llvm_cv_target_arch="Hexagon" ;; hexagon-*) llvm_cv_target_arch="Hexagon" ;;
nvptx-*) llvm_cv_target_arch="NVPTX" ;; nvptx-*) llvm_cv_target_arch="NVPTX" ;;
s390x-*) llvm_cv_target_arch="SystemZ" ;; s390x-*) llvm_cv_target_arch="SystemZ" ;;
wasm*-*) llvm_cv_target_arch="WebAssembly" ;;
*) llvm_cv_target_arch="Unknown" ;; *) llvm_cv_target_arch="Unknown" ;;
esac esac
fi fi
Context not available.
msp430-*) host_arch="MSP430" ;; msp430-*) host_arch="MSP430" ;;
hexagon-*) host_arch="Hexagon" ;; hexagon-*) host_arch="Hexagon" ;;
s390x-*) host_arch="SystemZ" ;; s390x-*) host_arch="SystemZ" ;;
wasm*-*) host_arch="WebAssembly" ;;
*) host_arch="Unknown" ;; *) host_arch="Unknown" ;;
esac esac
Context not available.
;; ;;
SystemZ) TARGET_HAS_JIT=1 SystemZ) TARGET_HAS_JIT=1
;; ;;
WebAssembly) TARGET_HAS_JIT=0
;;
*) TARGET_HAS_JIT=0 *) TARGET_HAS_JIT=0
;; ;;
esac esac
Context not available.
systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;; systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
amdgpu) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;; amdgpu) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;;
r600) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;; r600) TARGETS_TO_BUILD="AMDGPU $TARGETS_TO_BUILD" ;;
wasm) TARGETS_TO_BUILD="WebAssembly $TARGETS_TO_BUILD" ;;
host) case "$llvm_cv_target_arch" in host) case "$llvm_cv_target_arch" in
x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; x86_64) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;;
Context not available.
Hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;; Hexagon) TARGETS_TO_BUILD="Hexagon $TARGETS_TO_BUILD" ;;
NVPTX) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;; NVPTX) TARGETS_TO_BUILD="NVPTX $TARGETS_TO_BUILD" ;;
SystemZ) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;; SystemZ) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;;
WebAssembly) TARGETS_TO_BUILD="WebAssembly $TARGETS_TO_BUILD" ;;
*) { { echo "$as_me:$LINENO: error: Can not set target to build" >&5 *) { { echo "$as_me:$LINENO: error: Can not set target to build" >&5
echo "$as_me: error: Can not set target to build" >&2;} echo "$as_me: error: Can not set target to build" >&2;}
{ (exit 1); exit 1; }; } ;; { (exit 1); exit 1; }; } ;;
Context not available.

include/llvm/ADT/Triple.h

Context not available.
spir64, // SPIR: standard portable IR for OpenCL 64-bit version spir64, // SPIR: standard portable IR for OpenCL 64-bit version
kalimba, // Kalimba: generic kalimba kalimba, // Kalimba: generic kalimba
shave, // SHAVE: Movidius vector VLIW processors shave, // SHAVE: Movidius vector VLIW processors
wasm32, // WebAssembly with 32-bit pointers
wasm64, // WebAssembly with 64-bit pointers
jfbUnsubmitted
Not Done
ReplyInline Actions

Add a mention of little-endian in both comment.

jfb: Add a mention of little-endian in both comment.
sunfishAuthorUnsubmitted
Not Done
ReplyInline Actions

Other targets that don't have a big-endian variant don't do this.

sunfish: Other targets that don't have a big-endian variant don't do this.
LastArchType = shave LastArchType = shave
}; };
enum SubArchType { enum SubArchType {
Context not available.
NVCL, // NVIDIA OpenCL NVCL, // NVIDIA OpenCL
AMDHSA, // AMD HSA Runtime AMDHSA, // AMD HSA Runtime
PS4, PS4,
LastOSType = PS4 WebAssembly,
LastOSType = WebAssembly
jfbUnsubmitted
Not Done
ReplyInline Actions

I'd rather spell the OS enum the same as its textual representation in IR (uppercase enum, lowercase string seems to be the trend). That's not a problem anymore since arch are wasm32/wasm64, so I'd rather have WASM as the OS.

jfb: I'd rather spell the OS enum the same as its textual representation in IR (uppercase enum…
sunfishAuthorUnsubmitted
Not Done
ReplyInline Actions

This is following the convention of using WebAssembly in capital-letters contexts, and wasm in lower-letters contexts.

sunfish: This is following the convention of using WebAssembly in capital-letters contexts, and wasm in…
}; };
enum EnvironmentType { enum EnvironmentType {
UnknownEnvironment, UnknownEnvironment,
Context not available.

lib/Support/Triple.cpp

Context not available.
case spir64: return "spir64"; case spir64: return "spir64";
case kalimba: return "kalimba"; case kalimba: return "kalimba";
case shave: return "shave"; case shave: return "shave";
case wasm32: return "wasm32";
case wasm64: return "wasm64";
} }
llvm_unreachable("Invalid ArchType!"); llvm_unreachable("Invalid ArchType!");
Context not available.
case spir64: return "spir"; case spir64: return "spir";
case kalimba: return "kalimba"; case kalimba: return "kalimba";
case shave: return "shave"; case shave: return "shave";
case wasm32: return "wasm32";
case wasm64: return "wasm64";
} }
} }
Context not available.
case NVCL: return "nvcl"; case NVCL: return "nvcl";
case AMDHSA: return "amdhsa"; case AMDHSA: return "amdhsa";
case PS4: return "ps4"; case PS4: return "ps4";
case WebAssembly: return "wasm";
} }
llvm_unreachable("Invalid OSType"); llvm_unreachable("Invalid OSType");
Context not available.
.Case("spir64", spir64) .Case("spir64", spir64)
.Case("kalimba", kalimba) .Case("kalimba", kalimba)
.Case("shave", shave) .Case("shave", shave)
.Case("wasm32", wasm32)
.Case("wasm64", wasm64)
.Default(UnknownArch); .Default(UnknownArch);
} }
Context not available.
.Case("spir64", Triple::spir64) .Case("spir64", Triple::spir64)
.StartsWith("kalimba", Triple::kalimba) .StartsWith("kalimba", Triple::kalimba)
.Case("shave", Triple::shave) .Case("shave", Triple::shave)
.Case("wasm32", Triple::wasm32)
.Case("wasm64", Triple::wasm64)
.Default(Triple::UnknownArch); .Default(Triple::UnknownArch);
} }
Context not available.
.StartsWith("nvcl", Triple::NVCL) .StartsWith("nvcl", Triple::NVCL)
.StartsWith("amdhsa", Triple::AMDHSA) .StartsWith("amdhsa", Triple::AMDHSA)
.StartsWith("ps4", Triple::PS4) .StartsWith("ps4", Triple::PS4)
.StartsWith("wasm", Triple::WebAssembly)
.Default(Triple::UnknownOS); .Default(Triple::UnknownOS);
} }
Context not available.
case llvm::Triple::spir: case llvm::Triple::spir:
case llvm::Triple::kalimba: case llvm::Triple::kalimba:
case llvm::Triple::shave: case llvm::Triple::shave:
case llvm::Triple::wasm32:
return 32; return 32;
case llvm::Triple::aarch64: case llvm::Triple::aarch64:
Context not available.
case llvm::Triple::amdil64: case llvm::Triple::amdil64:
case llvm::Triple::hsail64: case llvm::Triple::hsail64:
case llvm::Triple::spir64: case llvm::Triple::spir64:
case llvm::Triple::wasm64:
return 64; return 64;
} }
llvm_unreachable("Invalid architecture value"); llvm_unreachable("Invalid architecture value");
Context not available.
case Triple::x86: case Triple::x86:
case Triple::xcore: case Triple::xcore:
case Triple::shave: case Triple::shave:
case Triple::wasm32:
// Already 32-bit. // Already 32-bit.
break; break;
Context not available.
case Triple::amdil64: T.setArch(Triple::amdil); break; case Triple::amdil64: T.setArch(Triple::amdil); break;
case Triple::hsail64: T.setArch(Triple::hsail); break; case Triple::hsail64: T.setArch(Triple::hsail); break;
case Triple::spir64: T.setArch(Triple::spir); break; case Triple::spir64: T.setArch(Triple::spir); break;
case Triple::wasm64: T.setArch(Triple::wasm32); break;
} }
return T; return T;
} }
Context not available.
case Triple::sparcv9: case Triple::sparcv9:
case Triple::systemz: case Triple::systemz:
case Triple::x86_64: case Triple::x86_64:
case Triple::wasm64:
// Already 64-bit. // Already 64-bit.
break; break;
Context not available.
case Triple::amdil: T.setArch(Triple::amdil64); break; case Triple::amdil: T.setArch(Triple::amdil64); break;
case Triple::hsail: T.setArch(Triple::hsail64); break; case Triple::hsail: T.setArch(Triple::hsail64); break;
case Triple::spir: T.setArch(Triple::spir64); break; case Triple::spir: T.setArch(Triple::spir64); break;
case Triple::wasm32: T.setArch(Triple::wasm64); break;
} }
return T; return T;
} }
Context not available.

lib/Target/LLVMBuild.txt

Context not available.
PowerPC PowerPC
Sparc Sparc
SystemZ SystemZ
WebAssembly
X86 X86
XCore XCore
Context not available.

lib/Target/WebAssembly/CMakeLists.txt

set(LLVM_TARGET_DEFINITIONS WebAssembly.td)
tablegen(LLVM WebAssemblyGenMCCodeEmitter.inc -gen-emitter)
tablegen(LLVM WebAssemblyGenSubtargetInfo.inc -gen-subtarget)
add_public_tablegen_target(WebAssemblyCommonTableGen)
add_llvm_target(WebAssemblyCodeGen
WebAssemblyFrameLowering.cpp
WebAssemblyInstrInfo.cpp
WebAssemblyISelDAGToDAG.cpp
WebAssemblyISelLowering.cpp
WebAssemblyMachineFunctionInfo.cpp
WebAssemblyRegisterInfo.cpp
WebAssemblySelectionDAGInfo.cpp
WebAssemblySubtarget.cpp
WebAssemblyTargetMachine.cpp
WebAssemblyTargetTransformInfo.cpp
)
add_dependencies(LLVMWebAssemblyCodeGen intrinsics_gen)
add_subdirectory(InstPrinter)
add_subdirectory(TargetInfo)
add_subdirectory(MCTargetDesc)

lib/Target/WebAssembly/InstPrinter/CMakeLists.txt

add_llvm_library(LLVMWebAssemblyAsmPrinter
WebAssemblyInstPrinter.cpp
)

lib/Target/WebAssembly/InstPrinter/LLVMBuild.txt

;===- ./lib/Target/WebAssembly/InstPrinter/LLVMBuild.txt -------*- Conf -*--===;
;
; The LLVM Compiler Infrastructure
;
; This file is distributed under the University of Illinois Open Source
; License. See LICENSE.TXT for details.
;
;===------------------------------------------------------------------------===;
;
; This is an LLVMBuild description file for the components in this subdirectory.
;
; For more information on the LLVMBuild system, please see:
;
; http://llvm.org/docs/LLVMBuild.html
;
;===------------------------------------------------------------------------===;
[component_0]
type = Library
name = WebAssemblyAsmPrinter
parent = WebAssembly
required_libraries = MC Support
add_to_library_groups = WebAssembly

lib/Target/WebAssembly/InstPrinter/Makefile

##===- lib/Target/WebAssembly/AsmPrinter/Makefile ----------*- Makefile -*-===##
#
# The LLVM Compiler Infrastructure
#
# This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##
LEVEL = ../../../..
LIBRARYNAME = LLVMWebAssemblyAsmPrinter
# Hack: we need to include 'main' wasm target directory to grab private headers
CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
include $(LEVEL)/Makefile.common

lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.h

// WebAssemblyInstPrinter.h - Print wasm MCInst to assembly syntax -*- C++ -*-//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This class prints an WebAssembly MCInst to wasm file syntax.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_INSTPRINTER_WEBASSEMBLYINSTPRINTER_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_INSTPRINTER_WEBASSEMBLYINSTPRINTER_H
#include "llvm/MC/MCInstPrinter.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
class MCOperand;
class MCSubtargetInfo;
class WebAssemblyInstPrinter : public MCInstPrinter {
public:
WebAssemblyInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
const MCRegisterInfo &MRI);
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
const MCSubtargetInfo &STI) override;
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI, raw_ostream &O);
static const char *getRegisterName(unsigned RegNo);
// End
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp

//=- WebAssemblyInstPrinter.cpp - WebAssembly assembly instruction printing -=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// Print MCInst instructions to wasm format.
//
//===----------------------------------------------------------------------===//
#include "InstPrinter/WebAssemblyInstPrinter.h"
#include "WebAssembly.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h"
#include <cctype>
using namespace llvm;
#define DEBUG_TYPE "asm-printer"
#include "WebAssemblyGenAsmWriter.inc"
WebAssemblyInstPrinter::WebAssemblyInstPrinter(const MCAsmInfo &MAI,
const MCInstrInfo &MII,
const MCRegisterInfo &MRI)
: MCInstPrinter(MAI, MII, MRI) {}
void WebAssemblyInstPrinter::printRegName(raw_ostream &OS,
unsigned RegNo) const {
jfbUnsubmitted
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report_fatal_error instead, here and below?

jfb: `report_fatal_error` instead, here and below?
sunfishAuthorUnsubmitted
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This code is totally unusable without this function, so it doesn't really matter. Crashing is better because we get a stack trace to where we need to write code.

sunfish: This code is totally unusable without this function, so it doesn't really matter. Crashing is…
jfbUnsubmitted
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llvm_unreachable will only crash in debug, though?

jfb: `llvm_unreachable` will only crash in debug, though?
OS << markup("<reg:") << '%' << getRegisterName(RegNo) << markup(">");
}
void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
StringRef Annot,
const MCSubtargetInfo &STI) {
printInstruction(MI, OS);
// Next always print the annotation.
printAnnotation(OS, Annot);
}

lib/Target/WebAssembly/LLVMBuild.txt

;===- ./lib/Target/WebAssembly/LLVMBuild.txt -------------------*- Conf -*--===;
;
; The LLVM Compiler Infrastructure
;
; This file is distributed under the University of Illinois Open Source
; License. See LICENSE.TXT for details.
;
;===------------------------------------------------------------------------===;
;
; This is an LLVMBuild description file for the components in this subdirectory.
;
; For more information on the LLVMBuild system, please see:
;
; http://llvm.org/docs/LLVMBuild.html
;
;===------------------------------------------------------------------------===;
[common]
subdirectories = InstPrinter MCTargetDesc TargetInfo
[component_0]
type = TargetGroup
name = WebAssembly
parent = Target
has_asmprinter = 1
[component_1]
type = Library
name = WebAssemblyCodeGen
parent = WebAssembly
required_libraries = Analysis AsmPrinter CodeGen Core MC Scalar SelectionDAG Support Target WebAssemblyDesc WebAssemblyInfo
add_to_library_groups = WebAssembly

lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt

add_llvm_library(LLVMWebAssemblyDesc
WebAssemblyMCAsmInfo.cpp
WebAssemblyMCTargetDesc.cpp
)

lib/Target/WebAssembly/MCTargetDesc/LLVMBuild.txt

;===- ./lib/Target/WebAssembly/MCTargetDesc/LLVMBuild.txt ------*- Conf -*--===;
;
; The LLVM Compiler Infrastructure
;
; This file is distributed under the University of Illinois Open Source
; License. See LICENSE.TXT for details.
;
;===------------------------------------------------------------------------===;
;
; This is an LLVMBuild description file for the components in this subdirectory.
;
; For more information on the LLVMBuild system, please see:
;
; http://llvm.org/docs/LLVMBuild.html
;
;===------------------------------------------------------------------------===;
[component_0]
type = Library
name = WebAssemblyDesc
parent = WebAssembly
required_libraries = MC Support WebAssemblyAsmPrinter WebAssemblyInfo
add_to_library_groups = WebAssembly

lib/Target/WebAssembly/MCTargetDesc/Makefile

##===- lib/Target/WebAssembly/TargetDesc/Makefile ----------*- Makefile -*-===##
#
# The LLVM Compiler Infrastructure
#
# This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##
LEVEL = ../../../..
LIBRARYNAME = LLVMWebAssemblyDesc
# Hack: we need to include 'main' target directory to grab private headers
CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
include $(LEVEL)/Makefile.common

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h

//===-- WebAssemblyMCAsmInfo.h - WebAssembly asm properties -----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file contains the declaration of the WebAssemblyMCAsmInfo class.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCASMINFO_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCASMINFO_H
#include "llvm/MC/MCAsmInfo.h"
namespace llvm {
class WebAssemblyMCAsmInfo final : public MCAsmInfo {
public:
WebAssemblyMCAsmInfo();
~WebAssemblyMCAsmInfo() override;
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp

//===-- WebAssemblyMCAsmInfo.cpp - WebAssembly asm properties -------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file contains the declarations of the WebAssemblyMCAsmInfo
/// properties.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyMCAsmInfo.h"
#include "llvm/Support/CommandLine.h"
using namespace llvm;
#define DEBUG_TYPE "wasm-mc-asm-info"
WebAssemblyMCAsmInfo::~WebAssemblyMCAsmInfo() {}
WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo() {
AlignmentIsInBytes = false;
jfbUnsubmitted
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PointerSize is 4 by default, we need to set it for wasm64.
CalleeSaveStackSlotSize doesn't seem relevant, so the 4 default is fine?

(a bunch of others have OK defaults)

MaxInstLength doesn't seem relevant? Default is 4, but we don't have inline asm that matters because we're doing an AST. Maybe comment?
Same for MinInstAlignment.

(a bunch of others have OK defaults)

Should we do anything about Code16Directive / Code32Directive / Code64Directive? They don't make sense for us, so default is OK.

(a bunch of others have OK defaults)

What about UseIntegratedAssembler?

jfb: `PointerSize` is 4 by default, we need to set it for `wasm64`. `CalleeSaveStackSlotSize`…
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Ok, I set PointerSize and CalleeSaveStackSlotSize. I added a comment for MaxInstLength. MinInstAlignment seems fine with the default for now. I think we're ok with the defaults for the .code directives (which we probably won't use). I added a comment for UseIntegratedAssembler.

sunfish: Ok, I set PointerSize and CalleeSaveStackSlotSize. I added a comment for MaxInstLength.
COMMDirectiveAlignmentIsInBytes = false;
jfbUnsubmitted
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It seems better to have .align be bytes? The historical confusion is annoying, so I'd just force people to use .balign and .p2align anyways, but I think in general folks expect .align to be bytes?

jfb: It seems better to have `.align` be bytes? The historical confusion is annoying, so I'd just…
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I'm all for forcing people to use .p2align/.balign; is that an option? Otherwise, looking at LLVM's other targets, making .align be .p2align seems fairly popular.

sunfish: I'm all for forcing people to use .p2align/.balign; is that an option? Otherwise, looking at…
jfbUnsubmitted
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I don't think it's an option... Asking folks around me they expect .balign behavior.

jfb: I don't think it's an option... Asking folks around me they expect `.balign` behavior.
LCOMMDirectiveAlignmentType = LCOMM::Log2Alignment;
SupportsDebugInformation = true;
UseDataRegionDirectives = true;
jfbUnsubmitted
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Move this up, so it's in the same order as declared in the struct.

jfb: Move this up, so it's in the same order as declared in the struct.
sunfishAuthorUnsubmitted
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Ok, sorted.

sunfish: Ok, sorted.
// For now, WebAssembly does not support exceptions.
ExceptionsType = ExceptionHandling::None;
PrivateGlobalPrefix = ".L";
PrivateLabelPrefix = ".L";
HasDotTypeDotSizeDirective = false;
jfbUnsubmitted
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The defaults are "L", which is the dot needed?

jfb: The defaults are `"L"`, which is the dot needed?
sunfishAuthorUnsubmitted
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"L" as a symbol prefix is an ugly name mangling because it requires all C symbols be mangled too (since 'L' is a valid C identifier character). I've now changed this to be "", and we can plan to use directives to set symbol visibilities rather than prefixes.

sunfish: "L" as a symbol prefix is an ugly name mangling because it requires all C symbols be mangled…
HasSingleParameterDotFile = false;
Data8bitsDirective = "\t.int8\t";
Data16bitsDirective = "\t.int16\t";
Data32bitsDirective = "\t.int32\t";
Data64bitsDirective = "\t.int64\t";
}

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

//==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file provides WebAssembly-specific target descriptions.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
#include "llvm/Support/DataTypes.h"
#include <string>
namespace llvm {
class formatted_raw_ostream;
class MCAsmBackend;
class MCCodeEmitter;
class MCContext;
class MCInstrInfo;
class MCRegisterInfo;
class MCObjectWriter;
class MCStreamer;
class MCSubtargetInfo;
class MCTargetStreamer;
class StringRef;
class Target;
class Triple;
class raw_ostream;
extern Target TheWebAssemblyTarget;
MCAsmBackend *createWebAssemblyAsmBackend(const Target &T,
const MCRegisterInfo &MRI,
StringRef TT, StringRef CPU);
} // end namespace llvm
// Defines symbolic names for WebAssembly registers. This defines a mapping from
// register name to register number.
//
#define GET_SUBTARGETINFO_ENUM
#include "WebAssemblyGenSubtargetInfo.inc"
#endif

lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp

//===-- WebAssemblyMCTargetDesc.cpp - WebAssembly Target Descriptions -----===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file provides WebAssembly-specific target descriptions.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyMCTargetDesc.h"
#include "InstPrinter/WebAssemblyInstPrinter.h"
#include "WebAssemblyMCAsmInfo.h"
#include "llvm/MC/MCCodeGenInfo.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
#define DEBUG_TYPE "wasm-mc-target-desc"
#define GET_SUBTARGETINFO_MC_DESC
#include "WebAssemblyGenSubtargetInfo.inc"
static MCAsmInfo *createWebAssemblyMCAsmInfo(const MCRegisterInfo &MRI,
const Triple &TT) {
MCAsmInfo *MAI = new WebAssemblyMCAsmInfo();
return MAI;
}
static MCCodeGenInfo *createWebAssemblyMCCodeGenInfo(StringRef TT,
Reloc::Model RM,
CodeModel::Model CM,
CodeGenOpt::Level OL) {
Triple TheTriple(TT);
// TODO: Yummy code models
if (CM == CodeModel::Default)
CM = CodeModel::Small;
// The default MCJIT memory managers make no guarantees about where they can
// find an executable page; JITed code needs to be able to refer to globals
// no matter how far away they are.
else if (CM == CodeModel::JITDefault)
CM = CodeModel::Large;
else if (CM != CodeModel::Small && CM != CodeModel::Large)
report_fatal_error(
"Only small and large code models are allowed on WebAssembly");
// TODO: Yummy relocation models
if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC)
RM = Reloc::Static;
MCCodeGenInfo *X = new MCCodeGenInfo();
X->initMCCodeGenInfo(RM, CM, OL);
return X;
}
static MCInstPrinter *
createWebAssemblyMCInstPrinter(const Triple &T, unsigned SyntaxVariant,
const MCAsmInfo &MAI, const MCInstrInfo &MII,
const MCRegisterInfo &MRI) {
if (SyntaxVariant == 0 || SyntaxVariant == 1)
return new WebAssemblyInstPrinter(MAI, MII, MRI);
return nullptr;
}
// Force static initialization.
extern "C" void LLVMInitializeWebAssemblyTargetMC() {
for (Target *T : {&TheWebAssemblyTarget}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createWebAssemblyMCAsmInfo);
// Register the MC codegen info.
TargetRegistry::RegisterMCCodeGenInfo(*T, createWebAssemblyMCCodeGenInfo);
// Register the MCInstPrinter.
TargetRegistry::RegisterMCInstPrinter(*T, createWebAssemblyMCInstPrinter);
}
}

lib/Target/WebAssembly/Makefile

##===- lib/Target/WebAssembly/Makefile ---------------------*- Makefile -*-===##
#
# The LLVM Compiler Infrastructure
#
# This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##
LEVEL = ../../..
LIBRARYNAME = LLVMWebAssemblyCodeGen
TARGET = WebAssembly
# Make sure that tblgen is run, first thing.
BUILT_SOURCES = WebAssemblyGenSubtargetInfo.inc WebAssemblyGenMCCodeEmitter.inc
DIRS = InstPrinter TargetInfo MCTargetDesc
include $(LEVEL)/Makefile.common

lib/Target/WebAssembly/README.txt

//===-- README.txt - Notes for WebAssembly code gen -----------------------===//
This WebAssembly backend is presently in a very early stage of development.
The code should build and not break anything else, but don't expect a lot more
at this point.
For more information on WebAssembly itself, see the design documents:
* https://github.com/WebAssembly/design/blob/master/README.md
The following documents contain some information on the planned semantics and
binary encoding of WebAssembly itself:
* https://github.com/WebAssembly/design/blob/master/AstSemantics.md
* https://github.com/WebAssembly/design/blob/master/BinaryEncoding.md
//===---------------------------------------------------------------------===//

lib/Target/WebAssembly/TargetInfo/CMakeLists.txt

include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. )
add_llvm_library(LLVMWebAssemblyInfo
WebAssemblyTargetInfo.cpp
)
add_dependencies(LLVMWebAssemblyInfo WebAssemblyCommonTableGen)

lib/Target/WebAssembly/TargetInfo/LLVMBuild.txt

;===- ./lib/Target/WebAssembly/TargetInfo/LLVMBuild.txt --------*- Conf -*--===;
;
; The LLVM Compiler Infrastructure
;
; This file is distributed under the University of Illinois Open Source
; License. See LICENSE.TXT for details.
;
;===------------------------------------------------------------------------===;
;
; This is an LLVMBuild description file for the components in this subdirectory.
;
; For more information on the LLVMBuild system, please see:
;
; http://llvm.org/docs/LLVMBuild.html
;
;===------------------------------------------------------------------------===;
[component_0]
type = Library
name = WebAssemblyInfo
parent = WebAssembly
required_libraries = Support
add_to_library_groups = WebAssembly

lib/Target/WebAssembly/TargetInfo/Makefile

##===- lib/Target/WebAssembly/TargetInfo/Makefile ----------*- Makefile -*-===##
#
# The LLVM Compiler Infrastructure
#
# This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##
LEVEL = ../../../..
LIBRARYNAME = LLVMWebAssemblyInfo
# Hack: we need to include 'main' target directory to grab private headers
CPPFLAGS = -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
include $(LEVEL)/Makefile.common

lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp

//===-- WebAssemblyTargetInfo.cpp - WebAssembly Target Implementation -----===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file registers the WebAssembly target.
///
//===----------------------------------------------------------------------===//
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "llvm/ADT/Triple.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
#define DEBUG_TYPE "wasm-target-info"
Target llvm::TheWebAssemblyTarget;
extern "C" void LLVMInitializeWebAssemblyTargetInfo() {
RegisterTarget<Triple::wasm32> X(TheWebAssemblyTarget, "wasm32",
"WebAssembly 32-bit");
RegisterTarget<Triple::wasm64> Y(TheWebAssemblyTarget, "wasm64",
"WebAssembly 64-bit");
}
jfbUnsubmitted
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add "(little endian)" to the description.

jfb: add "(little endian)" to the description.
sunfishAuthorUnsubmitted
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Other targets that don't have big-endian variants don't do this.

sunfish: Other targets that don't have big-endian variants don't do this.

lib/Target/WebAssembly/WebAssembly.h

//===-- WebAssembly.h - Top-level interface for WebAssembly ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file contains the entry points for global functions defined in
/// the LLVM WebAssembly back-end.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLY_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLY_H
#include "llvm/Support/CodeGen.h"
namespace llvm {
class WebAssemblyTargetMachine;
class FunctionPass;
FunctionPass *createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
CodeGenOpt::Level OptLevel);
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssembly.td

//- WebAssembly.td - Describe the WebAssembly Target Machine --*- tablegen -*-//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This is a target description file for the WebAssembly architecture, which is
// also known as "wasm".
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Target-independent interfaces which we are implementing
//===----------------------------------------------------------------------===//
include "llvm/Target/Target.td"
//===----------------------------------------------------------------------===//
// WebAssembly Subtarget features.
//===----------------------------------------------------------------------===//
def FeatureSIMD : SubtargetFeature<"simd", "HasSIMD", "true",
"Enable SIMD">;
//===----------------------------------------------------------------------===//
// Architectures.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Register File Description
//===----------------------------------------------------------------------===//
include "WebAssemblyRegisterInfo.td"
//===----------------------------------------------------------------------===//
// Instruction Descriptions
//===----------------------------------------------------------------------===//
include "WebAssemblyInstrInfo.td"
def WebAssemblyInstrInfo : InstrInfo;
//===----------------------------------------------------------------------===//
// WebAssembly Processors supported.
//===----------------------------------------------------------------------===//
def : ProcessorModel<"generic", NoSchedModel, [FeatureSIMD]>;
//===----------------------------------------------------------------------===//
// Target Declaration
//===----------------------------------------------------------------------===//
def WebAssembly : Target {
let InstructionSet = WebAssemblyInstrInfo;
}

lib/Target/WebAssembly/WebAssemblyFrameLowering.h

// WebAssemblyFrameLowering.h - TargetFrameLowering for WebAssembly -*- C++ -*-/
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This class implements WebAssembly-specific bits of
jfbUnsubmitted
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CodingStandards.rst does say that \file and \brief should be in every file header. If we're trying to be on top of the standard then other files should also have this (it looks like you followed the local convention per-file, instead of blindly doing all-doxygen).

jfb: CodingStandards.rst does say that `\file` and `\brief` should be in every file header. If we're…
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I missed adding \file and \brief in InstPrinter/*. Fixed now.

sunfish: I missed adding \file and \brief in InstPrinter/*. Fixed now.
/// TargetFrameLowering class.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYFRAMELOWERING_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYFRAMELOWERING_H
#include "llvm/Target/TargetFrameLowering.h"
namespace llvm {
class WebAssemblyFrameLowering final : public TargetFrameLowering {
public:
WebAssemblyFrameLowering()
: TargetFrameLowering(StackGrowsDown, /*StackAlignment=*/16,
/*LocalAreaOffset=*/0,
/*TransientStackAlignment=*/16,
/*StackRealignable=*/true) {}
void
jfbUnsubmitted
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Could you add a FIXME to implement assignCalleeSavedSpillSlots and getCalleeSavedSpillSlots? It looks like it's something we'll eventually want.

jfb: Could you add a FIXME to implement `assignCalleeSavedSpillSlots` and `getCalleeSavedSpillSlots`?
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It's not clear yet whether we'll use the code that uses these. We can add them later if we need them.

sunfish: It's not clear yet whether we'll use the code that uses these. We can add them later if we need…
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const override;
/// These methods insert prolog and epilog code into the function.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
bool hasFP(const MachineFunction &MF) const override;
bool hasReservedCallFrame(const MachineFunction &MF) const override;
void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS) const override;
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp

//===-- WebAssemblyFrameLowering.cpp - WebAssembly Frame Lowering ----------==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file contains the WebAssembly implementation of
/// TargetFrameLowering class.
///
/// On WebAssembly, there aren't a lot of things to do here. There are no
/// callee-saved registers to save, and no spill slots.
///
/// The stack grows downward.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyFrameLowering.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssemblyInstrInfo.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "WebAssemblySubtarget.h"
#include "WebAssemblyTargetMachine.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Debug.h"
using namespace llvm;
#define DEBUG_TYPE "frame-info"
// TODO: Implement a red zone?
/// Return true if the specified function should have a dedicated frame pointer
/// register.
bool WebAssemblyFrameLowering::hasFP(const MachineFunction &MF) const {
llvm_unreachable("TODO: implement hasFP");
}
jfbUnsubmitted
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return_fatal_error in this file too.

jfb: `return_fatal_error` in this file too.
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As above. Nothing works if this doesn't work.

sunfish: As above. Nothing works if this doesn't work.
/// Under normal circumstances, when a frame pointer is not required, we reserve
/// argument space for call sites in the function immediately on entry to the
/// current function. This eliminates the need for add/sub sp brackets around
/// call sites. Returns true if the call frame is included as part of the stack
/// frame.
bool WebAssemblyFrameLowering::hasReservedCallFrame(
const MachineFunction &MF) const {
return !MF.getFrameInfo()->hasVarSizedObjects();
}
void WebAssemblyFrameLowering::eliminateCallFramePseudoInstr(
MachineFunction &MF, MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const {
llvm_unreachable("TODO: implement eliminateCallFramePseudoInstr");
}
void WebAssemblyFrameLowering::emitPrologue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
llvm_unreachable("TODO: implement emitPrologue");
}
void WebAssemblyFrameLowering::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
llvm_unreachable("TODO: implement emitEpilogue");
}
void WebAssemblyFrameLowering::processFunctionBeforeCalleeSavedScan(
MachineFunction &MF, RegScavenger *RS) const {
llvm_unreachable("TODO: implement processFunctionBeforeCalleeSavedScan");
}

lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp

//- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file defines an instruction selector for the WebAssembly target.
///
//===----------------------------------------------------------------------===//
#include "WebAssembly.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssemblyTargetMachine.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/IR/Function.h" // To access function attributes.
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
#define DEBUG_TYPE "wasm-isel"
//===--------------------------------------------------------------------===//
/// WebAssembly-specific code to select WebAssembly machine instructions for
/// SelectionDAG operations.
///
namespace {
class WebAssemblyDAGToDAGISel final : public SelectionDAGISel {
/// Keep a pointer to the WebAssemblySubtarget around so that we can make the
/// right decision when generating code for different targets.
const WebAssemblySubtarget *Subtarget;
bool ForCodeSize;
jfbUnsubmitted
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OptimizeForSize instead?

jfb: `OptimizeForSize` instead?
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ForCodeSize is the name used in a few other places in LLVM. It's not just OptimizeForSize but also MinSize.

sunfish: ForCodeSize is the name used in a few other places in LLVM. It's not just OptimizeForSize but…
public:
WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &tm,
CodeGenOpt::Level OptLevel)
: SelectionDAGISel(tm, OptLevel), Subtarget(nullptr), ForCodeSize(false) {
}
const char *getPassName() const override {
return "WebAssembly Instruction Selection";
}
bool runOnMachineFunction(MachineFunction &MF) override {
ForCodeSize =
MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize) ||
MF.getFunction()->hasFnAttribute(Attribute::MinSize);
Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
return SelectionDAGISel::runOnMachineFunction(MF);
}
SDNode *Select(SDNode *Node) override;
// Include the pieces autogenerated from the target description.
#include "WebAssemblyGenDAGISel.inc"
private:
// add select functions here...
};
} // end anonymous namespace
SDNode *WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
// Dump information about the Node being selected
DEBUG(errs() << "Selecting: ");
DEBUG(Node->dump(CurDAG));
DEBUG(errs() << "\n");
// If we have a custom node, we already have selected!
if (Node->isMachineOpcode()) {
DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
Node->setNodeId(-1);
return nullptr;
}
// Few custom selection stuff.
SDNode *ResNode = nullptr;
EVT VT = Node->getValueType(0);
// add target-specific selects here...
(void)VT;
switch (Node->getOpcode()) {
default:
break;
}
// Select the default instruction
ResNode = SelectCode(Node);
DEBUG(errs() << "=> ");
if (ResNode == nullptr || ResNode == Node)
DEBUG(Node->dump(CurDAG));
else
DEBUG(ResNode->dump(CurDAG));
DEBUG(errs() << "\n");
return ResNode;
}
/// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready
/// for instruction scheduling.
FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
CodeGenOpt::Level OptLevel) {
return new WebAssemblyDAGToDAGISel(TM, OptLevel);
}

lib/Target/WebAssembly/WebAssemblyISelLowering.h

//- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file defines the interfaces that WebAssembly uses to lower LLVM
/// code into a selection DAG.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
#include "llvm/Target/TargetLowering.h"
namespace llvm {
namespace WebAssemblyISD {
enum {
FIRST_NUMBER = ISD::BUILTIN_OP_END,
// add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
};
} // end namespace WebAssemblyISD
class WebAssemblySubtarget;
class WebAssemblyTargetMachine;
class WebAssemblyTargetLowering final : public TargetLowering {
public:
WebAssemblyTargetLowering(const TargetMachine &TM,
const WebAssemblySubtarget &STI);
private:
/// Keep a pointer to the WebAssemblySubtarget around so that we can make the
/// right decision when generating code for different targets.
const WebAssemblySubtarget *Subtarget;
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

//=- WebAssemblyISelLowering.cpp - WebAssembly DAG Lowering Implementation -==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file implements the WebAssemblyTargetLowering class.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyISelLowering.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "WebAssemblySubtarget.h"
#include "WebAssemblyTargetMachine.h"
#include "WebAssemblyTargetObjectFile.h"
#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
#define DEBUG_TYPE "wasm-lower"
WebAssemblyTargetLowering::WebAssemblyTargetLowering(
const TargetMachine &TM, const WebAssemblySubtarget &STI)
: TargetLowering(TM), Subtarget(&STI) {}
//===----------------------------------------------------------------------===//
// WebAssembly Lowering private implementation.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Lowering Code
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Other Lowering Code
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// WebAssembly Optimization Hooks
//===----------------------------------------------------------------------===//
MCSection *WebAssemblyTargetObjectFile::SelectSectionForGlobal(
const GlobalValue *GV, SectionKind Kind, Mangler &Mang,
const TargetMachine &TM) const {
return getDataSection();
}

lib/Target/WebAssembly/WebAssemblyInstrAtomics.td

// WebAssemblyInstrAtomics.td-WebAssembly Atomic codegen support-*- tablegen -*-
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// WebAssembly Atomic operand code-gen constructs.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Atomic fences
//===----------------------------------------------------------------------===//
// TODO: add atomic fences here...
//===----------------------------------------------------------------------===//
// Atomic loads
//===----------------------------------------------------------------------===//
// TODO: add atomic loads here...
//===----------------------------------------------------------------------===//
// Atomic stores
//===----------------------------------------------------------------------===//
// TODO: add atomic stores here...
//===----------------------------------------------------------------------===//
// Low-level exclusive operations
//===----------------------------------------------------------------------===//
// TODO: add exclusive operations here...
// Load-exclusives.
// Load-exclusives.
jfbUnsubmitted
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Redundant.

jfb: Redundant.
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Fixed.

sunfish: Fixed.
// Store-exclusives.
// Store-release-exclusives.
// And clear exclusive.

lib/Target/WebAssembly/WebAssemblyInstrFormats.td

// WebAssemblyInstrFormats.td - WebAssembly Instruction Formats -*- tblgen -*-//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// WebAssembly instruction format definitions.
//
//===----------------------------------------------------------------------===//
// WebAssembly Instruction Format
class WebAssemblyInst<string cstr> : Instruction {
field bits<0> Inst; // Instruction encoding.
let Namespace = "WebAssembly";
let Pattern = [];
let Constraints = cstr;
}
// Normal instructions
class I<dag oops, dag iops, list<dag> pattern, string cstr = "">
: WebAssemblyInst<cstr> {
dag OutOperandList = oops;
dag InOperandList = iops;
let Pattern = pattern;
}

lib/Target/WebAssembly/WebAssemblyInstrInfo.h

//=- WebAssemblyInstrInfo.h - WebAssembly Instruction Information -*- C++ -*-=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file contains the WebAssembly implementation of the
/// TargetInstrInfo class.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
#include "WebAssemblyRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
namespace llvm {
class WebAssemblySubtarget;
class WebAssemblyInstrInfo final {
const WebAssemblyRegisterInfo RI;
public:
explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI);
const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; }
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp

//===-- WebAssemblyInstrInfo.cpp - WebAssembly Instruction Information ----===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file contains the WebAssembly implementation of the
/// TargetInstrInfo class.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyInstrInfo.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssemblySubtarget.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
using namespace llvm;
#define DEBUG_TYPE "wasm-instr-info"
WebAssemblyInstrInfo::WebAssemblyInstrInfo(const WebAssemblySubtarget &STI)
: RI(STI.getTargetTriple()) {}

lib/Target/WebAssembly/WebAssemblyInstrInfo.td

// WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*-
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// WebAssembly Instruction definitions.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// WebAssembly Instruction Predicate Definitions.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// WebAssembly-specific DAG Node Types.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// WebAssembly-specific DAG Nodes.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// WebAssembly-specific Operands.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// WebAssembly Instruction Format Definitions.
//===----------------------------------------------------------------------===//
include "WebAssemblyInstrFormats.td"
//===----------------------------------------------------------------------===//
// Additional sets of instructions.
//===----------------------------------------------------------------------===//
include "WebAssemblyInstrAtomics.td"
include "WebAssemblyInstrSIMD.td"

lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

// WebAssemblyInstrSIMD.td - WebAssembly SIMD codegen support -*- tablegen -*-//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// WebAssembly SIMD operand code-gen constructs.
//
//===----------------------------------------------------------------------===//
// TODO: Implement SIMD instructions.
// Note: use Requires<[HasSIMD]>.

lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h

// WebAssemblyMachineFuctionInfo.h-WebAssembly machine function info -*- C++ -*-
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file declares WebAssembly-specific per-machine-function
/// information.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
#include "WebAssemblyRegisterInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
namespace llvm {
/// This class is derived from MachineFunctionInfo and contains private
/// WebAssembly-specific information for each MachineFunction.
class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
MachineFunction &MF;
public:
explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {}
~WebAssemblyFunctionInfo() override;
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp

//=- WebAssemblyMachineFunctionInfo.cpp - WebAssembly Machine Function Info -=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file implements WebAssembly-specific per-machine-function
/// information.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyMachineFunctionInfo.h"
using namespace llvm;
WebAssemblyFunctionInfo::~WebAssemblyFunctionInfo() {}

lib/Target/WebAssembly/WebAssemblyRegisterInfo.h

// WebAssemblyRegisterInfo.h - WebAssembly Register Information Impl -*- C++ -*-
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file contains the WebAssembly implementation of the
/// WebAssemblyRegisterInfo class.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYREGISTERINFO_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYREGISTERINFO_H
namespace llvm {
class MachineFunction;
class RegScavenger;
class TargetRegisterClass;
class Triple;
class WebAssemblyRegisterInfo final {
private:
const Triple &TT;
jfbUnsubmitted
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No need for private: here.

jfb: No need for `private:` here.
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Fixed.

sunfish: Fixed.
public:
explicit WebAssemblyRegisterInfo(const Triple &TT);
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp

//===-- WebAssemblyRegisterInfo.cpp - WebAssembly Register Information ----===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file contains the WebAssembly implementation of the
/// TargetRegisterInfo class.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyRegisterInfo.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssemblyFrameLowering.h"
#include "WebAssemblyInstrInfo.h"
#include "WebAssemblyMachineFunctionInfo.h"
#include "WebAssemblySubtarget.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
#define DEBUG_TYPE "wasm-reg-info"
WebAssemblyRegisterInfo::WebAssemblyRegisterInfo(const Triple &TT) : TT(TT) {}

lib/Target/WebAssembly/WebAssemblyRegisterInfo.td

//WebAssemblyRegisterInfo.td-Describe the WebAssembly Registers -*- tablegen -*-
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file describes the WebAssembly register classes and some nominal
// physical registers.
//
//===----------------------------------------------------------------------===//
class WebAssemblyReg<string n> : Register<n> {
let Namespace = "WebAssembly";
}
class WebAssemblyRegClass<list<ValueType> regTypes, int alignment, dag regList>
: RegisterClass<"WebAssembly", regTypes, alignment, regList>;
//===----------------------------------------------------------------------===//
// Registers
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Register classes
//===----------------------------------------------------------------------===//

lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h

//=- WebAssemblySelectionDAGInfo.h - WebAssembly SelectionDAG Info -*- C++ -*-//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file defines the WebAssembly subclass for
/// TargetSelectionDAGInfo.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSELECTIONDAGINFO_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSELECTIONDAGINFO_H
#include "llvm/Target/TargetSelectionDAGInfo.h"
namespace llvm {
class WebAssemblySelectionDAGInfo final : public TargetSelectionDAGInfo {
public:
explicit WebAssemblySelectionDAGInfo(const DataLayout *DL);
~WebAssemblySelectionDAGInfo() override;
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp

//===-- WebAssemblySelectionDAGInfo.cpp - WebAssembly SelectionDAG Info ---===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file implements the WebAssemblySelectionDAGInfo class.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyTargetMachine.h"
using namespace llvm;
#define DEBUG_TYPE "wasm-selectiondag-info"
WebAssemblySelectionDAGInfo::WebAssemblySelectionDAGInfo(const DataLayout *DL)
: TargetSelectionDAGInfo(DL) {}
WebAssemblySelectionDAGInfo::~WebAssemblySelectionDAGInfo() {}

lib/Target/WebAssembly/WebAssemblySubtarget.h

//=- WebAssemblySubtarget.h - Define Subtarget for the WebAssembly -*- C++ -*-//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file declares the WebAssembly-specific subclass of
/// TargetSubtarget.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
#include "WebAssemblyFrameLowering.h"
#include "WebAssemblyISelLowering.h"
#include "WebAssemblyInstrInfo.h"
#include "WebAssemblySelectionDAGInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <string>
#define GET_SUBTARGETINFO_HEADER
#include "WebAssemblyGenSubtargetInfo.inc"
namespace llvm {
class WebAssemblySubtarget final : public WebAssemblyGenSubtargetInfo {
bool HasSIMD;
/// String name of used CPU.
std::string CPUString;
/// What processor and OS we're targeting.
Triple TargetTriple;
WebAssemblyFrameLowering FrameLowering;
WebAssemblyInstrInfo InstrInfo;
WebAssemblySelectionDAGInfo TSInfo;
WebAssemblyTargetLowering TLInfo;
/// Initializes using CPUString and the passed in feature string so that we
/// can use initializer lists for subtarget initialization.
WebAssemblySubtarget &initializeSubtargetDependencies(StringRef FS);
public:
/// This constructor initializes the data members to match that
/// of the specified triple.
WebAssemblySubtarget(const Triple &TT, const std::string &CPU,
const std::string &FS, const TargetMachine &TM);
const WebAssemblySelectionDAGInfo *getSelectionDAGInfo() const override {
return &TSInfo;
}
const WebAssemblyFrameLowering *getFrameLowering() const override {
return &FrameLowering;
}
const WebAssemblyTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
const Triple &getTargetTriple() const { return TargetTriple; }
bool enableMachineScheduler() const override;
bool useAA() const override { return true; }
// Predicates used by WebAssemblyInstrInfo.td.
bool hasSIMD() const { return HasSIMD; }
/// Parses features string setting specified subtarget options. Definition of
/// function is auto generated by tblgen.
void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblySubtarget.cpp

//===-- WebAssemblySubtarget.cpp - WebAssembly Subtarget Information ------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file implements the WebAssembly-specific subclass of
/// TargetSubtarget.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyInstrInfo.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssemblySubtarget.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
#define DEBUG_TYPE "subtarget"
#define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_TARGET_DESC
#include "WebAssemblyGenSubtargetInfo.inc"
WebAssemblySubtarget &
WebAssemblySubtarget::initializeSubtargetDependencies(StringRef FS) {
// Determine default and user-specified characteristics
if (CPUString.empty())
CPUString = "generic";
ParseSubtargetFeatures(CPUString, FS);
return *this;
}
WebAssemblySubtarget::WebAssemblySubtarget(const Triple &TT,
const std::string &CPU,
const std::string &FS,
const TargetMachine &TM)
: WebAssemblyGenSubtargetInfo(TT, CPU, FS), HasSIMD(true), CPUString(CPU),
TargetTriple(TT), FrameLowering(),
InstrInfo(initializeSubtargetDependencies(FS)),
TSInfo(TM.getDataLayout()), TLInfo(TM, *this) {}
bool WebAssemblySubtarget::enableMachineScheduler() const { return true; }

lib/Target/WebAssembly/WebAssemblyTargetMachine.h

// WebAssemblyTargetMachine.h - Define TargetMachine for WebAssembly -*- C++ -*-
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file declares the WebAssembly-specific subclass of
/// TargetMachine.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETMACHINE_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETMACHINE_H
#include "WebAssemblySubtarget.h"
#include "llvm/Target/TargetMachine.h"
namespace llvm {
class WebAssemblyTargetMachine final : public LLVMTargetMachine {
std::unique_ptr<TargetLoweringObjectFile> TLOF;
mutable StringMap<std::unique_ptr<WebAssemblySubtarget>> SubtargetMap;
public:
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
~WebAssemblyTargetMachine() override;
const WebAssemblySubtarget *
getSubtargetImpl(const Function &F) const override;
// Pass Pipeline Configuration
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
TargetLoweringObjectFile *getObjFileLowering() const override {
return TLOF.get();
}
/// \brief Get the TargetIRAnalysis for this target.
TargetIRAnalysis getTargetIRAnalysis() override;
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp

//===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file defines the WebAssembly-specific subclass of TargetMachine.
///
//===----------------------------------------------------------------------===//
#include "WebAssembly.h"
#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
#include "WebAssemblyTargetMachine.h"
#include "WebAssemblyTargetObjectFile.h"
#include "WebAssemblyTargetTransformInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
#define DEBUG_TYPE "wasm"
extern "C" void LLVMInitializeWebAssemblyTarget() {
// Register the target.
RegisterTargetMachine<WebAssemblyTargetMachine> X(TheWebAssemblyTarget);
}
//===----------------------------------------------------------------------===//
// WebAssembly Lowering public interface.
//===----------------------------------------------------------------------===//
/// Create an WebAssembly architecture model.
///
WebAssemblyTargetMachine::WebAssemblyTargetMachine(
const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL)
: LLVMTargetMachine(T, TT.isArch64Bit()
? "e-p:64:64-i64:64-v128:8:128-n32:64-S128"
: "e-p:32:32-i64:64-v128:8:128-n32:64-S128",
TT, CPU, FS, Options, RM, CM, OL),
jfbUnsubmitted
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There doesn't seem to be a default mangling for datalayout, ELF seems like what we want: m:e.
These are the defaults, but would be nice to specify: f32:32-f64:64 ?

jfb: There doesn't seem to be a default mangling for datalayout, ELF seems like what we want: `m:e`.
sunfishAuthorUnsubmitted
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The default is MM_None, which is what I think we really want for now, unless we decide for sure we're using ELF.

I like leaving f32/f64 as defaults because it keeps the string shorter, and it makes it easier to see what the more interesting parts are.

sunfish: The default is MM_None, which is what I think we really want for now, unless we decide for sure…
TLOF(make_unique<WebAssemblyTargetObjectFile>()) {
initAsmInfo();
// We need a reducible CFG, so disable some optimizations which tend to
// introduce irreducibility.
setRequiresStructuredCFG(true);
}
WebAssemblyTargetMachine::~WebAssemblyTargetMachine() {}
const WebAssemblySubtarget *
WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
Attribute CPUAttr = F.getFnAttribute("target-cpu");
Attribute FSAttr = F.getFnAttribute("target-features");
std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
? CPUAttr.getValueAsString().str()
: TargetCPU;
std::string FS = !FSAttr.hasAttribute(Attribute::None)
? FSAttr.getValueAsString().str()
: TargetFS;
auto &I = SubtargetMap[CPU + FS];
if (!I) {
// This needs to be done before we create a new subtarget since any
// creation will depend on the TM and the code generation flags on the
// function that reside in TargetOptions.
resetTargetOptions(F);
I = make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
}
return I.get();
}
namespace {
/// WebAssembly Code Generator Pass Configuration Options.
class WebAssemblyPassConfig final : public TargetPassConfig {
public:
WebAssemblyPassConfig(WebAssemblyTargetMachine *TM, PassManagerBase &PM)
: TargetPassConfig(TM, PM) {}
WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
return getTM<WebAssemblyTargetMachine>();
}
FunctionPass *createTargetRegisterAllocator(bool) override;
void addFastRegAlloc(FunctionPass *RegAllocPass) override;
void addOptimizedRegAlloc(FunctionPass *RegAllocPass) override;
void addIRPasses() override;
bool addPreISel() override;
bool addInstSelector() override;
bool addILPOpts() override;
void addPreRegAlloc() override;
void addRegAllocPasses(bool Optimized);
void addPostRegAlloc() override;
void addPreSched2() override;
void addPreEmitPass() override;
};
} // end anonymous namespace
TargetIRAnalysis WebAssemblyTargetMachine::getTargetIRAnalysis() {
return TargetIRAnalysis([this](Function &F) {
return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
});
}
TargetPassConfig *
WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
return new WebAssemblyPassConfig(this, PM);
}
FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
return nullptr; // No reg alloc
}
void WebAssemblyPassConfig::addFastRegAlloc(FunctionPass *RegAllocPass) {
assert(!RegAllocPass && "WebAssembly uses no regalloc!");
addRegAllocPasses(false);
}
void WebAssemblyPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
assert(!RegAllocPass && "WebAssembly uses no regalloc!");
addRegAllocPasses(true);
}
//===----------------------------------------------------------------------===//
// The following functions are called from lib/CodeGen/Passes.cpp to modify
// the CodeGen pass sequence.
//===----------------------------------------------------------------------===//
void WebAssemblyPassConfig::addIRPasses() {
// Expand some atomic operations. WebAssemblyTargetLowering has hooks which
// control specifically what gets lowered.
addPass(createAtomicExpandPass(&getTM<WebAssemblyTargetMachine>()));
TargetPassConfig::addIRPasses();
}
bool WebAssemblyPassConfig::addPreISel() { return false; }
bool WebAssemblyPassConfig::addInstSelector() {
addPass(
createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
return false;
}
bool WebAssemblyPassConfig::addILPOpts() { return true; }
void WebAssemblyPassConfig::addPreRegAlloc() {}
void WebAssemblyPassConfig::addRegAllocPasses(bool Optimized) {}
void WebAssemblyPassConfig::addPostRegAlloc() {}
void WebAssemblyPassConfig::addPreSched2() {}
void WebAssemblyPassConfig::addPreEmitPass() {}

lib/Target/WebAssembly/WebAssemblyTargetObjectFile.h

//===-- WebAssemblyTargetObjectFile.h - WebAssembly Object Info -*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file declares the WebAssembly-specific subclass of
/// TargetLoweringObjectFile.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETOBJECTFILE_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETOBJECTFILE_H
#include "llvm/Target/TargetLoweringObjectFile.h"
namespace llvm {
class GlobalVariable;
class WebAssemblyTargetObjectFile final : public TargetLoweringObjectFile {
public:
WebAssemblyTargetObjectFile() {
TextSection = nullptr;
DataSection = nullptr;
BSSSection = nullptr;
ReadOnlySection = nullptr;
StaticCtorSection = nullptr;
StaticDtorSection = nullptr;
LSDASection = nullptr;
EHFrameSection = nullptr;
DwarfAbbrevSection = nullptr;
DwarfInfoSection = nullptr;
DwarfLineSection = nullptr;
DwarfFrameSection = nullptr;
DwarfPubTypesSection = nullptr;
DwarfDebugInlineSection = nullptr;
DwarfStrSection = nullptr;
DwarfLocSection = nullptr;
DwarfARangesSection = nullptr;
DwarfRangesSection = nullptr;
}
MCSection *getSectionForConstant(SectionKind Kind,
const Constant *C) const override {
return ReadOnlySection;
}
MCSection *getExplicitSectionGlobal(const GlobalValue *GV, SectionKind Kind,
Mangler &Mang,
const TargetMachine &TM) const override {
return DataSection;
}
MCSection *SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
Mangler &Mang,
const TargetMachine &TM) const override;
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h

//==- WebAssemblyTargetTransformInfo.h - WebAssembly-specific TTI -*- C++ -*-=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file a TargetTransformInfo::Concept conforming object specific
/// to the WebAssembly target machine.
///
/// It uses the target's detailed information to provide more precise answers to
/// certain TTI queries, while letting the target independent and default TTI
/// implementations handle the rest.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETTRANSFORMINFO_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETTRANSFORMINFO_H
#include "WebAssemblyTargetMachine.h"
#include "llvm/CodeGen/BasicTTIImpl.h"
#include <algorithm>
namespace llvm {
class WebAssemblyTTIImpl final : public BasicTTIImplBase<WebAssemblyTTIImpl> {
typedef BasicTTIImplBase<WebAssemblyTTIImpl> BaseT;
typedef TargetTransformInfo TTI;
friend BaseT;
const WebAssemblyTargetMachine *TM;
const WebAssemblySubtarget *ST;
const WebAssemblyTargetLowering *TLI;
const WebAssemblySubtarget *getST() const { return ST; }
const WebAssemblyTargetLowering *getTLI() const { return TLI; }
public:
WebAssemblyTTIImpl(const WebAssemblyTargetMachine *TM, Function &F)
: BaseT(TM), TM(TM), ST(TM->getSubtargetImpl(F)),
TLI(ST->getTargetLowering()) {}
// Provide value semantics. MSVC requires that we spell all of these out.
WebAssemblyTTIImpl(const WebAssemblyTTIImpl &Arg)
: BaseT(static_cast<const BaseT &>(Arg)), TM(Arg.TM), ST(Arg.ST),
TLI(Arg.TLI) {}
WebAssemblyTTIImpl(WebAssemblyTTIImpl &&Arg)
: BaseT(std::move(static_cast<BaseT &>(Arg))), TM(std::move(Arg.TM)),
ST(std::move(Arg.ST)), TLI(std::move(Arg.TLI)) {}
WebAssemblyTTIImpl &operator=(const WebAssemblyTTIImpl &RHS) {
BaseT::operator=(static_cast<const BaseT &>(RHS));
TM = RHS.TM;
ST = RHS.ST;
TLI = RHS.TLI;
return *this;
}
WebAssemblyTTIImpl &operator=(WebAssemblyTTIImpl &&RHS) {
BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
TM = std::move(RHS.TM);
ST = std::move(RHS.ST);
TLI = std::move(RHS.TLI);
return *this;
}
/// \name Scalar TTI Implementations
/// @{
// TODO: Implement more Scalar TTI for WebAssembly
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
/// @}
/// \name Vector TTI Implementations
/// @{
// TODO: Implement Vector TTI for WebAssembly
/// @}
};
} // end namespace llvm
#endif

lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp

//===-- WebAssemblyTargetTransformInfo.cpp - WebAssembly-specific TTI -----===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
///
/// \file
/// \brief This file defines the WebAssembly-specific TargetTransformInfo
/// implementation.
///
//===----------------------------------------------------------------------===//
#include "WebAssemblyTargetTransformInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/CostTable.h"
using namespace llvm;
#define DEBUG_TYPE "wasmtti"
TargetTransformInfo::PopcntSupportKind
WebAssemblyTTIImpl::getPopcntSupport(unsigned TyWidth) {
assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
// TODO: Make Math.popcount32 happen in WebAssembly.
return TTI::PSK_Software;
}

unittests/ADT/TripleTest.cpp

Context not available.
EXPECT_EQ(Triple::CloudABI, T.getOS()); EXPECT_EQ(Triple::CloudABI, T.getOS());
EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment()); EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
T = Triple("wasm32-unknown-wasm");
EXPECT_EQ(Triple::wasm32, T.getArch());
EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
EXPECT_EQ(Triple::WebAssembly, T.getOS());
EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
T = Triple("wasm64-unknown-wasm");
EXPECT_EQ(Triple::wasm64, T.getArch());
EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
EXPECT_EQ(Triple::WebAssembly, T.getOS());
EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
T = Triple("huh"); T = Triple("huh");
EXPECT_EQ(Triple::UnknownArch, T.getArch()); EXPECT_EQ(Triple::UnknownArch, T.getArch());
} }
Context not available.
EXPECT_FALSE(T.isArch16Bit()); EXPECT_FALSE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit()); EXPECT_FALSE(T.isArch32Bit());
EXPECT_TRUE(T.isArch64Bit()); EXPECT_TRUE(T.isArch64Bit());
T.setArch(Triple::wasm32);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_TRUE(T.isArch32Bit());
EXPECT_FALSE(T.isArch64Bit());
T.setArch(Triple::wasm64);
EXPECT_FALSE(T.isArch16Bit());
EXPECT_FALSE(T.isArch32Bit());
EXPECT_TRUE(T.isArch64Bit());
} }
TEST(TripleTest, BitWidthArchVariants) { TEST(TripleTest, BitWidthArchVariants) {
Context not available.
T.setArch(Triple::spir64); T.setArch(Triple::spir64);
EXPECT_EQ(Triple::spir, T.get32BitArchVariant().getArch()); EXPECT_EQ(Triple::spir, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::spir64, T.get64BitArchVariant().getArch()); EXPECT_EQ(Triple::spir64, T.get64BitArchVariant().getArch());
T.setArch(Triple::wasm32);
EXPECT_EQ(Triple::wasm32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::wasm64, T.get64BitArchVariant().getArch());
T.setArch(Triple::wasm64);
EXPECT_EQ(Triple::wasm32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::wasm64, T.get64BitArchVariant().getArch());
} }
TEST(TripleTest, getOSVersion) { TEST(TripleTest, getOSVersion) {
Context not available.