Patch to make AArch64 AsmParser be case insensitive about accepting vector register names

[rs]

Summary

The AArch64 AsmParser doesn't accept vector register names that start with an upper-case 'V'. GAS is case insensitive about these register names and so is armasm, this patch will make armclang behave the same way.

[rs]

Hi James,

Thanks for the review.

Thanks,
Ranjeet

From: James Molloy [mailto:[e-mail]]
Sent: 08 June 2015 22:25
To: [e-mail]; Ranjeet Singh
Cc: [e-mail]; [e-mail]
Subject: Re: [PATCH] Patch to make AArch64 AsmParser be case insensitive about accepting vector register names

Hi Ranjeet,

This looks good to me.

Cheers,

James

llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

 /// @name Auto-generated Match Functions
 /// {
 
 static unsigned MatchRegisterName(StringRef Name);
 
 /// }
 
 static unsigned matchVectorRegName(StringRef Name) {
-  return StringSwitch<unsigned>(Name)
+  return StringSwitch<unsigned>(Name.lower())
       .Case("v0", AArch64::Q0)
       .Case("v1", AArch64::Q1)
       .Case("v2", AArch64::Q2)
       .Case("v3", AArch64::Q3)
       .Case("v4", AArch64::Q4)
       .Case("v5", AArch64::Q5)
       .Case("v6", AArch64::Q6)
       .Case("v7", AArch64::Q7)

llvm/trunk/test/MC/AArch64/case-insen-reg-names.s

+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding < %s | FileCheck %s
+
+fadd v0.2d, v5.2d, v6.2d
+fadd V0.2d, V5.2d, V6.2d
+fadd v0.2d, V5.2d, v6.2d
+// CHECK: fadd v0.2d, v5.2d, v6.2d          // encoding: [0xa0,0xd4,0x66,0x4e]
+// CHECK: fadd v0.2d, v5.2d, v6.2d          // encoding: [0xa0,0xd4,0x66,0x4e]
+// CHECK: fadd v0.2d, v5.2d, v6.2d          // encoding: [0xa0,0xd4,0x66,0x4e]