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Differential D85723

[LoopUnroll] Adjust CostKind query
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Authored by samparker on Aug 11 2020, 5:28 AM.

Details

Reviewers
fhahn
dmgreen
dfukalov
mtrofin
ashlykov
Commits
rGea8448e3618a: [LoopUnroll] Adjust CostKind query
Summary

When TTI was updated to use an explicit cost, TCK_CodeSize was used although the default implicit cost would have been the hand-wavey cost of size and latency. So, revert back to this behaviour. This is not expected to have (much) impact on targets since most (all?) of them return the same value for SizeAndLatency and CodeSize.
When optimising for size, the logic has been changed to query CodeSize costs instead of SizeAndLatency.
This patch also adds a testing option in the unroller so that OptSize thresholds can be specified.

Diff Detail

Event Timeline

samparker created this revision.Aug 11 2020, 5:28 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 11 2020, 5:28 AM
Herald added subscribers: zzheng, hiraditya. · View Herald Transcript
samparker requested review of this revision.Aug 11 2020, 5:28 AM
samparker updated this revision to Diff 284686.Aug 11 2020, 6:22 AM

Added a few more tests.

Harbormaster completed remote builds in B67882: Diff 284672.Aug 11 2020, 6:31 AM
samparker edited the summary of this revision. (Show Details)Aug 11 2020, 6:38 AM
dmgreen accepted this revision.Aug 12 2020, 4:49 AM

Sounds like an improvement to me. Better than using TCK_CodeSize and the option is a nice addition.

This revision is now accepted and ready to land.Aug 12 2020, 4:49 AM
Closed by commit rGea8448e3618a: [LoopUnroll] Adjust CostKind query (authored by samparker). · Explain WhyAug 12 2020, 5:24 AM
This revision was automatically updated to reflect the committed changes.
samparker added a commit: rGea8448e3618a: [LoopUnroll] Adjust CostKind query.

Revision Contents

PathSize
llvm/
lib/
Target/
ARM/
3 lines
Transforms/
Scalar/
21 lines
test/
Transforms/
LoopUnroll/
ARM/
397 lines
174 lines

Diff 285049

llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp

Show First 20 Lines • Show All 1,751 Lines • ▼ Show 20 Lines for (auto &I : *BB) {
if (!isLoweredToCall(F)) if (!isLoweredToCall(F))
continue; continue;
} }
return; return;
} }
SmallVector<const Value*, 4> Operands(I.value_op_begin(), SmallVector<const Value*, 4> Operands(I.value_op_begin(),
I.value_op_end()); I.value_op_end());
Cost += getUserCost(&I, Operands, TargetTransformInfo::TCK_CodeSize); Cost +=
getUserCost(&I, Operands, TargetTransformInfo::TCK_SizeAndLatency);
} }
} }
LLVM_DEBUG(dbgs() << "Cost of loop: " << Cost << "\n"); LLVM_DEBUG(dbgs() << "Cost of loop: " << Cost << "\n");
UP.Partial = true; UP.Partial = true;
UP.Runtime = true; UP.Runtime = true;
UP.UpperBound = true; UP.UpperBound = true;
Show All 20 Lines

llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp

Show First 20 Lines • Show All 77 Lines • ▼ Show 20 Linescl::opt<bool> llvm::ForgetSCEVInLoopUnroll(
cl::desc("Forget everything in SCEV when doing LoopUnroll, instead of just" cl::desc("Forget everything in SCEV when doing LoopUnroll, instead of just"
" the current top-most loop. This is somtimes preferred to reduce" " the current top-most loop. This is somtimes preferred to reduce"
" compile time.")); " compile time."));
static cl::opt<unsigned> static cl::opt<unsigned>
UnrollThreshold("unroll-threshold", cl::Hidden, UnrollThreshold("unroll-threshold", cl::Hidden,
cl::desc("The cost threshold for loop unrolling")); cl::desc("The cost threshold for loop unrolling"));
static cl::opt<unsigned>
UnrollOptSizeThreshold(
"unroll-optsize-threshold", cl::init(0), cl::Hidden,
cl::desc("The cost threshold for loop unrolling when optimizing for "
"size"));
static cl::opt<unsigned> UnrollPartialThreshold( static cl::opt<unsigned> UnrollPartialThreshold(
"unroll-partial-threshold", cl::Hidden, "unroll-partial-threshold", cl::Hidden,
cl::desc("The cost threshold for partial loop unrolling")); cl::desc("The cost threshold for partial loop unrolling"));
static cl::opt<unsigned> UnrollMaxPercentThresholdBoost( static cl::opt<unsigned> UnrollMaxPercentThresholdBoost(
"unroll-max-percent-threshold-boost", cl::init(400), cl::Hidden, "unroll-max-percent-threshold-boost", cl::init(400), cl::Hidden,
cl::desc("The maximum 'boost' (represented as a percentage >= 100) applied " cl::desc("The maximum 'boost' (represented as a percentage >= 100) applied "
"to the threshold when aggressively unrolling a loop due to the " "to the threshold when aggressively unrolling a loop due to the "
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 LinesTargetTransformInfo::UnrollingPreferences llvm::gatherUnrollingPreferences(
Optional<bool> UserAllowPartial, Optional<bool> UserRuntime, Optional<bool> UserAllowPartial, Optional<bool> UserRuntime,
Optional<bool> UserUpperBound, Optional<unsigned> UserFullUnrollMaxCount) { Optional<bool> UserUpperBound, Optional<unsigned> UserFullUnrollMaxCount) {
TargetTransformInfo::UnrollingPreferences UP; TargetTransformInfo::UnrollingPreferences UP;
// Set up the defaults // Set up the defaults
UP.Threshold = UP.Threshold =
OptLevel > 2 ? UnrollThresholdAggressive : UnrollThresholdDefault; OptLevel > 2 ? UnrollThresholdAggressive : UnrollThresholdDefault;
UP.MaxPercentThresholdBoost = 400; UP.MaxPercentThresholdBoost = 400;
UP.OptSizeThreshold = 0; UP.OptSizeThreshold = UnrollOptSizeThreshold;
UP.PartialThreshold = 150; UP.PartialThreshold = 150;
UP.PartialOptSizeThreshold = 0; UP.PartialOptSizeThreshold = UnrollOptSizeThreshold;
UP.Count = 0; UP.Count = 0;
UP.DefaultUnrollRuntimeCount = 8; UP.DefaultUnrollRuntimeCount = 8;
UP.MaxCount = std::numeric_limits<unsigned>::max(); UP.MaxCount = std::numeric_limits<unsigned>::max();
UP.FullUnrollMaxCount = std::numeric_limits<unsigned>::max(); UP.FullUnrollMaxCount = std::numeric_limits<unsigned>::max();
UP.BEInsns = 2; UP.BEInsns = 2;
UP.Partial = false; UP.Partial = false;
UP.Runtime = false; UP.Runtime = false;
UP.AllowRemainder = true; UP.AllowRemainder = true;
▲ Show 20 Lines • Show All 174 Lines • ▼ Show 20 Linesstatic Optional<EstimatedUnrollCost> analyzeLoopUnrollCost(
SmallVector<Instruction *, 4> PHIUsedList; SmallVector<Instruction *, 4> PHIUsedList;
// Helper function to accumulate cost for instructions in the loop. // Helper function to accumulate cost for instructions in the loop.
auto AddCostRecursively = [&](Instruction &RootI, int Iteration) { auto AddCostRecursively = [&](Instruction &RootI, int Iteration) {
assert(Iteration >= 0 && "Cannot have a negative iteration!"); assert(Iteration >= 0 && "Cannot have a negative iteration!");
assert(CostWorklist.empty() && "Must start with an empty cost list"); assert(CostWorklist.empty() && "Must start with an empty cost list");
assert(PHIUsedList.empty() && "Must start with an empty phi used list"); assert(PHIUsedList.empty() && "Must start with an empty phi used list");
CostWorklist.push_back(&RootI); CostWorklist.push_back(&RootI);
TargetTransformInfo::TargetCostKind CostKind =
RootI.getFunction()->hasMinSize() ?
TargetTransformInfo::TCK_CodeSize :
TargetTransformInfo::TCK_SizeAndLatency;
for (;; --Iteration) { for (;; --Iteration) {
do { do {
Instruction *I = CostWorklist.pop_back_val(); Instruction *I = CostWorklist.pop_back_val();
// InstCostMap only uses I and Iteration as a key, the other two values // InstCostMap only uses I and Iteration as a key, the other two values
// don't matter here. // don't matter here.
auto CostIter = InstCostMap.find({I, Iteration, 0, 0}); auto CostIter = InstCostMap.find({I, Iteration, 0, 0});
if (CostIter == InstCostMap.end()) if (CostIter == InstCostMap.end())
Show All 24 Lines for (;; --Iteration) {
PhiI->getIncomingValueForBlock(L->getLoopLatch()))) PhiI->getIncomingValueForBlock(L->getLoopLatch())))
if (L->contains(OpI)) if (L->contains(OpI))
PHIUsedList.push_back(OpI); PHIUsedList.push_back(OpI);
continue; continue;
} }
// First accumulate the cost of this instruction. // First accumulate the cost of this instruction.
if (!Cost.IsFree) { if (!Cost.IsFree) {
UnrolledCost += TTI.getUserCost(I, TargetTransformInfo::TCK_CodeSize); UnrolledCost += TTI.getUserCost(I, CostKind);
LLVM_DEBUG(dbgs() << "Adding cost of instruction (iteration " LLVM_DEBUG(dbgs() << "Adding cost of instruction (iteration "
<< Iteration << "): "); << Iteration << "): ");
LLVM_DEBUG(I->dump()); LLVM_DEBUG(I->dump());
} }
// We must count the cost of every operand which is not free, // We must count the cost of every operand which is not free,
// recursively. If we reach a loop PHI node, simply add it to the set // recursively. If we reach a loop PHI node, simply add it to the set
// to be considered on the next iteration (backwards!). // to be considered on the next iteration (backwards!).
Show All 23 Linesstatic Optional<EstimatedUnrollCost> analyzeLoopUnrollCost(
// Ensure that we don't violate the loop structure invariants relied on by // Ensure that we don't violate the loop structure invariants relied on by
// this analysis. // this analysis.
assert(L->isLoopSimplifyForm() && "Must put loop into normal form first."); assert(L->isLoopSimplifyForm() && "Must put loop into normal form first.");
assert(L->isLCSSAForm(DT) && assert(L->isLCSSAForm(DT) &&
"Must have loops in LCSSA form to track live-out values."); "Must have loops in LCSSA form to track live-out values.");
LLVM_DEBUG(dbgs() << "Starting LoopUnroll profitability analysis...\n"); LLVM_DEBUG(dbgs() << "Starting LoopUnroll profitability analysis...\n");
TargetTransformInfo::TargetCostKind CostKind =
L->getHeader()->getParent()->hasMinSize() ?
TargetTransformInfo::TCK_CodeSize : TargetTransformInfo::TCK_SizeAndLatency;
// Simulate execution of each iteration of the loop counting instructions, // Simulate execution of each iteration of the loop counting instructions,
// which would be simplified. // which would be simplified.
// Since the same load will take different values on different iterations, // Since the same load will take different values on different iterations,
// we literally have to go through all loop's iterations. // we literally have to go through all loop's iterations.
for (unsigned Iteration = 0; Iteration < TripCount; ++Iteration) { for (unsigned Iteration = 0; Iteration < TripCount; ++Iteration) {
LLVM_DEBUG(dbgs() << " Analyzing iteration " << Iteration << "\n"); LLVM_DEBUG(dbgs() << " Analyzing iteration " << Iteration << "\n");
// Prepare for the iteration by collecting any simplified entry or backedge // Prepare for the iteration by collecting any simplified entry or backedge
Show All 37 Lines for (unsigned Idx = 0; Idx != BBWorklist.size(); ++Idx) {
for (Instruction &I : *BB) { for (Instruction &I : *BB) {
// These won't get into the final code - don't even try calculating the // These won't get into the final code - don't even try calculating the
// cost for them. // cost for them.
if (isa<DbgInfoIntrinsic>(I) || EphValues.count(&I)) if (isa<DbgInfoIntrinsic>(I) || EphValues.count(&I))
continue; continue;
// Track this instruction's expected baseline cost when executing the // Track this instruction's expected baseline cost when executing the
// rolled loop form. // rolled loop form.
RolledDynamicCost += TTI.getUserCost(&I, TargetTransformInfo::TCK_CodeSize); RolledDynamicCost += TTI.getUserCost(&I, CostKind);
// Visit the instruction to analyze its loop cost after unrolling, // Visit the instruction to analyze its loop cost after unrolling,
// and if the visitor returns true, mark the instruction as free after // and if the visitor returns true, mark the instruction as free after
// unrolling and continue. // unrolling and continue.
bool IsFree = Analyzer.visit(I); bool IsFree = Analyzer.visit(I);
bool Inserted = InstCostMap.insert({&I, (int)Iteration, bool Inserted = InstCostMap.insert({&I, (int)Iteration,
(unsigned)IsFree, (unsigned)IsFree,
/*IsCounted*/ false}).second; /*IsCounted*/ false}).second;
▲ Show 20 Lines • Show All 932 Lines • Show Last 20 Lines

llvm/test/Transforms/LoopUnroll/ARM/instr-size-costs.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -loop-unroll -unroll-allow-partial -unroll-optsize-threshold=18 -mtriple=thumbv8 -S %s -o - | FileCheck %s --check-prefix=CHECK-V8
define void @test_i32_add_optsize(i32* %a, i32* %b, i32* %c) #0 {
; CHECK-V8-LABEL: @test_i32_add_optsize(
; CHECK-V8-NEXT: entry:
; CHECK-V8-NEXT: br label [[LOOP:%.*]]
; CHECK-V8: loop:
; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i32, i32* [[B:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i32, i32* [[ADDR_A]], align 4
; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i32, i32* [[ADDR_B]], align 4
; CHECK-V8-NEXT: [[RES:%.*]] = add i32 [[DATA_A]], [[DATA_B]]
; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i32, i32* [[C:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: store i32 [[RES]], i32* [[ADDR_C]], align 4
; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1
; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i32, i32* [[A]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i32, i32* [[B]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i32, i32* [[ADDR_A_1]], align 4
; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i32, i32* [[ADDR_B_1]], align 4
; CHECK-V8-NEXT: [[RES_1:%.*]] = add i32 [[DATA_A_1]], [[DATA_B_1]]
; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i32, i32* [[C]], i32 [[COUNT]]
; CHECK-V8-NEXT: store i32 [[RES_1]], i32* [[ADDR_C_1]], align 4
; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[COUNT]], 1
; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100
; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8: exit:
; CHECK-V8-NEXT: ret void
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %count, %loop ]
%addr.a = getelementptr i32, i32* %a, i32 %iv
%addr.b = getelementptr i32, i32* %b, i32 %iv
%data.a = load i32, i32* %addr.a
%data.b = load i32, i32* %addr.b
%res = add i32 %data.a, %data.b
%addr.c = getelementptr i32, i32* %c, i32 %iv
store i32 %res, i32* %addr.c
%count = add nuw i32 %iv, 1
%end = icmp ne i32 %count, 100
br i1 %end, label %loop, label %exit
exit:
ret void
}
define void @test_i32_add_minsize(i32* %a, i32* %b, i32* %c) #1 {
; CHECK-V8-LABEL: @test_i32_add_minsize(
; CHECK-V8-NEXT: entry:
; CHECK-V8-NEXT: br label [[LOOP:%.*]]
; CHECK-V8: loop:
; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i32, i32* [[B:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i32, i32* [[ADDR_A]], align 4
; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i32, i32* [[ADDR_B]], align 4
; CHECK-V8-NEXT: [[RES:%.*]] = add i32 [[DATA_A]], [[DATA_B]]
; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i32, i32* [[C:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: store i32 [[RES]], i32* [[ADDR_C]], align 4
; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1
; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i32, i32* [[A]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i32, i32* [[B]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i32, i32* [[ADDR_A_1]], align 4
; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i32, i32* [[ADDR_B_1]], align 4
; CHECK-V8-NEXT: [[RES_1:%.*]] = add i32 [[DATA_A_1]], [[DATA_B_1]]
; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i32, i32* [[C]], i32 [[COUNT]]
; CHECK-V8-NEXT: store i32 [[RES_1]], i32* [[ADDR_C_1]], align 4
; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[COUNT]], 1
; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100
; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8: exit:
; CHECK-V8-NEXT: ret void
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %count, %loop ]
%addr.a = getelementptr i32, i32* %a, i32 %iv
%addr.b = getelementptr i32, i32* %b, i32 %iv
%data.a = load i32, i32* %addr.a
%data.b = load i32, i32* %addr.b
%res = add i32 %data.a, %data.b
%addr.c = getelementptr i32, i32* %c, i32 %iv
store i32 %res, i32* %addr.c
%count = add nuw i32 %iv, 1
%end = icmp ne i32 %count, 100
br i1 %end, label %loop, label %exit
exit:
ret void
}
define void @test_i64_add_optsize(i64* %a, i64* %b, i64* %c) #0 {
; CHECK-V8-LABEL: @test_i64_add_optsize(
; CHECK-V8-NEXT: entry:
; CHECK-V8-NEXT: br label [[LOOP:%.*]]
; CHECK-V8: loop:
; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i64, i64* [[A:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i64, i64* [[B:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i64, i64* [[ADDR_A]], align 4
; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i64, i64* [[ADDR_B]], align 4
; CHECK-V8-NEXT: [[RES:%.*]] = add i64 [[DATA_A]], [[DATA_B]]
; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i64, i64* [[C:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: store i64 [[RES]], i64* [[ADDR_C]], align 4
; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1
; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i64, i64* [[A]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i64, i64* [[B]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i64, i64* [[ADDR_A_1]], align 4
; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i64, i64* [[ADDR_B_1]], align 4
; CHECK-V8-NEXT: [[RES_1:%.*]] = add i64 [[DATA_A_1]], [[DATA_B_1]]
; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i64, i64* [[C]], i32 [[COUNT]]
; CHECK-V8-NEXT: store i64 [[RES_1]], i64* [[ADDR_C_1]], align 4
; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[COUNT]], 1
; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100
; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8: exit:
; CHECK-V8-NEXT: ret void
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %count, %loop ]
%addr.a = getelementptr i64, i64* %a, i32 %iv
%addr.b = getelementptr i64, i64* %b, i32 %iv
%data.a = load i64, i64* %addr.a
%data.b = load i64, i64* %addr.b
%res = add i64 %data.a, %data.b
%addr.c = getelementptr i64, i64* %c, i32 %iv
store i64 %res, i64* %addr.c
%count = add nuw i32 %iv, 1
%end = icmp ne i32 %count, 100
br i1 %end, label %loop, label %exit
exit:
ret void
}
define void @test_i64_add_minsize(i64* %a, i64* %b, i64* %c) #1 {
; CHECK-V8-LABEL: @test_i64_add_minsize(
; CHECK-V8-NEXT: entry:
; CHECK-V8-NEXT: br label [[LOOP:%.*]]
; CHECK-V8: loop:
; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i64, i64* [[A:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i64, i64* [[B:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i64, i64* [[ADDR_A]], align 4
; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i64, i64* [[ADDR_B]], align 4
; CHECK-V8-NEXT: [[RES:%.*]] = add i64 [[DATA_A]], [[DATA_B]]
; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i64, i64* [[C:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: store i64 [[RES]], i64* [[ADDR_C]], align 4
; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1
; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i64, i64* [[A]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i64, i64* [[B]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i64, i64* [[ADDR_A_1]], align 4
; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i64, i64* [[ADDR_B_1]], align 4
; CHECK-V8-NEXT: [[RES_1:%.*]] = add i64 [[DATA_A_1]], [[DATA_B_1]]
; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i64, i64* [[C]], i32 [[COUNT]]
; CHECK-V8-NEXT: store i64 [[RES_1]], i64* [[ADDR_C_1]], align 4
; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[COUNT]], 1
; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100
; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8: exit:
; CHECK-V8-NEXT: ret void
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %count, %loop ]
%addr.a = getelementptr i64, i64* %a, i32 %iv
%addr.b = getelementptr i64, i64* %b, i32 %iv
%data.a = load i64, i64* %addr.a
%data.b = load i64, i64* %addr.b
%res = add i64 %data.a, %data.b
%addr.c = getelementptr i64, i64* %c, i32 %iv
store i64 %res, i64* %addr.c
%count = add nuw i32 %iv, 1
%end = icmp ne i32 %count, 100
br i1 %end, label %loop, label %exit
exit:
ret void
}
define i32 @test_i32_select_optsize(i32* %a, i32* %b, i32* %c) #0 {
; CHECK-V8-LABEL: @test_i32_select_optsize(
; CHECK-V8-NEXT: entry:
; CHECK-V8-NEXT: br label [[LOOP:%.*]]
; CHECK-V8: loop:
; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ACC:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ACC_NEXT_1:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i32, i32* [[B:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i32, i32* [[ADDR_A]], align 4
; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i32, i32* [[ADDR_B]], align 4
; CHECK-V8-NEXT: [[UGT:%.*]] = icmp ugt i32 [[DATA_A]], [[DATA_B]]
; CHECK-V8-NEXT: [[UMAX:%.*]] = select i1 [[UGT]], i32 [[DATA_A]], i32 [[DATA_B]]
; CHECK-V8-NEXT: [[ACC_NEXT:%.*]] = add i32 [[UMAX]], [[ACC]]
; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i32, i32* [[C:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: store i32 [[UMAX]], i32* [[ADDR_C]], align 4
; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1
; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i32, i32* [[A]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i32, i32* [[B]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i32, i32* [[ADDR_A_1]], align 4
; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i32, i32* [[ADDR_B_1]], align 4
; CHECK-V8-NEXT: [[UGT_1:%.*]] = icmp ugt i32 [[DATA_A_1]], [[DATA_B_1]]
; CHECK-V8-NEXT: [[UMAX_1:%.*]] = select i1 [[UGT_1]], i32 [[DATA_A_1]], i32 [[DATA_B_1]]
; CHECK-V8-NEXT: [[ACC_NEXT_1]] = add i32 [[UMAX_1]], [[ACC_NEXT]]
; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i32, i32* [[C]], i32 [[COUNT]]
; CHECK-V8-NEXT: store i32 [[UMAX_1]], i32* [[ADDR_C_1]], align 4
; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[COUNT]], 1
; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100
; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8: exit:
; CHECK-V8-NEXT: [[ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[ACC_NEXT_1]], [[LOOP]] ]
; CHECK-V8-NEXT: ret i32 [[ACC_NEXT_LCSSA]]
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %count, %loop ]
%acc = phi i32 [ 0, %entry], [ %acc.next, %loop ]
%addr.a = getelementptr i32, i32* %a, i32 %iv
%addr.b = getelementptr i32, i32* %b, i32 %iv
%data.a = load i32, i32* %addr.a
%data.b = load i32, i32* %addr.b
%ugt = icmp ugt i32 %data.a, %data.b
%umax = select i1 %ugt, i32 %data.a, i32 %data.b
%acc.next = add i32 %umax, %acc
%addr.c = getelementptr i32, i32* %c, i32 %iv
store i32 %umax, i32* %addr.c
%count = add nuw i32 %iv, 1
%end = icmp ne i32 %count, 100
br i1 %end, label %loop, label %exit
exit:
ret i32 %acc.next
}
define i32 @test_i32_select_minsize(i32* %a, i32* %b, i32* %c) #1 {
; CHECK-V8-LABEL: @test_i32_select_minsize(
; CHECK-V8-NEXT: entry:
; CHECK-V8-NEXT: br label [[LOOP:%.*]]
; CHECK-V8: loop:
; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT_1:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ACC:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ACC_NEXT_1:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i32, i32* [[A:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i32, i32* [[B:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i32, i32* [[ADDR_A]], align 4
; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i32, i32* [[ADDR_B]], align 4
; CHECK-V8-NEXT: [[UGT:%.*]] = icmp ugt i32 [[DATA_A]], [[DATA_B]]
; CHECK-V8-NEXT: [[UMAX:%.*]] = select i1 [[UGT]], i32 [[DATA_A]], i32 [[DATA_B]]
; CHECK-V8-NEXT: [[ACC_NEXT:%.*]] = add i32 [[UMAX]], [[ACC]]
; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i32, i32* [[C:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: store i32 [[UMAX]], i32* [[ADDR_C]], align 4
; CHECK-V8-NEXT: [[COUNT:%.*]] = add nuw nsw i32 [[IV]], 1
; CHECK-V8-NEXT: [[ADDR_A_1:%.*]] = getelementptr i32, i32* [[A]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[ADDR_B_1:%.*]] = getelementptr i32, i32* [[B]], i32 [[COUNT]]
; CHECK-V8-NEXT: [[DATA_A_1:%.*]] = load i32, i32* [[ADDR_A_1]], align 4
; CHECK-V8-NEXT: [[DATA_B_1:%.*]] = load i32, i32* [[ADDR_B_1]], align 4
; CHECK-V8-NEXT: [[UGT_1:%.*]] = icmp ugt i32 [[DATA_A_1]], [[DATA_B_1]]
; CHECK-V8-NEXT: [[UMAX_1:%.*]] = select i1 [[UGT_1]], i32 [[DATA_A_1]], i32 [[DATA_B_1]]
; CHECK-V8-NEXT: [[ACC_NEXT_1]] = add i32 [[UMAX_1]], [[ACC_NEXT]]
; CHECK-V8-NEXT: [[ADDR_C_1:%.*]] = getelementptr i32, i32* [[C]], i32 [[COUNT]]
; CHECK-V8-NEXT: store i32 [[UMAX_1]], i32* [[ADDR_C_1]], align 4
; CHECK-V8-NEXT: [[COUNT_1]] = add nuw nsw i32 [[COUNT]], 1
; CHECK-V8-NEXT: [[END_1:%.*]] = icmp ne i32 [[COUNT_1]], 100
; CHECK-V8-NEXT: br i1 [[END_1]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8: exit:
; CHECK-V8-NEXT: [[ACC_NEXT_LCSSA:%.*]] = phi i32 [ [[ACC_NEXT_1]], [[LOOP]] ]
; CHECK-V8-NEXT: ret i32 [[ACC_NEXT_LCSSA]]
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %count, %loop ]
%acc = phi i32 [ 0, %entry], [ %acc.next, %loop ]
%addr.a = getelementptr i32, i32* %a, i32 %iv
%addr.b = getelementptr i32, i32* %b, i32 %iv
%data.a = load i32, i32* %addr.a
%data.b = load i32, i32* %addr.b
%ugt = icmp ugt i32 %data.a, %data.b
%umax = select i1 %ugt, i32 %data.a, i32 %data.b
%acc.next = add i32 %umax, %acc
%addr.c = getelementptr i32, i32* %c, i32 %iv
store i32 %umax, i32* %addr.c
%count = add nuw i32 %iv, 1
%end = icmp ne i32 %count, 100
br i1 %end, label %loop, label %exit
exit:
ret i32 %acc.next
}
define i64 @test_i64_select_optsize(i64* %a, i64* %b, i64* %c) #0 {
; CHECK-V8-LABEL: @test_i64_select_optsize(
; CHECK-V8-NEXT: entry:
; CHECK-V8-NEXT: br label [[LOOP:%.*]]
; CHECK-V8: loop:
; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ACC:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[ACC_NEXT:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i64, i64* [[A:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i64, i64* [[B:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i64, i64* [[ADDR_A]], align 4
; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i64, i64* [[ADDR_B]], align 4
; CHECK-V8-NEXT: [[UGT:%.*]] = icmp ugt i64 [[DATA_A]], [[DATA_B]]
; CHECK-V8-NEXT: [[UMAX:%.*]] = select i1 [[UGT]], i64 [[DATA_A]], i64 [[DATA_B]]
; CHECK-V8-NEXT: [[ACC_NEXT]] = add i64 [[UMAX]], [[ACC]]
; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i64, i64* [[C:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: store i64 [[UMAX]], i64* [[ADDR_C]], align 4
; CHECK-V8-NEXT: [[COUNT]] = add nuw i32 [[IV]], 1
; CHECK-V8-NEXT: [[END:%.*]] = icmp ne i32 [[COUNT]], 100
; CHECK-V8-NEXT: br i1 [[END]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8: exit:
; CHECK-V8-NEXT: [[ACC_NEXT_LCSSA:%.*]] = phi i64 [ [[ACC_NEXT]], [[LOOP]] ]
; CHECK-V8-NEXT: ret i64 [[ACC_NEXT_LCSSA]]
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %count, %loop ]
%acc = phi i64 [ 0, %entry], [ %acc.next, %loop ]
%addr.a = getelementptr i64, i64* %a, i32 %iv
%addr.b = getelementptr i64, i64* %b, i32 %iv
%data.a = load i64, i64* %addr.a
%data.b = load i64, i64* %addr.b
%ugt = icmp ugt i64 %data.a, %data.b
%umax = select i1 %ugt, i64 %data.a, i64 %data.b
%acc.next = add i64 %umax, %acc
%addr.c = getelementptr i64, i64* %c, i32 %iv
store i64 %umax, i64* %addr.c
%count = add nuw i32 %iv, 1
%end = icmp ne i32 %count, 100
br i1 %end, label %loop, label %exit
exit:
ret i64 %acc.next
}
define i64 @test_i64_select_minsize(i64* %a, i64* %b, i64* %c) #1 {
; CHECK-V8-LABEL: @test_i64_select_minsize(
; CHECK-V8-NEXT: entry:
; CHECK-V8-NEXT: br label [[LOOP:%.*]]
; CHECK-V8: loop:
; CHECK-V8-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[COUNT:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ACC:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[ACC_NEXT:%.*]], [[LOOP]] ]
; CHECK-V8-NEXT: [[ADDR_A:%.*]] = getelementptr i64, i64* [[A:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[ADDR_B:%.*]] = getelementptr i64, i64* [[B:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: [[DATA_A:%.*]] = load i64, i64* [[ADDR_A]], align 4
; CHECK-V8-NEXT: [[DATA_B:%.*]] = load i64, i64* [[ADDR_B]], align 4
; CHECK-V8-NEXT: [[UGT:%.*]] = icmp ugt i64 [[DATA_A]], [[DATA_B]]
; CHECK-V8-NEXT: [[UMAX:%.*]] = select i1 [[UGT]], i64 [[DATA_A]], i64 [[DATA_B]]
; CHECK-V8-NEXT: [[ACC_NEXT]] = add i64 [[UMAX]], [[ACC]]
; CHECK-V8-NEXT: [[ADDR_C:%.*]] = getelementptr i64, i64* [[C:%.*]], i32 [[IV]]
; CHECK-V8-NEXT: store i64 [[UMAX]], i64* [[ADDR_C]], align 4
; CHECK-V8-NEXT: [[COUNT]] = add nuw i32 [[IV]], 1
; CHECK-V8-NEXT: [[END:%.*]] = icmp ne i32 [[COUNT]], 100
; CHECK-V8-NEXT: br i1 [[END]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK-V8: exit:
; CHECK-V8-NEXT: [[ACC_NEXT_LCSSA:%.*]] = phi i64 [ [[ACC_NEXT]], [[LOOP]] ]
; CHECK-V8-NEXT: ret i64 [[ACC_NEXT_LCSSA]]
;
entry:
br label %loop
loop:
%iv = phi i32 [ 0, %entry ], [ %count, %loop ]
%acc = phi i64 [ 0, %entry], [ %acc.next, %loop ]
%addr.a = getelementptr i64, i64* %a, i32 %iv
%addr.b = getelementptr i64, i64* %b, i32 %iv
%data.a = load i64, i64* %addr.a
%data.b = load i64, i64* %addr.b
%ugt = icmp ugt i64 %data.a, %data.b
%umax = select i1 %ugt, i64 %data.a, i64 %data.b
%acc.next = add i64 %umax, %acc
%addr.c = getelementptr i64, i64* %c, i32 %iv
store i64 %umax, i64* %addr.c
%count = add nuw i32 %iv, 1
%end = icmp ne i32 %count, 100
br i1 %end, label %loop, label %exit
exit:
ret i64 %acc.next
}
attributes #0 = { optsize }
attributes #1 = { minsize optsize }

llvm/test/Transforms/LoopUnroll/ARM/unroll-optsize.ll

  • This file was added.
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -loop-unroll -mtriple=thumbv7a-unknown-linux-gnueabihf -S %s | FileCheck %s
; Check we unroll even with optsize, if the result is smaller, either because
; we have single iteration loops or bodies with constant folding opportunities
; after fully unrolling.
; TODO: Looks like we should enable some unrolling for M-class, even when
; optimising for size.
declare i32 @get()
define void @fully_unrolled_single_iteration(i32* %src) #0 {
; CHECK-LABEL: @fully_unrolled_single_iteration(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARR:%.*]] = alloca [4 x i32], align 4
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[SRC:%.*]]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 0
; CHECK-NEXT: store i32 [[V]], i32* [[ARRAYIDX]], align 4
; CHECK-NEXT: [[PTR:%.*]] = bitcast [4 x i32]* [[ARR]] to i32*
; CHECK-NEXT: call void @use(i32* nonnull [[PTR]])
; CHECK-NEXT: ret void
;
entry:
%arr = alloca [4 x i32], align 4
br label %for.body
for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
%src.idx = getelementptr inbounds i32, i32* %src, i64 %indvars.iv
%v = load i32, i32* %src.idx
%arrayidx = getelementptr inbounds [4 x i32], [4 x i32]* %arr, i64 0, i64 %indvars.iv
store i32 %v, i32* %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1
br i1 %exitcond, label %for.cond.cleanup, label %for.body
for.cond.cleanup: ; preds = %for.cond
%ptr = bitcast [4 x i32]* %arr to i32*
call void @use(i32* nonnull %ptr) #4
ret void
}
define void @fully_unrolled_smaller() #0 {
; CHECK-LABEL: @fully_unrolled_smaller(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARR:%.*]] = alloca [4 x i32], align 4
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 0
; CHECK-NEXT: store i32 16, i32* [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 1
; CHECK-NEXT: store i32 4104, i32* [[ARRAYIDX_1]], align 4
; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 2
; CHECK-NEXT: store i32 1048592, i32* [[ARRAYIDX_2]], align 4
; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 3
; CHECK-NEXT: store i32 268435480, i32* [[ARRAYIDX_3]], align 4
; CHECK-NEXT: [[PTR:%.*]] = bitcast [4 x i32]* [[ARR]] to i32*
; CHECK-NEXT: call void @use(i32* nonnull [[PTR]])
; CHECK-NEXT: ret void
;
entry:
%arr = alloca [4 x i32], align 4
br label %for.body
for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
%indvars.iv.tr = trunc i64 %indvars.iv to i32
%shl.0 = shl i32 %indvars.iv.tr, 3
%shl.1 = shl i32 16, %shl.0
%or = or i32 %shl.1, %shl.0
%arrayidx = getelementptr inbounds [4 x i32], [4 x i32]* %arr, i64 0, i64 %indvars.iv
store i32 %or, i32* %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv, 3
br i1 %exitcond, label %for.cond.cleanup, label %for.body
for.cond.cleanup: ; preds = %for.cond
%ptr = bitcast [4 x i32]* %arr to i32*
call void @use(i32* nonnull %ptr) #4
ret void
}
define void @fully_unrolled_smaller_Oz() #1 {
; CHECK-LABEL: @fully_unrolled_smaller_Oz(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARR:%.*]] = alloca [4 x i32], align 4
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 0
; CHECK-NEXT: store i32 16, i32* [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 1
; CHECK-NEXT: store i32 4104, i32* [[ARRAYIDX_1]], align 4
; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 2
; CHECK-NEXT: store i32 1048592, i32* [[ARRAYIDX_2]], align 4
; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 3
; CHECK-NEXT: store i32 268435480, i32* [[ARRAYIDX_3]], align 4
; CHECK-NEXT: [[PTR:%.*]] = bitcast [4 x i32]* [[ARR]] to i32*
; CHECK-NEXT: call void @use(i32* nonnull [[PTR]])
; CHECK-NEXT: ret void
;
entry:
%arr = alloca [4 x i32], align 4
br label %for.body
for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
%indvars.iv.tr = trunc i64 %indvars.iv to i32
%shl.0 = shl i32 %indvars.iv.tr, 3
%shl.1 = shl i32 16, %shl.0
%or = or i32 %shl.1, %shl.0
%arrayidx = getelementptr inbounds [4 x i32], [4 x i32]* %arr, i64 0, i64 %indvars.iv
store i32 %or, i32* %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv, 3
br i1 %exitcond, label %for.cond.cleanup, label %for.body
for.cond.cleanup: ; preds = %for.cond
%ptr = bitcast [4 x i32]* %arr to i32*
call void @use(i32* nonnull %ptr) #4
ret void
}
define void @fully_unrolled_bigger() #0 {
; CHECK-LABEL: @fully_unrolled_bigger(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARR:%.*]] = alloca [4 x i32], align 4
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[INDVARS_IV_TR:%.*]] = trunc i64 [[INDVARS_IV]] to i32
; CHECK-NEXT: [[SHL_0:%.*]] = shl i32 [[INDVARS_IV_TR]], 3
; CHECK-NEXT: [[SHL_1:%.*]] = shl i32 16, [[SHL_0]]
; CHECK-NEXT: [[OR:%.*]] = or i32 [[SHL_1]], [[SHL_0]]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* [[ARR]], i64 0, i64 [[INDVARS_IV]]
; CHECK-NEXT: store i32 [[OR]], i32* [[ARRAYIDX]], align 4
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV]], 7
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY]]
; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[PTR:%.*]] = bitcast [4 x i32]* [[ARR]] to i32*
; CHECK-NEXT: call void @use(i32* nonnull [[PTR]])
; CHECK-NEXT: ret void
;
entry:
%arr = alloca [4 x i32], align 4
br label %for.body
for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
%indvars.iv.tr = trunc i64 %indvars.iv to i32
%shl.0 = shl i32 %indvars.iv.tr, 3
%shl.1 = shl i32 16, %shl.0
%or = or i32 %shl.1, %shl.0
%arrayidx = getelementptr inbounds [4 x i32], [4 x i32]* %arr, i64 0, i64 %indvars.iv
store i32 %or, i32* %arrayidx, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv, 7
br i1 %exitcond, label %for.cond.cleanup, label %for.body
for.cond.cleanup: ; preds = %for.cond
%ptr = bitcast [4 x i32]* %arr to i32*
call void @use(i32* nonnull %ptr) #4
ret void
}
declare void @use(i32*)
attributes #0 = { optsize }
attributes #1 = { minsize optsize }