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ARM: make Thumb1 instructions non-flag-setting in IT block.
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Authored by t.p.northover on Mon, Jul 27, 6:42 AM.

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dmgreen
Summary

Many Thumb1 instructions are defined to set CPSR if executed outside an IT block, but leave it alone from inside one. In MachineIR this is represented by whether an optional register is CPSR or NoReg (0), and affects how the instructions are printed.

This sets the instruction to the appropriate form during if-conversion.

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t.p.northover created this revision.Mon, Jul 27, 6:42 AM

This looks familiar, as something @NickGuy was looking at recently from D83667. We didn't know about ThumbArithFlagSetting though, that's a nice way to do it.

Can you update the comment from the CodeGen/ARM/thumb2-it-block.ll test too? The code here looks OK to me.

llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
547

It sounds OK to search, but will this always just be operand 1?

Thanks for the suggestions and context . Glad it's not quite a direct duplicate of the other one but related.

I've updated the test, and switched to asserting that operand 1 is the one we want because I really can't see it ever being anything different (it would need an instruction to define two registers which just doesn't happen with 16-bit Thumb, or zero and that's basically just cmp which isn't affected).

dmgreen accepted this revision.Tue, Jul 28, 3:46 AM

Thanks. LGTM

This revision is now accepted and ready to land.Tue, Jul 28, 3:46 AM
t.p.northover closed this revision.Tue, Jul 28, 5:41 AM

Thanks. Pushed as 39108f4c7a.