[PATCH][X86] Slightly refactor default features for AMD bdver* cpus. Also improve checks for target features in test Preprocessor/predefined-arch-macros.c.

[andreadb]

Summary

Hi Reid, Quentin (and all),

This patch slightly refactors how clang sets default features for AMD bdver cpus.
Method 'getDefaultFeatures' (in Basic/Targets.cpp), already uses a fallthrough mechanism to set default features for 'bdver4', bdver3 and bdver2. This patch simply adds another fallthrough from case 'CK_BDVER2' to case 'CK_BDVER1'. That is because 'bdver2' has the same features available in 'bdver1' plus BMI,FMA,F16C and TBM etc.

While at it, I added missing checks for features in test predefined-arch-macros.c.
In the case of BTVER2, this patch adds explicit checks for F16C, BMI and PCLMUL.
In the case of BDVER3 and BDVER4, this patch checks for the presence of FSGSBASE (added at r221130).

Please let me know if ok to submit.

Thanks,
Andrea

[craig.topper]

Why have avx, fma4, and sse4a been added to CK_BDVER1? xop implies all of
those. Can we use comments instead?

[andreadb]

In D6134#4, @craig.topper wrote:

Why have avx, fma4, and sse4a been added to CK_BDVER1? xop implies all of
those. Can we use comments instead?

Sure, I will remove the redundant calls to setFeatureEnabledImpl that set avx,fma4,sse4a.
I originally added those features mainly for clarity reason (to make more explicit that the target has avx). I agree that adding a comment is much better.
I will add a comment on top of the call that sets feature 'xop' for bdver1 that simply says "xop implies avx, fma4 and sse4a".

[andreadb]

Uploaded a new version of the patch that removes the redundant calls to 'setFeatureEnabledImpl' and adds a comment.

Please let me know what you think.

Thanks,
Andrea

[craig.topper]

LGTM

Closed by commit rL221449 (authored by adibiagio).

[andreadb]

In D6134#8, @craig.topper wrote:

LGTM

Thanks Craig,
Committed revision 221449.

Cheers,
Andrea

cfe/trunk/lib/Basic/Targets.cpp

void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
   case CK_BTVER1:
     setFeatureEnabledImpl(Features, "ssse3", true);
     setFeatureEnabledImpl(Features, "sse4a", true);
     setFeatureEnabledImpl(Features, "lzcnt", true);
     setFeatureEnabledImpl(Features, "popcnt", true);
     setFeatureEnabledImpl(Features, "prfchw", true);
     setFeatureEnabledImpl(Features, "cx16", true);
     break;
-  case CK_BDVER1:
-    setFeatureEnabledImpl(Features, "xop", true);
-    setFeatureEnabledImpl(Features, "lzcnt", true);
-    setFeatureEnabledImpl(Features, "aes", true);
-    setFeatureEnabledImpl(Features, "pclmul", true);
-    setFeatureEnabledImpl(Features, "prfchw", true);
-    setFeatureEnabledImpl(Features, "cx16", true);
-    break;
   case CK_BDVER4:
     setFeatureEnabledImpl(Features, "avx2", true);
     setFeatureEnabledImpl(Features, "bmi2", true);
     // FALLTHROUGH
   case CK_BDVER3:
     setFeatureEnabledImpl(Features, "fsgsbase", true);
     // FALLTHROUGH
   case CK_BDVER2:
+    setFeatureEnabledImpl(Features, "bmi", true);
+    setFeatureEnabledImpl(Features, "fma", true);
+    setFeatureEnabledImpl(Features, "f16c", true);
+    setFeatureEnabledImpl(Features, "tbm", true);
+    // FALLTHROUGH
+  case CK_BDVER1:
+    // xop implies avx, sse4a and fma4.
     setFeatureEnabledImpl(Features, "xop", true);
     setFeatureEnabledImpl(Features, "lzcnt", true);
     setFeatureEnabledImpl(Features, "aes", true);
     setFeatureEnabledImpl(Features, "pclmul", true);
     setFeatureEnabledImpl(Features, "prfchw", true);
-    setFeatureEnabledImpl(Features, "bmi", true);
-    setFeatureEnabledImpl(Features, "fma", true);
-    setFeatureEnabledImpl(Features, "f16c", true);
-    setFeatureEnabledImpl(Features, "tbm", true);
     setFeatureEnabledImpl(Features, "cx16", true);
     break;
   }
 }
 
 void X86TargetInfo::setSSELevel(llvm::StringMap<bool> &Features,
                                 X86SSEEnum Level, bool Enabled) {
   if (Enabled) {

cfe/trunk/test/Preprocessor/predefined-arch-macros.c

 // CHECK_BTVER1_M64: #define __x86_64__ 1
 // RUN: %clang -march=btver2 -m32 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck %s -check-prefix=CHECK_BTVER2_M32
 // CHECK_BTVER2_M32-NOT: #define __3dNOW_A__ 1
 // CHECK_BTVER2_M32-NOT: #define __3dNOW__ 1
 // CHECK_BTVER2_M32: #define __AES__ 1
 // CHECK_BTVER2_M32: #define __AVX__ 1
+// CHECK_BTVER2_M32: #define __BMI__ 1
+// CHECK_BTVER2_M32: #define __F16C__ 1
 // CHECK_BTVER2_M32: #define __LZCNT__ 1
 // CHECK_BTVER2_M32: #define __MMX__ 1
+// CHECK_BTVER2_M32: #define __PCLMUL__ 1
 // CHECK_BTVER2_M32: #define __POPCNT__ 1
 // CHECK_BTVER2_M32: #define __PRFCHW__ 1
 // CHECK_BTVER2_M32: #define __SSE2_MATH__ 1
 // CHECK_BTVER2_M32: #define __SSE2__ 1
 // CHECK_BTVER2_M32: #define __SSE3__ 1
 // CHECK_BTVER2_M32: #define __SSE4A__ 1
 // CHECK_BTVER2_M32: #define __SSE_MATH__ 1
 // CHECK_BTVER2_M32: #define __SSE__ 1
 // CHECK_BTVER2_M32: #define __SSSE3__ 1
 // CHECK_BTVER2_M32: #define __btver2 1
 // CHECK_BTVER2_M32: #define __btver2__ 1
 // CHECK_BTVER2_M32: #define __i386 1
 // CHECK_BTVER2_M32: #define __i386__ 1
 // CHECK_BTVER2_M32: #define __tune_btver2__ 1
 // RUN: %clang -march=btver2 -m64 -E -dM %s -o - 2>&1 \
 // RUN:     -target i386-unknown-linux \
 // RUN:   | FileCheck %s -check-prefix=CHECK_BTVER2_M64
 // CHECK_BTVER2_M64-NOT: #define __3dNOW_A__ 1
 // CHECK_BTVER2_M64-NOT: #define __3dNOW__ 1
 // CHECK_BTVER2_M64: #define __AES__ 1
 // CHECK_BTVER2_M64: #define __AVX__ 1
+// CHECK_BTVER2_M64: #define __BMI__ 1
+// CHECK_BTVER2_M64: #define __F16C__ 1
 // CHECK_BTVER2_M64: #define __LZCNT__ 1
 // CHECK_BTVER2_M64: #define __MMX__ 1
+// CHECK_BTVER2_M64: #define __PCLMUL__ 1
 // CHECK_BTVER2_M64: #define __POPCNT__ 1
 // CHECK_BTVER2_M64: #define __PRFCHW__ 1
 // CHECK_BTVER2_M64: #define __SSE2_MATH__ 1
 // CHECK_BTVER2_M64: #define __SSE2__ 1
 // CHECK_BTVER2_M64: #define __SSE3__ 1
 // CHECK_BTVER2_M64: #define __SSE4A__ 1
 // CHECK_BTVER2_M64: #define __SSE_MATH__ 1
 // CHECK_BTVER2_M64: #define __SSE__ 1

 // CHECK_BDVER3_M32-NOT: #define __3dNOW_A__ 1
 // CHECK_BDVER3_M32-NOT: #define __3dNOW__ 1
 // CHECK_BDVER3_M32: #define __AES__ 1
 // CHECK_BDVER3_M32: #define __AVX__ 1
 // CHECK_BDVER3_M32: #define __BMI__ 1
 // CHECK_BDVER3_M32: #define __F16C__ 1
 // CHECK_BDVER3_M32: #define __FMA4__ 1
 // CHECK_BDVER3_M32: #define __FMA__ 1
+// CHECK_BDVER3_M32: #define __FSGSBASE__ 1
 // CHECK_BDVER3_M32: #define __LZCNT__ 1
 // CHECK_BDVER3_M32: #define __MMX__ 1
 // CHECK_BDVER3_M32: #define __PCLMUL__ 1
 // CHECK_BDVER3_M32: #define __POPCNT__ 1
 // CHECK_BDVER3_M32: #define __PRFCHW__ 1
 // CHECK_BDVER3_M32: #define __SSE2_MATH__ 1
 // CHECK_BDVER3_M32: #define __SSE2__ 1
 // CHECK_BDVER3_M32: #define __SSE3__ 1

 // CHECK_BDVER3_M64-NOT: #define __3dNOW_A__ 1
 // CHECK_BDVER3_M64-NOT: #define __3dNOW__ 1
 // CHECK_BDVER3_M64: #define __AES__ 1
 // CHECK_BDVER3_M64: #define __AVX__ 1
 // CHECK_BDVER3_M64: #define __BMI__ 1
 // CHECK_BDVER3_M64: #define __F16C__ 1
 // CHECK_BDVER3_M64: #define __FMA4__ 1
 // CHECK_BDVER3_M64: #define __FMA__ 1
+// CHECK_BDVER3_M64: #define __FSGSBASE__ 1
 // CHECK_BDVER3_M64: #define __LZCNT__ 1
 // CHECK_BDVER3_M64: #define __MMX__ 1
 // CHECK_BDVER3_M64: #define __PCLMUL__ 1
 // CHECK_BDVER3_M64: #define __POPCNT__ 1
 // CHECK_BDVER3_M64: #define __PRFCHW__ 1
 // CHECK_BDVER3_M64: #define __SSE2_MATH__ 1
 // CHECK_BDVER3_M64: #define __SSE2__ 1
 // CHECK_BDVER3_M64: #define __SSE3__ 1

 // CHECK_BDVER4_M32: #define __AES__ 1
 // CHECK_BDVER4_M32: #define __AVX2__ 1
 // CHECK_BDVER4_M32: #define __AVX__ 1
 // CHECK_BDVER4_M32: #define __BMI2__ 1
 // CHECK_BDVER4_M32: #define __BMI__ 1
 // CHECK_BDVER4_M32: #define __F16C__ 1
 // CHECK_BDVER4_M32: #define __FMA4__ 1
 // CHECK_BDVER4_M32: #define __FMA__ 1
+// CHECK_BDVER4_M32: #define __FSGSBASE__ 1
 // CHECK_BDVER4_M32: #define __LZCNT__ 1
 // CHECK_BDVER4_M32: #define __MMX__ 1
 // CHECK_BDVER4_M32: #define __PCLMUL__ 1
 // CHECK_BDVER4_M32: #define __POPCNT__ 1
 // CHECK_BDVER4_M32: #define __PRFCHW__ 1
 // CHECK_BDVER4_M32: #define __SSE2_MATH__ 1
 // CHECK_BDVER4_M32: #define __SSE2__ 1
 // CHECK_BDVER4_M32: #define __SSE3__ 1

 // CHECK_BDVER4_M64: #define __AES__ 1
 // CHECK_BDVER4_M64: #define __AVX2__ 1
 // CHECK_BDVER4_M64: #define __AVX__ 1
 // CHECK_BDVER4_M64: #define __BMI2__ 1
 // CHECK_BDVER4_M64: #define __BMI__ 1
 // CHECK_BDVER4_M64: #define __F16C__ 1
 // CHECK_BDVER4_M64: #define __FMA4__ 1
 // CHECK_BDVER4_M64: #define __FMA__ 1
+// CHECK_BDVER4_M64: #define __FSGSBASE__ 1
 // CHECK_BDVER4_M64: #define __LZCNT__ 1
 // CHECK_BDVER4_M64: #define __MMX__ 1
 // CHECK_BDVER4_M64: #define __PCLMUL__ 1
 // CHECK_BDVER4_M64: #define __POPCNT__ 1
 // CHECK_BDVER4_M64: #define __PRFCHW__ 1
 // CHECK_BDVER4_M64: #define __SSE2_MATH__ 1
 // CHECK_BDVER4_M64: #define __SSE2__ 1
 // CHECK_BDVER4_M64: #define __SSE3__ 1