ARM Unwind syntax in libcxxabi

[rengolin]

Summary

This patch fixes the bad argument that GAS accepted but the IAS didn't,
ie. {#0x20}, moving it to {0x20} which both accept. It also makes the
ARMv7+ save/restore correct by using VFP instructions rather than old
co-processor ones.

Fixes PR20529.

[compnerd]

src/Unwind/UnwindRegistersRestore.S

329

Wow. Did this even work previously? This feels like it could be split out into a separate patch to first address use of the branch on ARM v4.

368

Why the comment here but not previously? Im not sure it really adds much. However, I would say that the comment indicating that fldmiax is equivalent to the ldc is more useful and it may be nice to restore those.

[rengolin]

src/Unwind/UnwindRegistersRestore.S

329

No, it didn't. :)

I thought about a separate patch, but it was so small that I didn't bother. I can just commit that one and discuss the rest of the patch.

368

I'll keep the old comment.

The new comment helps understand why I have done all three alternatives as vldmia, and that's because they're all the same on v7+, but didn't use to be up to v6. The main difference is the 0x21 instead of 0x20, which on v7+ they're all the same.

[rengolin]

Leaving old comments intact, leaving the other fix out.

[rengolin]

Ping.

[jroelofs]

This is the commit responsible for changing them to the co-processor mnemonic in
the first place:
https://github.com/awong-dev/ndk/commit/e8a9a29190cf21b3506c797b175ff550a2d0eff8

Antoine's commit comment here is, I think still relevant:

"In some configurations we don't compile the library with -mfpu=vfp* but we
still want to provide on-demand unwinding support for VFP, so also use the
stc/ldc coprocessor mnemonics to generate the f{st,ld}mia{d,x} instructions."

Why does this change when we go to __ARM_ARCH >= 7 ?

Jon

[rengolin]

Jon,

As explained in http://llvm.org/PR20529, ARM deprecated the use of ldc/stc for VFP and NEON operations in v7, so we have to use the VFP/NEON variants. Besides, it's only really necessry on archs that don't have VFP anyway.

cheers,
--renato

[rengolin]

Committed in r217585. Thanks!

src/Unwind/UnwindRegistersRestore.S

   @ these registers implies they are, actually, available on the target, so
   @ it's ok to execute.
   @ So, generate the instruction using the corresponding coprocessor mnemonic.
-  ldc p11, cr0, [r0], {#0x20}  @ fldmiad r0, {d0-d15}
+#if __ARM_ARCH < 7
+  ldc p11, cr0, [r0], {0x20}  @ fldmiad r0, {d0-d15}
+#else
+  vldmia r0, {d0-d15}
+#endif
   mov pc, lr
 
 @

 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMXEPy)
-  ldc p11, cr0, [r0], {#0x21}  @ fldmiax r0, {d0-d15}
+#if __ARM_ARCH < 7
+  ldc p11, cr0, [r0], {0x21}  @ fldmiax r0, {d0-d15}
+#else
+  vldmia r0, {d0-d15} @ fldmiax is deprecated in ARMv7+ and now behaves like vldmia
+#endif
   mov pc, lr
 
 @

 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreVFPv3EPy)
-  ldcl p11, cr0, [r0], {#0x20}  @ vldm r0, {d16-d31}
+#if __ARM_ARCH < 7
+  ldcl p11, cr0, [r0], {0x20}  @ vldm r0, {d16-d31}
+#else
+  vldmia r0, {d16-d31}
+#endif
   mov pc, lr
 
 @

src/Unwind/UnwindRegistersSave.S

 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMDEPy)
-  stc p11, cr0, [r0], {#0x20}  @ fstmiad r0, {d0-d15}
+#if __ARM_ARCH < 7
+  stc p11, cr0, [r0], {0x20}  @ fstmiad r0, {d0-d15}
+#else
+  vstmia r0, {d0-d15}
+#endif
   mov pc, lr
 
 @

 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMXEPy)
-  stc p11, cr0, [r0], {#0x21}  @ fstmiax r0, {d0-d15}
+#if __ARM_ARCH < 7
+  stc p11, cr0, [r0], {0x21}  @ fstmiax r0, {d0-d15}
+#else
+  vstmia r0, {d0-d15} @ fstmiax is deprecated in ARMv7+ and now behaves like vstmia
+#endif
   mov pc, lr
 
 @

   @ these registers implies they are, actually, available on the target, so
   @ it's ok to execute.
   @ So, generate the instructions using the corresponding coprocessor mnemonic.
-  stcl p11, cr0, [r0], {#0x20}  @ vldm r0, {d16-d31}
+#if __ARM_ARCH < 7
+  stcl p11, cr0, [r0], {0x20}  @ vldm r0, {d16-d31}
+#else
+  vstmia r0, {d16-d31}
+#endif
   mov pc, lr
 
 @