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[AMDGPU] CodeGen: check dst operand type to determine if omod is supported for VOP3 instructions
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Authored by SamWot on Jul 13 2017, 4:47 AM.

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Summary

Previously, CodeGen checked first src operand type to determine if omod is supported by instruction. This isn't correct for some instructions: e.g. V_CMP_EQ_F32 has floating-point src operands but doesn't support omod.
Changed .td files to check dst operand type instead of src operand.

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rL LLVM

Event Timeline

SamWot created this revision.Jul 13 2017, 4:47 AM
SamWot edited the summary of this revision. (Show Details)Jul 13 2017, 4:48 AM
SamWot added a subscriber: Restricted Project.
arsenm edited edge metadata.Jul 13 2017, 9:11 AM

There should be an assembler test for omod being rejected with these. Doesn't the same also apply for clamp?

SamWot updated this revision to Diff 106637.Jul 14 2017, 6:56 AM

Added assembler tests

There should be an assembler test for omod being rejected with these. Doesn't the same also apply for clamp?

I added some assembler tests.
There are some differences with clamp: since GFX8 clamp is allowed in VOPC instructions and instructions with integer output.

arsenm accepted this revision.Jul 14 2017, 10:01 AM

LGTM

This revision is now accepted and ready to land.Jul 14 2017, 10:01 AM
This revision was automatically updated to reflect the committed changes.