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[AMDGPU] Untangle SDWA pass from SIShrinkInstructions
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Authored by rampitec on Jun 3 2017, 12:02 AM.

Details

Summary

Remove dependency of SDWA pass on SIShrinkInstructions.
The goal is to move SDWA even higher in the stack to avoid second run
of MachineLICM, MachineCSE and SIFoldOperands.

Also added handling to preserve original src modifiers.

Diff Detail

Repository
rL LLVM

Event Timeline

rampitec created this revision.Jun 3 2017, 12:02 AM
rampitec updated this revision to Diff 101310.Jun 3 2017, 1:13 AM

Restored const on argument of isConvertibleToSDWA.

SamWot edited edge metadata.Jun 3 2017, 2:17 AM

This is good change. I wanted to propose it myself:)

lib/Target/AMDGPU/SIPeepholeSDWA.cpp
261

Why do you use XOR here?

617

This check isn't strong enough. E.g. VOP3 (e64) instructions allow OMod that is not allowed in SDWA on VI.
Another problem is SDST operand. E.g. this is a valid instruction: v_add_i32_e64 v0, s[0:1], v1, v2. It writes carry-out into s[0:1] instead of VCC.
Same problem can be with VOPC version of VOP3.
You should either check for SDST operand or add special legalizer for it.

rampitec added inline comments.Jun 3 2017, 9:18 AM
lib/Target/AMDGPU/SIPeepholeSDWA.cpp
261

You can set neg modifier yoyrself, but it also can be present in the original instruction on the same operand. The right effective modifier is exactly xor of them.

rampitec added inline comments.Jun 3 2017, 9:28 AM
lib/Target/AMDGPU/SIPeepholeSDWA.cpp
617

The VOPC is checked down in the convertToSDWA, but in general checks for omod and sdst are needed here. I will add them.

rampitec updated this revision to Diff 101321.Jun 3 2017, 9:58 AM
rampitec marked 2 inline comments as done.
rampitec edited the summary of this revision. (Show Details)

Added checks for OMOD and SDST.

SamWot accepted this revision.Jun 3 2017, 10:24 AM
This revision is now accepted and ready to land.Jun 3 2017, 10:24 AM
This revision was automatically updated to reflect the committed changes.