[scan-build] fix logic error warning in LLVM AMDGPU target code base

[apelete]

Summary

This patch fixes a logic error warning of the type "called c++ object
pointer is null" in AMDGPU code base.

Signed-off-by: Apelete Seketeli <[e-mail]>

[• tstellarAMD]

LGTM. Thanks!

[apelete]

In D19810#418745, @tstellarAMD wrote:

LGTM. Thanks!

Great, would be nice if you could commit this for me as I don't have commit access.
Thanks.

[apelete]

[scan-build] fix logic error warning in LLVM AMDGPU target code base

Changes since last revision:

• rebased patch on trunk and validated against test suite.

[apelete]

In D19810#418745, @tstellarAMD wrote:

LGTM. Thanks!

I don't have commit access so please go ahead and commit this for me when you're ready.

[Eugene.Zelenko]

Looks like patch was not committed, but code patch should be rebased to trunk.

lib/Target/AMDGPU/SIInstrInfo.cpp

 
 bool SIInstrInfo::isOperandLegal(const MachineInstr *MI, unsigned OpIdx,
                                  const MachineOperand *MO) const {
   const MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo();
   const MCInstrDesc &InstDesc = MI->getDesc();
   const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpIdx];
   const TargetRegisterClass *DefinedRC =
       OpInfo.RegClass != -1 ? RI.getRegClass(OpInfo.RegClass) : nullptr;
+
   if (!MO)
     MO = &MI->getOperand(OpIdx);
 
+  if (!DefinedRC) {
+    // This operand expects an immediate.
+    return !MO->isReg();
+  }
+
   if (isVALU(*MI) &&
       usesConstantBus(MRI, *MO, DefinedRC->getSize())) {
 
     RegSubRegPair SGPRUsed;
     if (MO->isReg())
       SGPRUsed = RegSubRegPair(MO->getReg(), MO->getSubReg());
 
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
       if (i == OpIdx)
         continue;
       const MachineOperand &Op = MI->getOperand(i);
       if (Op.isReg() &&
           (Op.getReg() != SGPRUsed.Reg || Op.getSubReg() != SGPRUsed.SubReg) &&
           usesConstantBus(MRI, Op, getOpSize(*MI, i))) {
         return false;
       }
     }
   }
 
   if (MO->isReg()) {
     assert(DefinedRC);
     return isLegalRegOperand(MRI, OpInfo, *MO);
   }
 
-
   // Handle non-register types that are treated like immediates.
   assert(MO->isImm() || MO->isTargetIndex() || MO->isFI());
 
-  if (!DefinedRC) {
-    // This operand expects an immediate.
-    return true;
-  }
-
   return isImmOperandLegal(MI, OpIdx, *MO);
 }
 
 void SIInstrInfo::legalizeOperandsVOP2(MachineRegisterInfo &MRI,
                                        MachineInstr *MI) const {
   unsigned Opc = MI->getOpcode();
   const MCInstrDesc &InstrDesc = get(Opc);