[lld] [AArch64] Initial TLSDESC relocations support

[zatrazz]

Summary

Default Global Dynamic TLS relocation generation for AArch64 is done by
TLSDESC and TLSCALL / GNU2 tls and for shared mode it requires creating
dynamic R_AARCH64_TLSDESC relocations.

This patch adds initial support for TLSDESC relocation for AArch64. On
TargetInfo class a new hook is added, isTlsGlobalDescDynamicRel, to
indicate the TLS GD should be handled a TLSDESC one and special
handling and dynamic relocation generation is added on
handleTlsRelocation.

No relax optimization is added and there is room to some optimizations.
Along with 'Fix R_AARCH64_ABS64 in Shared mode' [1] patch I could
bootstrap lld and run all the tests withouth failure.

[1] http://reviews.llvm.org/D17265

[• rafael]

I have a applied this patch locally and I am giving it a try.

ELF/Target.cpp

1226

Are all of these needed? At least on X86_64 the _CALL one is just a marker for relaxations. I would expect it to be just a hint in here too.

[• rafael]

test/ELF/aarch64-tls-tlsdesc.s

4

This file has windows line endings.

[• rafael]

test/ELF/aarch64-tls-tlsdesc.s

14

Please add

#RELOC-NEXT: }
#RELOC-NEXT: ]

to make sure we are looking at all the relocations.

18

Please add the expression that computes 144.

[grimar]

I think such relocations requires special PLT entry. Also they seems need DT_TLSDESC_GOT and DT_TLSDESC_PLT dynamic entries to be created.
I rebased my old patch that implements all that (http://reviews.llvm.org/D16201).

[• rafael]

That is quite a bit bigger patch. My preference would be to finish
this one first and then rebase yours on top.

[grimar]

ELF/Target.cpp

1485

I would add some comment here.

ELF/Target.h

92

I dont think you want '= 0' here, we dont initialize other relocation fields.

ELF/Writer.cpp

276

No need in this empty line.

[zatrazz]

I am seeing a lot of issues with this patch after rebase. I will abandon it and work based on http://reviews.llvm.org/D16201.

ELF/InputSection.cpp

if (!Body) {
           // to the symbol address.
           SymVA = Out<ELFT>::Got->getMipsLocalPageAddr(SymVA);
       }
       Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA, 0,
                           findMipsPairedReloc(Buf, SymIndex, Type, NextRelocs));
       continue;
     }
 
-    if (Target->isTlsGlobalDynamicRel(Type) &&
+    if ((Target->isTlsGlobalDescDynamicRel(Type) ||
+         Target->isTlsGlobalDynamicRel(Type)) &&
         !Target->canRelaxTls(Type, Body)) {
       Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc,
                           Out<ELFT>::Got->getGlobalDynAddr(*Body) +
                               getAddend<ELFT>(RI));
       continue;
     }
 
     uintX_t SymVA = Body->getVA<ELFT>();

ELF/Target.h

 namespace elf2 {
 class SymbolBody;
 
 class TargetInfo {
 public:
   uint64_t getVAStart() const;
   virtual bool isTlsLocalDynamicRel(unsigned Type) const;
   virtual bool isTlsGlobalDynamicRel(unsigned Type) const;
+  virtual bool isTlsGlobalDescDynamicRel(unsigned Type) const;
   virtual unsigned getDynRel(unsigned Type) const { return Type; }
   virtual bool isTlsDynRel(unsigned Type, const SymbolBody &S) const;
   virtual unsigned getTlsGotRel(unsigned Type) const { return TlsGotRel; }
   virtual void writeGotHeader(uint8_t *Buf) const {}
   virtual void writeGotPltHeader(uint8_t *Buf) const {}
   virtual void writeGotPlt(uint8_t *Buf, uint64_t Plt) const {};
 
   // If lazy binding is supported, the first entry of the PLT has code
public:
   unsigned CopyRel;
   unsigned GotRel;
   unsigned PltRel;
   unsigned RelativeRel;
   unsigned IRelativeRel;
   unsigned TlsGotRel = 0;
   unsigned TlsModuleIndexRel;
   unsigned TlsOffsetRel;
+  unsigned TlsDescRel = 0;
   unsigned PltEntrySize = 8;
   unsigned PltZeroSize = 0;
   unsigned GotHeaderEntriesNum = 0;
   unsigned GotPltHeaderEntriesNum = 3;
   bool UseLazyBinding = false;
 };
 
 uint64_t getPPC64TocBase();
 

ELF/Target.cpp

void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
                    uint8_t *PairedLoc = nullptr) const override;
   bool isRelRelative(uint32_t Type) const override;
 };
 
 class AArch64TargetInfo final : public TargetInfo {
 public:
   AArch64TargetInfo();
   unsigned getDynRel(unsigned Type) const override;
-  bool isTlsGlobalDynamicRel(unsigned Type) const override;
+  bool isTlsGlobalDescDynamicRel(unsigned Type) const override;
   void writeGotPlt(uint8_t *Buf, uint64_t Plt) const override;
   void writePltZero(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   unsigned getTlsGotRel(unsigned Type) const override;
   bool isTlsDynRel(unsigned Type, const SymbolBody &S) const override;
   bool needsDynRelative(unsigned Type) const override;
   bool needsCopyRel(uint32_t Type, const SymbolBody &S) const override;

 bool TargetInfo::isTlsLocalDynamicRel(unsigned Type) const {
   return false;
 }
 
 bool TargetInfo::isTlsGlobalDynamicRel(unsigned Type) const {
   return false;
 }
 
+bool TargetInfo::isTlsGlobalDescDynamicRel(unsigned Type) const {
+  return false;
+}
+
 unsigned TargetInfo::relaxTls(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
                               uint64_t P, uint64_t SA,
                               const SymbolBody *S) const {
   return 0;
 }
 
 X86TargetInfo::X86TargetInfo() {
   CopyRel = R_386_COPY;
AArch64TargetInfo::AArch64TargetInfo() {
   CopyRel = R_AARCH64_COPY;
   RelativeRel = R_AARCH64_RELATIVE;
   IRelativeRel = R_AARCH64_IRELATIVE;
   GotRel = R_AARCH64_GLOB_DAT;
   PltRel = R_AARCH64_JUMP_SLOT;
   TlsGotRel = R_AARCH64_TLS_TPREL64;
   TlsModuleIndexRel = R_AARCH64_TLS_DTPMOD64;
   TlsOffsetRel = R_AARCH64_TLS_DTPREL64;
+  TlsDescRel = R_AARCH64_TLSDESC;
   UseLazyBinding = true;
   PltEntrySize = 16;
   PltZeroSize = 32;
 }
 
-bool AArch64TargetInfo::isTlsGlobalDynamicRel(unsigned Type) const {
+bool AArch64TargetInfo::isTlsGlobalDescDynamicRel(unsigned Type) const {
   return Type == R_AARCH64_TLSDESC_ADR_PAGE21 ||
          Type == R_AARCH64_TLSDESC_LD64_LO12_NC ||
          Type == R_AARCH64_TLSDESC_ADD_LO12_NC ||
          Type == R_AARCH64_TLSDESC_CALL;
 }
 
 unsigned AArch64TargetInfo::getDynRel(unsigned Type) const {
   if (Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64)
     return Type;
   StringRef S = getELFRelocationTypeName(EM_AARCH64, Type);
   error("Relocation " + S + " cannot be used when making a shared object; "
                             "recompile with -fPIC.");

 
 unsigned AArch64TargetInfo::getTlsGotRel(unsigned Type) const {
   assert(Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 ||
     Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC);
     return Type;
 }
 
 bool AArch64TargetInfo::isTlsDynRel(unsigned Type, const SymbolBody &S) const {
-  return Type == R_AARCH64_TLSDESC_ADR_PAGE21 ||
-         Type == R_AARCH64_TLSDESC_LD64_LO12_NC ||
-         Type == R_AARCH64_TLSDESC_ADD_LO12_NC ||
-         Type == R_AARCH64_TLSDESC_CALL ||
-         Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 ||
-         Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
+  if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 ||
+      Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC)
+    return canBePreempted(&S, true);
+  return false;
 }
 
 bool AArch64TargetInfo::needsDynRelative(unsigned Type) const {
   return Config->Shared && Type == R_AARCH64_ABS64;
 }
 
 bool AArch64TargetInfo::needsCopyRel(uint32_t Type, const SymbolBody &S) const {
   if (Config->Shared)

 }
 
 bool AArch64TargetInfo::needsGot(uint32_t Type, SymbolBody &S) const {
   switch (Type) {
   case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
   case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
   case R_AARCH64_ADR_GOT_PAGE:
   case R_AARCH64_LD64_GOT_LO12_NC:
+  case R_AARCH64_TLSDESC_ADR_PAGE21:
+  case R_AARCH64_TLSDESC_LD64_LO12_NC:
+  case R_AARCH64_TLSDESC_ADD_LO12_NC:
     return true;
   default:
     return needsPlt(Type, S);
   }
 }
 
 TargetInfo::PltNeed AArch64TargetInfo::needsPlt(uint32_t Type,
                                                 const SymbolBody &S) const {
   if (isGnuIFunc<ELF64LE>(S))
     return Plt_Explicit;
   switch (Type) {
   default:
     return Plt_No;
   case R_AARCH64_CALL26:
   case R_AARCH64_CONDBR19:
   case R_AARCH64_JUMP26:
   case R_AARCH64_TSTBR14:
     if (canBePreempted(&S, true))
       return Plt_Explicit;
     return Plt_No;
+  case R_AARCH64_TLSDESC_ADR_PAGE21:
+  case R_AARCH64_TLSDESC_LD64_LO12_NC:
+  case R_AARCH64_TLSDESC_ADD_LO12_NC:
+    return Plt_Explicit;
   }
 }
 
 static void updateAArch64Addr(uint8_t *L, uint64_t Imm) {
   uint32_t ImmLo = (Imm & 0x3) << 29;
   uint32_t ImmHi = ((Imm & 0x1FFFFC) >> 2) << 5;
   uint64_t Mask = (0x3 << 29) | (0x7FFFF << 5);
   write32le(L, (read32le(L) & ~Mask) | ImmLo | ImmHi);
void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
   case R_AARCH64_ABS32:
     checkIntUInt<32>(SA, Type);
     write32le(Loc, SA);
     break;
   case R_AARCH64_ABS64:
     write64le(Loc, SA);
     break;
   case R_AARCH64_ADD_ABS_LO12_NC:
+  case R_AARCH64_TLSDESC_ADD_LO12_NC:
     // This relocation stores 12 bits and there's no instruction
     // to do it. Instead, we do a 32 bits store of the value
     // of r_addend bitwise-or'ed Loc. This assumes that the addend
     // bits in Loc are zero.
     or32le(Loc, (SA & 0xFFF) << 10);
     break;
   case R_AARCH64_ADR_GOT_PAGE: {
     uint64_t X = getAArch64Page(SA) - getAArch64Page(P);
     checkInt<33>(X, Type);
     updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
     break;
   }
   case R_AARCH64_ADR_PREL_LO21: {
     uint64_t X = SA - P;
     checkInt<21>(X, Type);
     updateAArch64Addr(Loc, X & 0x1FFFFF);
     break;
   }
   case R_AARCH64_ADR_PREL_PG_HI21:
-  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: {
+  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
+  case R_AARCH64_TLSDESC_ADR_PAGE21: {
     uint64_t X = getAArch64Page(SA) - getAArch64Page(P);
     checkInt<33>(X, Type);
     updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
     break;
   }
   case R_AARCH64_CALL26:
   case R_AARCH64_JUMP26: {
     uint64_t X = SA - P;
     checkInt<28>(X, Type);
     or32le(Loc, (X & 0x0FFFFFFC) >> 2);
     break;
   }
   case R_AARCH64_CONDBR19: {
     uint64_t X = SA - P;
     checkInt<21>(X, Type);
     or32le(Loc, (X & 0x1FFFFC) << 3);
     break;
   }
   case R_AARCH64_LD64_GOT_LO12_NC:
   case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+  case R_AARCH64_TLSDESC_LD64_LO12_NC:
     checkAlignment<8>(SA, Type);
     or32le(Loc, (SA & 0xFF8) << 7);
     break;
   case R_AARCH64_LDST128_ABS_LO12_NC:
     or32le(Loc, (SA & 0x0FF8) << 6);
     break;
   case R_AARCH64_LDST16_ABS_LO12_NC:
     or32le(Loc, (SA & 0x0FFC) << 9);
case R_AARCH64_TLSLE_ADD_TPREL_HI12: {
     updateAArch64Add(Loc, (V & 0xFFF000) >> 12);
     break;
   }
   case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC: {
     uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + SA;
     updateAArch64Add(Loc, V & 0xFFF);
     break;
   }
+  case R_AARCH64_TLSDESC_CALL:
+    break;
   default:
     fatal("unrecognized reloc " + Twine(Type));
   }
 }
 
 bool AArch64TargetInfo::canRelaxTls(unsigned Type, const SymbolBody *S) const {
   if (Config->Shared || (S && !S->isTls()))
     return false;
 
   // Global-Dynamic relocs can be relaxed to Initial-Exec if the target is
   // an executable.  And if the target is local it can also be fully relaxed to
   // Local-Exec.
-  if (isTlsGlobalDynamicRel(Type))
+  if (isTlsGlobalDescDynamicRel(Type))
     return !canBePreempted(S, true);
 
   // Initial-Exec relocs can be relaxed to Local-Exec if the target is a local
   // symbol.
   if (Type == R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 ||
       Type == R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC)
     return !canBePreempted(S, true);
 

ELF/Writer.cpp

if (Out<ELFT>::Got->addTlsIndex())
                                     DynamicReloc<ELFT>::Off_LTlsIndex,
                                     nullptr});
     return true;
   }
 
   if (!Body || !Body->isTls())
     return false;
 
-  if (Target->isTlsGlobalDynamicRel(Type)) {
+  if (Target->isTlsGlobalDescDynamicRel(Type)) {
+    if (!Target->canRelaxTls(Type, Body) &&
+        Out<ELFT>::Got->addDynTlsEntry(Body)) {
+      Out<ELFT>::RelaDyn->addReloc(
+          {Target->TlsDescRel, DynamicReloc<ELFT>::Off_GTlsIndex, Body});
+      return true;
+    }
+    if (!canBePreempted(Body, true))
+      return true;
+  } else if (Target->isTlsGlobalDynamicRel(Type)) {
     if (!Target->canRelaxTls(Type, Body) &&
         Out<ELFT>::Got->addDynTlsEntry(Body)) {
       Out<ELFT>::RelaDyn->addReloc(
           {Target->TlsModuleIndexRel, DynamicReloc<ELFT>::Off_GTlsIndex, Body});
       Out<ELFT>::RelaDyn->addReloc(
           {Target->TlsOffsetRel, DynamicReloc<ELFT>::Off_GTlsOffset, Body});
       return true;
     }
     if (!canBePreempted(Body, true))
       return true;
   }
+
   return !Target->isTlsDynRel(Type, *Body);
 }
 
 // The reason we have to do this early scan is as follows
 // * To mmap the output file, we need to know the size
 // * For that, we need to know how many dynamic relocs we will have.
 // It might be possible to avoid this by outputting the file with write:
 // * Write the allocated output sections, computing addresses.

test/ELF/aarch64-tls-tlsdesc.s

+# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-linux %s -o %t.o
+# RUN: ld.lld -shared %t.o -o %tout.so
+# RUN: llvm-objdump -d %tout.so | FileCheck %s
+# RUN: llvm-readobj -s -r %tout.so | FileCheck -check-prefix=RELOC %s
+# REQUIRES: aarch64
+
+# It references to an external __thread variable in PIC mode so
+# no relax is possible.  Linker should create a dynamic R_AARCH64_TLSDESC
+# relocation against t1.
+
+#RELOC:      Relocations [
+#RELOC-NEXT: {{.*}} .rela.dyn {
+#RELOC-NEXT: {{.*}} R_AARCH64_TLSDESC t1
+
+#CHECK:  1000:  fd 7b bf a9     stp     x29, x30, [sp, #-16]!
+#CHECK:  1004:  fd 03 00 91     mov     x29, sp
+#CHECK:  1008:  00 00 00 b0     adrp    x0, #4096
+#CHECK:  100c:  01 48 40 f9     ldr     x1, [x0, #144]
+#CHECK:  1010:  00 40 02 91     add     x0, x0, #144
+#CHECK:  1014:  20 00 3f d6     blr     x1
+
+
+.global f1
+.type   f1, %function
+f1:
+ stp     x29, x30, [sp, -16]!
+ add     x29, sp, 0
+ adrp    x0, :tlsdesc:t1
+ ldr     x1, [x0, #:tlsdesc_lo12:t1]
+ add     x0, x0, :tlsdesc_lo12:t1
+ .tlsdesccall    t1
+ blr     x1
+ mrs     x1, tpidr_el0
+ ldr     w0, [x1,x0]
+ ldp     x29, x30, [sp], 16
+ ret