Now with variadic support for msan on aarch6 there is no need for
XFAIL signal_stress_test anymore. Also to garantee aligned stores
for the FP/SIMD arguments enforce the '__msan_va_arg_tls' alignment
to sizeof the SIMD register (16).
This patch relies on llvm patch http://reviews.llvm.org/D15386
This only aligns the first element of the array. Why is that sufficient?
Do you need to change instrumentation as well to align each next store location to 16 bytes?