Pass subtarget feature "+reserve-r9" instead of passing backend option "-arm-reserve-r9"

[ahatanak]

Summary

This is needed since backend options do not make it to the backend when doing LTO.

[t.p.northover]

Looks reasonable (obviously assuming it goes in at the same time as D11320).

Tim.

[echristo]

Question:

Would it be better to just use reserve=NUM and parse that rather than the single +/- per register? Or is it just not worth it here?

[ahatanak]

In D11319#208367, @echristo wrote:

Question:

Would it be better to just use reserve=NUM and parse that rather than the single +/- per register? Or is it just not worth it here?

I guess it could be useful for debugging or testing code-gen passes (for example, register allocator).

AArch64 has a similar option "aarch64-reserve-x18". Are there other targets or use cases that require reserving registers?

[echristo]

The only other use case I can think of is something like the -ffixed-reg= option. I remember there being some issues with trying that in the register allocator, but it might make sense.

Thoughts?

-eric

[MatzeB]

This case sounds like r9 is a typical ABI difference on the ARM target. Unless there is an example of a real-world ARM ABI case that would benefit from reserving another register I'd not introduce a general reservation mechanism.

In any case this should be independent of switches to the test the register allocator. Testing switches should use cl::opts while proper ABI stuff should indeed use subtarget features.

[echristo]

Sure, I'm willing to go with that.

Thanks!

-eric

[ahatanak]

Thanks, I'll go with this patch then.

cfe/trunk/lib/Driver/Tools.cpp

static void getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,
   if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
                                options::OPT_mno_long_calls)) {
     if (A->getOption().matches(options::OPT_mlong_calls))
       Features.push_back("+long-calls");
   } else if (KernelOrKext && (!Triple.isiOS() || Triple.isOSVersionLT(6))) {
       Features.push_back("+long-calls");
   }
 
+  // llvm does not support reserving registers in general. There is support
+  // for reserving r9 on ARM though (defined as a platform-specific register
+  // in ARM EABI).
+  if (Args.hasArg(options::OPT_ffixed_r9))
+    Features.push_back("+reserve-r9");
+
   // The kext linker doesn't know how to deal with movw/movt.
   if (KernelOrKext)
     Features.push_back("+no-movt");
 }
 
 void Clang::AddARMTargetArgs(const ArgList &Args, ArgStringList &CmdArgs,
                              bool KernelOrKext) const {
   const Driver &D = getToolChain().getDriver();
if (Arg *A = Args.getLastArg(options::OPT_mglobal_merge,
     else
       CmdArgs.push_back("-arm-global-merge=true");
   }
 
   if (!Args.hasFlag(options::OPT_mimplicit_float,
                     options::OPT_mno_implicit_float, true))
     CmdArgs.push_back("-no-implicit-float");
 
-  // llvm does not support reserving registers in general. There is support
-  // for reserving r9 on ARM though (defined as a platform-specific register
-  // in ARM EABI).
-  if (Args.hasArg(options::OPT_ffixed_r9)) {
-    CmdArgs.push_back("-backend-option");
-    CmdArgs.push_back("-arm-reserve-r9");
-  }
 }
 
 /// getAArch64TargetCPU - Get the (LLVM) name of the AArch64 cpu we are
 /// targeting.
 static std::string getAArch64TargetCPU(const ArgList &Args) {
   Arg *A;
   std::string CPU;
   // If we have -mtune or -mcpu, use that.

cfe/trunk/test/Driver/arm-fixed-r9.c

 // RUN: %clang -target arm-none-gnueabi -ffixed-r9 -### %s 2> %t
 // RUN: FileCheck --check-prefix=CHECK-FIXED-R9 < %t %s
 
-// CHECK-FIXED-R9: "-backend-option" "-arm-reserve-r9"
+// CHECK-FIXED-R9: "-target-feature" "+reserve-r9"