AArch64: allocate 4-byte slot for arm64_32 pointers during tail call.

[t.p.northover]

Summary

Currently we use the i64 type for pointers on arm64_32 which ends up with overlapping objects and eventually causes an assertion failure in PrologEpilogInserter.

This uses the LocVT instead for arm64_32 pointers (the only type in AArch64CallingConvention.td that actually selects Trunc as an option).

[fhahn]

LGTM thanks! As mentioned in the commit message, this should match the definition in AArch64CallingConvention.td which demotes pointers back to i32.

llvm/test/CodeGen/AArch64/swifttail-arm64_32.ll

6

The test ensures we do not crash in PrologEpilogInserter any longer, but it might be good to include check lines for the function & call setups?

[t.p.northover]

Thanks, 7802f62b3f2c with a better test.

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

if (VA.isRegLoc()) {
 
       SDValue DstAddr;
       MachinePointerInfo DstInfo;
 
       // FIXME: This works on big-endian for composite byvals, which are the
       // common case. It should also work for fundamental types too.
       uint32_t BEAlign = 0;
       unsigned OpSize;
-      if (VA.getLocInfo() == CCValAssign::Indirect)
+      if (VA.getLocInfo() == CCValAssign::Indirect ||
+          VA.getLocInfo() == CCValAssign::Trunc)
         OpSize = VA.getLocVT().getFixedSizeInBits();
       else
         OpSize = Flags.isByVal() ? Flags.getByValSize() * 8
                                  : VA.getValVT().getSizeInBits();
       OpSize = (OpSize + 7) / 8;
       if (!Subtarget->isLittleEndian() && !Flags.isByVal() &&
           !Flags.isInConsecutiveRegs()) {
         if (OpSize < 8)

llvm/test/CodeGen/AArch64/swifttail-arm64_32.ll

+; RUN: llc -mtriple=arm64_32-apple-watchos %s -o - | FileCheck %s
+
+declare swifttailcc void @pointer_align_callee([8 x i64], i32, i32, i32, i8*)
+define swifttailcc void @pointer_align_caller(i8* swiftasync %as, i8* %in) "frame-pointer"="all" {
+; CHECK-LABEL: pointer_align_caller:
+; CHECK: b _pointer_align_callee
+  alloca i32
+  musttail call swifttailcc void @pointer_align_callee([8 x i64] undef, i32 0, i32 1, i32 2, i8* %in)
+  ret void
+}