[X86] Add _mm256_set_m128 and friends

[mkuper]

Summary

This adds 6 _mm256_set(r)_m128(i/d) intrinsics.

[andreadb]

Hi Michael,

I suggested a couple of changes to the patch.

I hope it helps!
-Andrea

lib/Headers/avxintrin.h

1273–1278

You can simply this using a single shuffle.

_mm256_set_m128 (__m128 __hi, __m128 __lo) {
  return (__m256) __builtin_shufflevector(__lo, __hi, 0, 1, 2, 3, 4, 5, 6, 7);
}

test/CodeGen/avx-shuffle-builtins.c

177–183

You would only need to check for a single shufflevector with mask <0,1,2,3,4,5,6,7> if you simplify the body of '_mm256_set_m128'.

[mkuper]

Argh, right, for some reason I thought __builtin_shufflevector was more restricted in terms of types than actual shufflevector.

Thanks, Andrea!

lib/Headers/avxintrin.h

_mm256_storeu2_m128i(__m128i *__addr_hi, __m128i *__addr_lo, __m256i __a)
   __m128i __v128;
 
   __v128 = _mm256_castsi256_si128(__a);
   __builtin_ia32_storedqu((char *)__addr_lo, (__v16qi)__v128);
   __v128 = _mm256_extractf128_si256(__a, 1);
   __builtin_ia32_storedqu((char *)__addr_hi, (__v16qi)__v128);
 }
 
+static __inline __m256 __attribute__((__always_inline__, __nodebug__))
+_mm256_set_m128 (__m128 __hi, __m128 __lo) {
+  __m256 __hi256 = _mm256_castps128_ps256(__hi);
+  __m256 __lo256 = _mm256_castps128_ps256(__lo);
+  return __builtin_shufflevector(__lo256, __hi256, 0, 1, 2, 3, 8, 9, 10, 11);
+}
+
+static __inline __m256d __attribute__((__always_inline__, __nodebug__))
+_mm256_set_m128d (__m128d __hi, __m128d __lo) {
+  return (__m256d)_mm256_set_m128((__m128)__hi, (__m128)__lo);
+}
+
+static __inline __m256i __attribute__((__always_inline__, __nodebug__))
+_mm256_set_m128i (__m128i __hi, __m128i __lo) {
+  return (__m256i)_mm256_set_m128((__m128)__hi, (__m128)__lo);
+}
+
+static __inline __m256 __attribute__((__always_inline__, __nodebug__))
+_mm256_setr_m128 (__m128 __lo, __m128 __hi) {
+  return _mm256_set_m128(__hi, __lo);
+}
+
+static __inline __m256d __attribute__((__always_inline__, __nodebug__))
+_mm256_setr_m128d (__m128d __lo, __m128d __hi) {
+  return (__m256d)_mm256_set_m128((__m128)__hi, (__m128)__lo);
+}
+
+static __inline __m256i __attribute__((__always_inline__, __nodebug__))
+_mm256_setr_m128i (__m128i __lo, __m128i __hi) {
+  return (__m256i)_mm256_set_m128((__m128)__hi, (__m128)__lo);
+}
+
 #endif /* __AVXINTRIN_H */

test/CodeGen/avx-shuffle-builtins.c

 }
 
 __m128i test_mm256_extractf128_si256_1(__m256i a) {
   // CHECK-LABEL: @test_mm256_extractf128_si256_1
   // CHECK: shufflevector{{.*}}<i32 2, i32 3>
   return _mm256_extractf128_si256(a, 1);
 }
 
+__m256 test_mm256_set_m128(__m128 hi, __m128 lo) {
+  // CHECK-LABEL: @test_mm256_set_m128
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
+  return _mm256_set_m128(hi, lo);
+}
+
+__m256d test_mm256_set_m128d(__m128d hi, __m128d lo) {
+  // CHECK-LABEL: @test_mm256_set_m128d
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>  
+  return _mm256_set_m128d(hi, lo);
+}
+
+__m256i test_mm256_set_m128i(__m128i hi, __m128i lo) {
+  // CHECK-LABEL: @test_mm256_set_m128i
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>  
+  return _mm256_set_m128i(hi, lo);
+}
+
+__m256 test_mm256_setr_m128(__m128 hi, __m128 lo) {
+  // CHECK-LABEL: @test_mm256_setr_m128
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>  
+  return _mm256_setr_m128(lo, hi);
+}
+
+__m256d test_mm256_setr_m128d(__m128d hi, __m128d lo) {
+  // CHECK-LABEL: @test_mm256_setr_m128d
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>  
+  return _mm256_setr_m128d(lo, hi);
+}
+
+__m256i test_mm256_setr_m128i(__m128i hi, __m128i lo) {
+  // CHECK-LABEL: @test_mm256_setr_m128i
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>  
+  return _mm256_setr_m128i(lo, hi);
+}