[mips] [IAS] Refactor the function which checks for the availability of AT. NFC.

[tomatabacu]

Summary

Refactor MipsAsmParser::getATReg to return an internal register number instead of a register index.
Also change all the int's to unsigned, seeing as the current AT register index is stored as an unsigned in MipsAssemblerOptions.

[tomatabacu]

Remove other WIP from this patch.

[dsanders]

I agree with changing the int's to unsigned but I think the re-factor is going in the wrong direction at the moment. Instead of partially inlining MipsAsmParser::getATReg() and having a predicate function with side effects (error messages), I'd instead either rename it getATRegIndex() to make it clear it's an index rather than an internal register number, or I'd move the getReg() call inside the function so that it does return an internal register number.

[tomatabacu]

Reverted the isATAvailable change.
Changed getATReg to return an internal register number instead of a register index.

[dsanders]

LGTM

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

2400

We should correct this getATRegNum() function too since it really returns an index. That can be a follow-on patch if you prefer.

[tomatabacu]

Replied to an inline comment.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

2400

getATRegNum() is renamed to getATRegIndex() in D8480, which depends on this patch.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

#include "MipsGenAsmMatcher.inc"
   int matchMSA128RegisterName(StringRef Name);
 
   int matchMSA128CtrlRegisterName(StringRef Name);
 
   unsigned getReg(int RC, int RegNo);
 
   unsigned getGPR(int RegNo);
 
-  int getATReg(SMLoc Loc);
-
   bool processInstruction(MCInst &Inst, SMLoc IDLoc,
                           SmallVectorImpl<MCInst> &Instructions);
 
   // Helper function that checks if the value of a vector index is within the
   // boundaries of accepted values for each RegisterKind
   // Example: INSERT.B $w0[n], $1 => 16 > n >= 0
   bool validateMSAIndex(int Val, int RegKind);
 
#undef GET_OPERAND_DIAGNOSTIC_TYPES
   bool inMips16Mode() const {
     return STI.getFeatureBits() & Mips::FeatureMips16;
   }
   // TODO: see how can we get this info.
   bool abiUsesSoftFloat() const { return false; }
 
   /// Warn if RegNo is the current assembler temporary.
   void warnIfAssemblerTemporary(int RegNo, SMLoc Loc);
+
+  /// Error if AT is set to $0 (i.e. is unavailable).
+  /// This should be used in pseudo-instruction expansions which need AT.
+  bool isATAvailable(SMLoc IDLoc);
 };
 }
 
 namespace {
 
 /// MipsOperand - Instances of this class represent a parsed Mips machine
 /// instruction.
 class MipsOperand : public MCParsedAsmOperand {
void MipsAsmParser::expandMemInst(MCInst &Inst, SMLoc IDLoc,
   int16_t RegClassOp0 = Desc.OpInfo[0].RegClass;
   unsigned RegClassIDOp0 =
       getContext().getRegisterInfo()->getRegClass(RegClassOp0).getID();
   bool IsGPR = (RegClassIDOp0 == Mips::GPR32RegClassID) ||
                (RegClassIDOp0 == Mips::GPR64RegClassID);
   if (isLoad && IsGPR && (BaseRegNum != RegOpNum))
     TmpRegNum = RegOpNum;
   else {
-    int AT = getATReg(IDLoc);
-    // At this point we need AT to perform the expansions and we exit if it is
-    // not available.
-    if (!AT)
+    // At this point we need AT to perform the expansions.
+    // If it is not available, an error is given and then we exit.
+    if (!isATAvailable(IDLoc))
       return;
+
+    unsigned AT = AssemblerOptions.back()->getATRegNum();
     TmpRegNum = getReg(
         (isGP64bit()) ? Mips::GPR64RegClassID : Mips::GPR32RegClassID, AT);
   }
 
   TempInst.setOpcode(Mips::LUi);
   TempInst.addOperand(MCOperand::CreateReg(TmpRegNum));
   if (isImmOpnd)
     TempInst.addOperand(MCOperand::CreateImm(HiOffset));
case Match_MnemonicFail:
     return Error(IDLoc, "invalid instruction");
   case Match_RequiresDifferentSrcAndDst:
     return Error(IDLoc, "source and destination must be different");
   }
 
   llvm_unreachable("Implement any new match types added!");
 }
 
+bool MipsAsmParser::isATAvailable(SMLoc IDLoc) {
+  // If AT is not available, give an error.
+  if (AssemblerOptions.back()->getATRegNum() == 0) {
+    reportParseError(
+        IDLoc, "pseudo-instruction requires $at, which is not available");
+    return false;
+  }
+  return true;
+}
+
 void MipsAsmParser::warnIfAssemblerTemporary(int RegIndex, SMLoc Loc) {
   if ((RegIndex != 0) && 
       ((int)AssemblerOptions.back()->getATRegNum() == RegIndex)) {
     if (RegIndex == 1)
       Warning(Loc, "used $at without \".set noat\"");
     else
       Warning(Loc, Twine("used $") + Twine(RegIndex) + " with \".set at=$" +
                        Twine(RegIndex) + "\"");

 bool MipsAssemblerOptions::setATReg(unsigned Reg) {
   if (Reg > 31)
     return false;
 
   ATReg = Reg;
   return true;
 }
 
-int MipsAsmParser::getATReg(SMLoc Loc) {
-  int AT = AssemblerOptions.back()->getATRegNum();
-  if (AT == 0)
-    reportParseError(Loc,
-                     "pseudo-instruction requires $at, which is not available");
-  return AT;
-}
-
 unsigned MipsAsmParser::getReg(int RC, int RegNo) {
   return *(getContext().getRegisterInfo()->getRegClass(RC).begin() + RegNo);
 }
 
 unsigned MipsAsmParser::getGPR(int RegNo) {
   return getReg(isGP64bit() ? Mips::GPR64RegClassID : Mips::GPR32RegClassID,
                 RegNo);
 }