[NFC][LV][TEST]: extend pr45679-fold-tail-by-masking.ll with a run of -force-vector-width=1 -force-vector-interleave=4

[anhtuyen]

Summary

The extension was added to llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll.
The better place for it should be in its original place i.e. llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
This NFC patch is to carry out the above change.

[anhtuyen]

Hello Ayal @Ayal , when you have some time, can you review this patch to the testcases, please! Thank you very much!

[Ayal]

Looks good to me, thanks for following-up on this suggestion from D79976.

llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll

4

nit: CHECK-VF1 may be renamed VF1UF4

[anhtuyen]

Thank you very much Ayal for your suggestion. I adjusted the file accordingly.

llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -loop-vectorize -force-vector-width=4 -S | FileCheck %s
 ; RUN: opt < %s -loop-vectorize -force-vector-width=2 -force-vector-interleave=2 -S | FileCheck %s -check-prefix=VF2UF2
+; RUN: opt < %s -loop-vectorize -force-vector-width=1 -force-vector-interleave=4 -S | FileCheck %s -check-prefix=VF1UF4
 
 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
 
 ; Make sure a loop is vectorized correctly with fold-tail when the constant
 ; trip-count is not a multiple of -force-vector-width and/or
 ; -force-vector-interleave, but is a multiple of the internally computed MaxVF;
 ; e.g., when all types are i32 lead to MaxVF=1.
 

 ; VF2UF2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]]
 ; VF2UF2-NEXT:    store i32 13, i32* [[ARRAYIDX]], align 1
 ; VF2UF2-NEXT:    [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1
 ; VF2UF2-NEXT:    [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], 14
 ; VF2UF2-NEXT:    br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop !2
 ; VF2UF2:       exit:
 ; VF2UF2-NEXT:    ret void
 ;
+; VF1UF4-LABEL: @pr45679(
+; VF1UF4-NEXT:  entry:
+; VF1UF4-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
+; VF1UF4:       vector.ph:
+; VF1UF4-NEXT:    br label [[VECTOR_BODY:%.*]]
+; VF1UF4:       vector.body:
+; VF1UF4-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE9:%.*]] ]
+; VF1UF4-NEXT:    [[INDUCTION:%.*]] = add i32 [[INDEX]], 0
+; VF1UF4-NEXT:    [[INDUCTION1:%.*]] = add i32 [[INDEX]], 1
+; VF1UF4-NEXT:    [[INDUCTION2:%.*]] = add i32 [[INDEX]], 2
+; VF1UF4-NEXT:    [[INDUCTION3:%.*]] = add i32 [[INDEX]], 3
+; VF1UF4-NEXT:    [[TMP0:%.*]] = icmp ule i32 [[INDUCTION]], 13
+; VF1UF4-NEXT:    [[TMP1:%.*]] = icmp ule i32 [[INDUCTION1]], 13
+; VF1UF4-NEXT:    [[TMP2:%.*]] = icmp ule i32 [[INDUCTION2]], 13
+; VF1UF4-NEXT:    [[TMP3:%.*]] = icmp ule i32 [[INDUCTION3]], 13
+; VF1UF4-NEXT:    br i1 [[TMP0]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
+; VF1UF4:       pred.store.if:
+; VF1UF4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[INDUCTION]]
+; VF1UF4-NEXT:    store i32 13, i32* [[TMP4]], align 1
+; VF1UF4-NEXT:    br label [[PRED_STORE_CONTINUE]]
+; VF1UF4:       pred.store.continue:
+; VF1UF4-NEXT:    br i1 [[TMP1]], label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]]
+; VF1UF4:       pred.store.if4:
+; VF1UF4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[INDUCTION1]]
+; VF1UF4-NEXT:    store i32 13, i32* [[TMP5]], align 1
+; VF1UF4-NEXT:    br label [[PRED_STORE_CONTINUE5]]
+; VF1UF4:       pred.store.continue5:
+; VF1UF4-NEXT:    br i1 [[TMP2]], label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7:%.*]]
+; VF1UF4:       pred.store.if6:
+; VF1UF4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[INDUCTION2]]
+; VF1UF4-NEXT:    store i32 13, i32* [[TMP6]], align 1
+; VF1UF4-NEXT:    br label [[PRED_STORE_CONTINUE7]]
+; VF1UF4:       pred.store.continue7:
+; VF1UF4-NEXT:    br i1 [[TMP3]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9]]
+; VF1UF4:       pred.store.if8:
+; VF1UF4-NEXT:    [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[INDUCTION3]]
+; VF1UF4-NEXT:    store i32 13, i32* [[TMP7]], align 1
+; VF1UF4-NEXT:    br label [[PRED_STORE_CONTINUE9]]
+; VF1UF4:       pred.store.continue9:
+; VF1UF4-NEXT:    [[INDEX_NEXT]] = add i32 [[INDEX]], 4
+; VF1UF4-NEXT:    [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], 16
+; VF1UF4-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]]
+; VF1UF4:       middle.block:
+; VF1UF4-NEXT:    br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
+; VF1UF4:       scalar.ph:
+; VF1UF4-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ 16, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
+; VF1UF4-NEXT:    br label [[LOOP:%.*]]
+; VF1UF4:       loop:
+; VF1UF4-NEXT:    [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [[LOOP]] ]
+; VF1UF4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]]
+; VF1UF4-NEXT:    store i32 13, i32* [[ARRAYIDX]], align 1
+; VF1UF4-NEXT:    [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1
+; VF1UF4-NEXT:    [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], 14
+; VF1UF4-NEXT:    br i1 [[COND]], label [[EXIT]], label [[LOOP]]
+; VF1UF4:       exit:
+; VF1UF4-NEXT:    ret void
+;
 entry:
   br label %loop
 
 loop:
   %riv = phi i32 [ 0, %entry ], [ %rivPlus1, %loop ]
   %arrayidx = getelementptr inbounds i32, i32* %A, i32 %riv
   store i32 13, i32* %arrayidx, align 1
   %rivPlus1 = add nuw nsw i32 %riv, 1
   %cond = icmp eq i32 %rivPlus1, 14
   br i1 %cond, label %exit, label %loop
 
 exit:
   ret void
 }

llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s  -loop-vectorize -force-vector-interleave=4 -pass-remarks='loop-vectorize' -disable-output -S 2>&1 | FileCheck %s --check-prefix=CHECK-REMARKS
 ; RUN: opt < %s  -loop-vectorize -force-vector-interleave=4 -S | FileCheck %s
-; RUN: opt < %s  -loop-vectorize -force-vector-width=1 -force-vector-interleave=4 -S | FileCheck %s --check-prefix=CHECK-VF1
 
 ; These tests are to check that fold-tail procedure produces correct scalar code when
 ; loop-vectorization is only unrolling but not vectorizing.
 
 ; CHECK-REMARKS:      remark: {{.*}} interleaved loop (interleaved count: 4)
 ; CHECK-REMARKS-NEXT: remark: {{.*}} interleaved loop (interleaved count: 4)
 ; CHECK-REMARKS-NOT:  remark: {{.*}} vectorized loop
 
for.cond.cleanup:
   ret void
 
 for.body:
   %addr = phi double* [ %ptr, %for.body ], [ %ptr1, %entry ]
   %ptr = getelementptr inbounds double, double* %addr, i64 1
   %cond = icmp eq double* %ptr, %ptr2
   br i1 %cond, label %for.cond.cleanup, label %for.body
 }
-
-; The following testcase is extended from the test of https://reviews.llvm.org/D80085
-; Similar to two tests above, it is to check that fold-tail procedure produces correct scalar code when
-; loop-vectorization is only unrolling but not vectorizing.
-
-define void @pr45679(i32* %A) optsize {
-; CHECK-VF1-LABEL: @pr45679
-; CHECK-VF1-NEXT:  entry:
-; CHECK-VF1-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
-; CHECK-VF1:       vector.ph:
-; CHECK-VF1-NEXT:    br label [[VECTOR_BODY:%.*]]
-; CHECK-VF1:       vector.body:
-; CHECK-VF1-NEXT:    [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE9:%.*]] ]
-; CHECK-VF1-NEXT:    [[INDUCTION:%.*]] = add i32 [[INDEX]], 0
-; CHECK-VF1-NEXT:    [[INDUCTION1:%.*]] = add i32 [[INDEX]], 1
-; CHECK-VF1-NEXT:    [[INDUCTION2:%.*]] = add i32 [[INDEX]], 2
-; CHECK-VF1-NEXT:    [[INDUCTION3:%.*]] = add i32 [[INDEX]], 3
-; CHECK-VF1-NEXT:    [[TMP0:%.*]] = icmp ule i32 [[INDUCTION]], 13
-; CHECK-VF1-NEXT:    [[TMP1:%.*]] = icmp ule i32 [[INDUCTION1]], 13
-; CHECK-VF1-NEXT:    [[TMP2:%.*]] = icmp ule i32 [[INDUCTION2]], 13
-; CHECK-VF1-NEXT:    [[TMP3:%.*]] = icmp ule i32 [[INDUCTION3]], 13
-; CHECK-VF1-NEXT:    br i1 [[TMP0]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
-; CHECK-VF1:       pred.store.if:
-; CHECK-VF1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[INDUCTION]]
-; CHECK-VF1-NEXT:    store i32 13, i32* [[TMP4]], align 1
-; CHECK-VF1-NEXT:    br label [[PRED_STORE_CONTINUE]]
-; CHECK-VF1:       pred.store.continue:
-; CHECK-VF1-NEXT:    br i1 [[TMP1]], label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]]
-; CHECK-VF1:       pred.store.if4:
-; CHECK-VF1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[INDUCTION1]]
-; CHECK-VF1-NEXT:    store i32 13, i32* [[TMP5]], align 1
-; CHECK-VF1-NEXT:    br label [[PRED_STORE_CONTINUE5]]
-; CHECK-VF1:       pred.store.continue5:
-; CHECK-VF1-NEXT:    br i1 [[TMP2]], label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7:%.*]]
-; CHECK-VF1:       pred.store.if6:
-; CHECK-VF1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[INDUCTION2]]
-; CHECK-VF1-NEXT:    store i32 13, i32* [[TMP6]], align 1
-; CHECK-VF1-NEXT:    br label [[PRED_STORE_CONTINUE7]]
-; CHECK-VF1:       pred.store.continue7:
-; CHECK-VF1-NEXT:    br i1 [[TMP3]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9]]
-; CHECK-VF1:       pred.store.if8:
-; CHECK-VF1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[INDUCTION3]]
-; CHECK-VF1-NEXT:    store i32 13, i32* [[TMP7]], align 1
-; CHECK-VF1-NEXT:    br label [[PRED_STORE_CONTINUE9]]
-; CHECK-VF1:       pred.store.continue9:
-; CHECK-VF1-NEXT:    [[INDEX_NEXT]] = add i32 [[INDEX]], 4
-; CHECK-VF1-NEXT:    [[TMP8:%.*]] = icmp eq i32 [[INDEX_NEXT]], 16
-; CHECK-VF1-NEXT:    br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]]
-; CHECK-VF1:       middle.block:
-; CHECK-VF1-NEXT:    br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
-; CHECK-VF1:       scalar.ph:
-; CHECK-VF1-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i32 [ 16, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
-; CHECK-VF1-NEXT:    br label [[LOOP:%.*]]
-; CHECK-VF1:       loop:
-; CHECK-VF1-NEXT:    [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [[LOOP]] ]
-; CHECK-VF1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]]
-; CHECK-VF1-NEXT:    store i32 13, i32* [[ARRAYIDX]], align 1
-; CHECK-VF1-NEXT:    [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1
-; CHECK-VF1-NEXT:    [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], 14
-; CHECK-VF1-NEXT:    br i1 [[COND]], label [[EXIT]], label [[LOOP]]
-; CHECK-VF1:       exit:
-; CHECK-VF1-NEXT:    ret void
-;
-entry:
-  br label %loop
-
-loop:
-  %riv = phi i32 [ 0, %entry ], [ %rivPlus1, %loop ]
-  %arrayidx = getelementptr inbounds i32, i32* %A, i32 %riv
-  store i32 13, i32* %arrayidx, align 1
-  %rivPlus1 = add nuw nsw i32 %riv, 1
-  %cond = icmp eq i32 %rivPlus1, 14
-  br i1 %cond, label %exit, label %loop
-
-exit:
-  ret void
-}