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Differential D7630

Make the unwinder build on thumbv6-m with the integrated assembler.
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Authored by jroelofs on Feb 13 2015, 3:42 PM.

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Reviewers
compnerd
Summary

Integrated AS likes UAL, and can't handle pre-UAL garbage like thumb1 'mov r0, #0'.

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jroelofs updated this revision to Diff 19943.Feb 13 2015, 3:42 PM
jroelofs retitled this revision from to Make the unwinder build on thumbv6-m with the integrated assembler..
jroelofs updated this object.
jroelofs edited the test plan for this revision. (Show Details)
jroelofs added a reviewer: compnerd.
jroelofs added a subscriber: Unknown Object (MLST).
compnerd added inline comments.Feb 13 2015, 3:46 PM
UnwindRegistersSave.S
310

How about doing:

#if __ARM_ARCH_ISA_THUMB == 1
  movs r0, #0
#else
  mov r0, #0
#endif

I don't see why we should have the side-effect if we can avoid it.

jroelofs updated this revision to Diff 19948.Feb 13 2015, 4:17 PM

Sounds good to me.

compnerd accepted this revision.Feb 13 2015, 5:05 PM
compnerd edited edge metadata.

LGTM with the one inline comment.

UnwindRegistersSave.S
320

A comment to indicate that the non-setting version is not available in T1 would ensure that someone coming along wouldn't try to merge this together.

This revision is now accepted and ready to land.Feb 13 2015, 5:05 PM
jroelofs closed this revision.Feb 17 2015, 8:24 AM

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Diff 19948

UnwindRegistersSave.S

Context not available.
str r3, [r0, #60] @ store return address as pc str r3, [r0, #60] @ store return address as pc
#else #else
compnerdUnsubmitted
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How about doing:

#if __ARM_ARCH_ISA_THUMB == 1
  movs r0, #0
#else
  mov r0, #0
#endif

I don't see why we should have the side-effect if we can avoid it.

compnerd: How about doing: #if __ARM_ARCH_ISA_THUMB == 1 movs r0, #0 #else mov r0…
@ 32bit thumb-2 restrictions for stm: @ 32bit thumb-2 restrictions for stm:
@ . the sp (r13) cannot be in the list @ . the sp (r13) cannot be in the list
@ . the pc (r15) cannot be in the list in an STM instruction @ . the pc (r15) cannot be in the list in an STM instruction
stm r0, {r0-r12} stm r0, {r0-r12}
str sp, [r0, #52] str sp, [r0, #52]
str lr, [r0, #56] str lr, [r0, #56]
str lr, [r0, #60] @ store return address as pc str lr, [r0, #60] @ store return address as pc
#endif #endif
#if __ARM_ARCH_ISA_THUMB1 == 1
movs r0, #0 @ return UNW_ESUCCESS
compnerdUnsubmitted
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A comment to indicate that the non-setting version is not available in T1 would ensure that someone coming along wouldn't try to merge this together.

compnerd: A comment to indicate that the non-setting version is not available in T1 would ensure that…
#else
mov r0, #0 @ return UNW_ESUCCESS mov r0, #0 @ return UNW_ESUCCESS
#endif
JMP(lr) JMP(lr)
@ @
@ static void libunwind::Registers_arm::saveVFPWithFSTMD(unw_fpreg_t* values) @ static void libunwind::Registers_arm::saveVFPWithFSTMD(unw_fpreg_t* values)
@ @
@ On entry: @ On entry:
@ values pointer is in r0 @ values pointer is in r0
@ @
.p2align 2 .p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMDEPy) DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMDEPy)
Context not available.