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Differential D70279

[X86] Add AMD Matisse (znver2) model number to getHostCPUName
ClosedPublic

Authored by al3xtjames on Nov 14 2019, 3:18 PM.

Details

Reviewers
craig.topper
Commits
rGff75bf6ac93a: [X86] Add AMD Matisse (znver2) model number to getHostCPUName and compiler-rt's…
Summary

This is the CPUID model used on Ryzen 3000 series (Zen 2/Matisse) CPUs.

Diff Detail

Event Timeline

al3xtjames created this revision.Nov 14 2019, 3:18 PM
Herald added a project: Restricted Project. · View Herald TranscriptNov 14 2019, 3:18 PM
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al3xtjames edited the summary of this revision. (Show Details)Nov 18 2019, 7:58 AM
craig.topper added a comment.Nov 18 2019, 8:49 AM

Can you also update the same code in compiler-rt?

al3xtjames updated this revision to Diff 229874.Nov 18 2019, 10:05 AM

Added the getAMDProcessorTypeAndSubtype change to compiler-rt.

Herald added a project: Restricted Project. · View Herald TranscriptNov 18 2019, 10:05 AM
Herald added a subscriber: Restricted Project. · View Herald Transcript
craig.topper accepted this revision.Nov 18 2019, 10:08 AM

LGTM

This revision is now accepted and ready to land.Nov 18 2019, 10:08 AM
al3xtjames added a comment.Nov 18 2019, 10:58 AM

Thanks! I don't have commit access, so feel free to commit this change.

Closed by commit rGff75bf6ac93a: [X86] Add AMD Matisse (znver2) model number to getHostCPUName and compiler-rt's… (authored by craig.topper). · Explain WhyNov 18 2019, 12:03 PM
This revision was automatically updated to reflect the committed changes.
and mentioned this in D96220: [X86] Add AMD Renoir (znver2) model number to getHostCPUName and compiler-rt's getAMDProcessorTypeAndSubtype..Feb 7 2021, 9:03 AM

Revision Contents

PathSize
compiler-rt/
lib/
builtins/
4 lines
llvm/
lib/
Support/
4 lines

Diff 229895

compiler-rt/lib/builtins/cpu_model.c

Show First 20 Lines • Show All 465 Lines • ▼ Show 20 Lines if (Model <= 0x0f) {
break; // "bdver1"; 00h-0Fh: Bulldozer break; // "bdver1"; 00h-0Fh: Bulldozer
} }
break; break;
case 22: case 22:
*Type = AMD_BTVER2; *Type = AMD_BTVER2;
break; // "btver2" break; // "btver2"
case 23: case 23:
*Type = AMDFAM17H; *Type = AMDFAM17H;
if (Model >= 0x30 && Model <= 0x3f) { if ((Model >= 0x30 && Model <= 0x3f) || Model == 0x71) {
*Subtype = AMDFAM17H_ZNVER2; *Subtype = AMDFAM17H_ZNVER2;
break; // "znver2"; 30h-3fh: Zen2 break; // "znver2"; 30h-3fh, 71h: Zen2
} }
if (Model <= 0x0f) { if (Model <= 0x0f) {
*Subtype = AMDFAM17H_ZNVER1; *Subtype = AMDFAM17H_ZNVER1;
break; // "znver1"; 00h-0Fh: Zen1 break; // "znver1"; 00h-0Fh: Zen1
} }
break; break;
default: default:
break; // "generic" break; // "generic"
▲ Show 20 Lines • Show All 211 Lines • Show Last 20 Lines

llvm/lib/Support/Host.cpp

Show First 20 Lines • Show All 953 Lines • ▼ Show 20 Lines if (Model <= 0x0f) {
break; // "bdver1"; 00h-0Fh: Bulldozer break; // "bdver1"; 00h-0Fh: Bulldozer
} }
break; break;
case 22: case 22:
*Type = X86::AMD_BTVER2; *Type = X86::AMD_BTVER2;
break; // "btver2" break; // "btver2"
case 23: case 23:
*Type = X86::AMDFAM17H; *Type = X86::AMDFAM17H;
if (Model >= 0x30 && Model <= 0x3f) { if ((Model >= 0x30 && Model <= 0x3f) || Model == 0x71) {
*Subtype = X86::AMDFAM17H_ZNVER2; *Subtype = X86::AMDFAM17H_ZNVER2;
break; // "znver2"; 30h-3fh: Zen2 break; // "znver2"; 30h-3fh, 71h: Zen2
} }
if (Model <= 0x0f) { if (Model <= 0x0f) {
*Subtype = X86::AMDFAM17H_ZNVER1; *Subtype = X86::AMDFAM17H_ZNVER1;
break; // "znver1"; 00h-0Fh: Zen1 break; // "znver1"; 00h-0Fh: Zen1
} }
break; break;
default: default:
break; // "generic" break; // "generic"
▲ Show 20 Lines • Show All 593 Lines • Show Last 20 Lines