[TableGen] Add "MCInstValidatorEmitter" TableGen backend

[nlguillemot]

Summary

There are many places in the compiler that generate MCInsts, and these different places generally impose similar rules on their generated MCInsts. For example, an operand in a given ISA might represent a special flag that only supports a certain set of possible values, and all places that create MCInsts (parser, disassembler, etc) should respect the restrictions of that flag. If we can ensure that the MCInsts outputted by various parts of the compiler respect their restrictions, we might be able to catch bugs more easily.

At first glance, the pre-existing MCOperandPredicate member of TableGen's base Operand class looks like it should be the one to fill the role of a convenient place to describe the restrictions on operands. However, this MCOperandPredicate member is currently mostly unused by LLVM. As a step towards making it easier to implement validation of MCInsts in various places of the compiler, this patch adds a new TableGen backend called MCInstValidatorEmitter. This backend exposes a function called validateMCOperand, which can be used to conveniently check the validity of an operand of an MCInst.

As future work, this backend could be enhanced with more functions to validate MCInsts. For example, we could add another function to check the validity of an MCInst as a whole, by giving MCInsts a MCInstPredicate (or similar.)

A note about the many "predicate"s in LLVM:
The word "predicate" is quite overloaded, since it is also used to describe parts of the functionality of the scheduler, parser, decoder, etc. For this backend, the "predicate" is not related to a specific part of the compiler. It's just a general purpose function that can be used to validate that a given MCInst respects the rules of its operands. By being general-purpose, it becomes possible to use this API to validate the MCInsts produced in any given part in the compiler. Being able to describe the validity of the values of an operand type in just one place is what makes this interesting.

[nlguillemot]

ping

[nlguillemot]

utils/TableGen/MCInstValidatorEmitter.cpp

61

bug: If the value is already present in the SetVector, the MCOperandPredicateID should be set to its existing ID. As-is, it creates a new ID even when the value should be reused. Should be able to reproduce the bug by updating the unit test to have two instructions that share the same MCOperandPredicate.

[nlguillemot]

Abandoning this project.

test/TableGen/validate-operand.td

+// RUN: llvm-tblgen -gen-mc-inst-validator -I %p/../../include %s | FileCheck %s
+
+// Check that validateMCOperand has the expected code in it.
+
+include "llvm/Target/Target.td"
+
+def archInstrInfo : InstrInfo { }
+
+def arch : Target {
+  let InstructionSet = archInstrInfo;
+}
+
+def Reg : Register<"reg">;
+def RegClass : RegisterClass<"foo", [i32], 0, (add Reg)>;
+
+def OpA : Operand<i32> {
+  let MCOperandPredicate = [{return MCOp.isImm() && MCOp.getImm() != 0;}];
+}
+
+def OpB : Operand<i32>;
+
+def InstA : Instruction {
+  let Size = 1;
+  let OutOperandList = (outs OpA:$a);
+  let InOperandList = (ins OpB:$b);
+  field bits<8> Inst;
+  field bits<8> SoftFail = 0;
+  let Namespace = "MyNamespace";
+}
+
+// CHECK: #ifdef VALIDATE_MC_OPERAND
+// CHECK: { 0, -1, },
+// CHECK: case 0:
+// CHECK: return MCOp.isImm() && MCOp.getImm() != 0;
+// CHECK: #endif //VALIDATE_MC_OPERAND

utils/TableGen/CMakeLists.txt

add_tablegen(llvm-tblgen LLVM
   Types.cpp
   X86DisassemblerTables.cpp
   X86EVEX2VEXTablesEmitter.cpp
   X86FoldTablesEmitter.cpp
   X86ModRMFilters.cpp
   X86RecognizableInstr.cpp
   WebAssemblyDisassemblerEmitter.cpp
   CTagsEmitter.cpp
+  MCInstValidatorEmitter.cpp
   )
 set_target_properties(llvm-tblgen PROPERTIES FOLDER "Tablegenning")

utils/TableGen/MCInstValidatorEmitter.cpp

+//===- MCInstValidatorEmitter.cpp - Generates an MCInst validator - C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This tablegen backend is responsible for emitting utilities used to to check
+// that an MCInst and its operands are valid.
+//
+//===----------------------------------------------------------------------===//
+
+#include "CodeGenDAGPatterns.h"
+#include "CodeGenInstruction.h"
+#include "TableGenBackends.h"
+#include "llvm/ADT/CachedHashString.h"
+#include "llvm/ADT/SetVector.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/TableGen/Record.h"
+#include "llvm/TableGen/TableGenBackend.h"
+
+using namespace llvm;
+
+namespace {
+
+class MCInstValidatorEmitter {
+  const RecordKeeper &Records;
+  CodeGenDAGPatterns CDP;
+
+public:
+  MCInstValidatorEmitter(RecordKeeper &R) : Records(R), CDP(R) {}
+
+  // run - Output the validator.
+  void run(raw_ostream &OS);
+
+  // Outputs a function that validates an MCOperand.
+  void emitMCOperandValidator(raw_ostream &OS);
+};
+
+} // end anonymous namespace
+
+void MCInstValidatorEmitter::emitMCOperandValidator(raw_ostream &OS) {
+  const CodeGenTarget &Target = CDP.getTargetInfo();
+  const StringRef Namespace = Target.getName();
+  const std::vector<Record *> Operands =
+      Records.getAllDerivedDefinitions("Operand");
+  const ArrayRef<const CodeGenInstruction *> NumberedInstructions =
+      Target.getInstructionsByEnumValue();
+
+  // All unique values of MCOperandPredicate, for de-duplication.
+  SetVector<CachedHashString> MCOperandPredicates;
+  // The ID of the predicate for each operand with an MCOperandPredicate.
+  std::map<const Record *, unsigned> OperandToMCOperandPredicateID;
+  for (const Record *Op : Operands) {
+    if (Op->isValueUnset("MCOperandPredicate"))
+      continue;
+    const Init *MCOpPred = Op->getValueInit("MCOperandPredicate");
+    if (const CodeInit *SI = dyn_cast<CodeInit>(MCOpPred)) {
+      unsigned MCOperandPredicateID = (unsigned)MCOperandPredicates.size();
+      MCOperandPredicates.insert(CachedHashString(SI->getValue()));
+      OperandToMCOperandPredicateID.emplace(Op, MCOperandPredicateID);
+    } else
+      llvm_unreachable("Unexpected MCOperandPredicate field!");
+  }
+
+  OS << "#ifdef VALIDATE_MC_OPERAND\n";
+  OS << "#undef VALIDATE_MC_OPERAND\n";
+  OS << "namespace llvm {\n";
+  OS << "namespace " << Namespace << " {\n";
+  OS << "LLVM_READONLY\n";
+  OS << "bool validateMCOperand(unsigned Opcode, unsigned OpIdx, const "
+        "MCOperand &MCOp) {\n";
+  OS << "  static const std::initializer_list<int> MCOperandPredicateIDTable[] "
+        "= {\n";
+  for (const CodeGenInstruction *Inst : NumberedInstructions) {
+    OS << "  { ";
+    for (const auto &Op : Inst->Operands) {
+      // Handle aggregate operands and normal operands the same way by expanding
+      // either case into a list of operands for this op.
+      std::vector<CGIOperandList::OperandInfo> OperandList;
+      DagInit *MIOI = Op.MIOperandInfo;
+      if (!MIOI || MIOI->getNumArgs() == 0) {
+        // Single, anonymous, operand.
+        OperandList.push_back(Op);
+      } else {
+        for (unsigned j = 0, e = Op.MINumOperands; j != e; ++j) {
+          OperandList.push_back(Op);
+
+          auto *OpR = cast<DefInit>(MIOI->getArg(j))->getDef();
+          OperandList.back().Rec = OpR;
+        }
+      }
+      for (unsigned j = 0, e = OperandList.size(); j != e; ++j) {
+        const Record *OpR = OperandList[j].Rec;
+        const auto It = OperandToMCOperandPredicateID.find(OpR);
+        if (It == OperandToMCOperandPredicateID.end()) {
+          // No predicate specified.
+          OS << "-1";
+        } else
+          OS << It->second;
+        OS << ", ";
+      }
+    }
+    OS << "},\n";
+  }
+  OS << "  };\n";
+  OS << "  const int MCOperandPredicateID = "
+        "MCOperandPredicateIDTable[Opcode].begin()[OpIdx];\n";
+  OS << "  if (MCOperandPredicateID == -1) {\n";
+  OS << "    // No predicate specified, so assume any value is ok.\n";
+  OS << "    return true;\n";
+  OS << "  }\n";
+  OS << "  switch (MCOperandPredicateID) {\n";
+  OS << "  default:\n";
+  OS << "    llvm_unreachable(\"Unhandled MCOperandPredicateID\");\n";
+  for (size_t MCOperandPredicateID = 0;
+       MCOperandPredicateID < MCOperandPredicates.size();
+       MCOperandPredicateID++) {
+    OS << "  case " << MCOperandPredicateID << ":\n";
+    // Put the MCOperandPredicate in a lambda to slightly sandbox the code and
+    // to try to force the user to have to have a return statement.
+    OS << "    return ([](const MCOperand &MCOp) -> bool {\n";
+    OS << MCOperandPredicates[MCOperandPredicateID].val();
+    OS << "\n    })(MCOp);\n";
+  }
+  OS << "  }\n";
+  OS << "  llvm_unreachable(\"Unexpected end of function (Is "
+        "MCOperandPredicate missing a return?)\");\n";
+  OS << "}\n";
+  OS << "} // end namespace " << Namespace << "\n";
+  OS << "} // end namespace llvm\n";
+  OS << "#endif //VALIDATE_MC_OPERAND\n\n";
+}
+
+void MCInstValidatorEmitter::run(raw_ostream &OS) {
+  emitSourceFileHeader("Validation for MCInsts", OS);
+  emitMCOperandValidator(OS);
+}
+
+namespace llvm {
+
+void EmitMCInstValidator(RecordKeeper &RK, raw_ostream &OS) {
+  MCInstValidatorEmitter(RK).run(OS);
+}
+
+} // namespace llvm

utils/TableGen/TableGen.cpp

enum ActionType {
   GenCTags,
   GenAttributes,
   GenSearchableTables,
   GenGlobalISel,
   GenX86EVEX2VEXTables,
   GenX86FoldTables,
   GenRegisterBank,
   GenExegesis,
+  GenMCInstValidator,
 };
 
 namespace llvm {
 /// Storage for TimeRegionsOpt as a global so that backends aren't required to
 /// include CommandLine.h
 bool TimeRegions = false;
 } // end namespace llvm
 
Action(cl::desc("Action to perform:"),
                                "Generate GlobalISel selector"),
                     clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables",
                                "Generate X86 EVEX to VEX compress tables"),
                     clEnumValN(GenX86FoldTables, "gen-x86-fold-tables",
                                "Generate X86 fold tables"),
                     clEnumValN(GenRegisterBank, "gen-register-bank",
                                "Generate registers bank descriptions"),
                     clEnumValN(GenExegesis, "gen-exegesis",
-                               "Generate llvm-exegesis tables")));
+                               "Generate llvm-exegesis tables"),
+                    clEnumValN(GenMCInstValidator, "gen-mc-inst-validator",
+                               "Generate validator for MCInsts")));
 
   cl::OptionCategory PrintEnumsCat("Options for -print-enums");
   cl::opt<std::string>
   Class("class", cl::desc("Print Enum list for this class"),
         cl::value_desc("class name"), cl::cat(PrintEnumsCat));
 
 cl::opt<bool, true>
     TimeRegionsOpt("time-regions",
case GenX86EVEX2VEXTables:
     EmitX86EVEX2VEXTables(Records, OS);
     break;
   case GenX86FoldTables:
     EmitX86FoldTables(Records, OS);
     break;
   case GenExegesis:
     EmitExegesis(Records, OS);
     break;
+  case GenMCInstValidator:
+    EmitMCInstValidator(Records, OS);
+    break;
   }
 
   return false;
 }
 }
 
 int main(int argc, char **argv) {
   sys::PrintStackTraceOnErrorSignal(argv[0]);

utils/TableGen/TableGenBackends.h

 void EmitCTags(RecordKeeper &RK, raw_ostream &OS);
 void EmitAttributes(RecordKeeper &RK, raw_ostream &OS);
 void EmitSearchableTables(RecordKeeper &RK, raw_ostream &OS);
 void EmitGlobalISel(RecordKeeper &RK, raw_ostream &OS);
 void EmitX86EVEX2VEXTables(RecordKeeper &RK, raw_ostream &OS);
 void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &OS);
 void EmitRegisterBank(RecordKeeper &RK, raw_ostream &OS);
 void EmitExegesis(RecordKeeper &RK, raw_ostream &OS);
+void EmitMCInstValidator(RecordKeeper &RK, raw_ostream &OS);
 
 } // End llvm namespace
 
 #endif