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Differential D5962

[mips] Mark aggregate arguments passed in registers with the inreg attribute
ClosedPublic

Authored by dsanders on Oct 24 2014, 3:14 AM.

Details

Reviewers
atanasyan
Commits
rGa33f8c9ee0ef: Merged from r220566:
rGaa1b35590f82: [mips] Mark aggregate arguments passed in registers with the inreg attribute
rC220566: [mips] Mark aggregate arguments passed in registers with the inreg attribute
rL223004: Merged from r220566:
rL220566: [mips] Mark aggregate arguments passed in registers with the inreg attribute
Summary

This allows us to easily identify them in the backend which in turn allows us
to handle them correctly for big-endian targets (where they must be shifted
into the upper bits of the register).

Depends on D5961

Diff Detail

Event Timeline

dsanders updated this revision to Diff 15390.Oct 24 2014, 3:14 AM
dsanders retitled this revision from to [mips] Mark aggregate arguments passed in registers with the inreg attribute.
dsanders updated this object.
dsanders edited the test plan for this revision. (Show Details)
dsanders added a reviewer: atanasyan.
dsanders added a parent revision: D5961: [mips] Promote all integral/enumeration types to the GPR width.
dsanders added subscribers: theraven, Unknown Object (MLST).
atanasyan accepted this revision.Oct 24 2014, 5:35 AM
atanasyan edited edge metadata.

LGTM

This revision is now accepted and ready to land.Oct 24 2014, 5:35 AM
dsanders closed this revision.Oct 24 2014, 8:40 AM

Revision Contents

PathSize
lib/
CodeGen/
7 lines
test/
CodeGen/
4 lines
16 lines
4 lines
6 lines

Diff 15390

lib/CodeGen/TargetInfo.cpp

Show First 20 Lines • Show All 5,570 Lines • ▼ Show 20 Lines if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) {
if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) { if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
Offset = OrigOffset + MinABIStackAlignInBytes; Offset = OrigOffset + MinABIStackAlignInBytes;
return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
} }
// If we have reached here, aggregates are passed directly by coercing to // If we have reached here, aggregates are passed directly by coercing to
// another structure type. Padding is inserted if the offset of the // another structure type. Padding is inserted if the offset of the
// aggregate is unaligned. // aggregate is unaligned.
return ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0, ABIArgInfo ArgInfo =
ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0,
getPaddingType(OrigOffset, CurrOffset)); getPaddingType(OrigOffset, CurrOffset));
ArgInfo.setInReg(true);
return ArgInfo;
} }
// Treat an enum type as its underlying type. // Treat an enum type as its underlying type.
if (const EnumType *EnumTy = Ty->getAs<EnumType>()) if (const EnumType *EnumTy = Ty->getAs<EnumType>())
Ty = EnumTy->getDecl()->getIntegerType(); Ty = EnumTy->getDecl()->getIntegerType();
// All integral types are promoted to the GPR width. // All integral types are promoted to the GPR width.
if (Ty->isIntegralOrEnumerationType()) if (Ty->isIntegralOrEnumerationType())
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test/CodeGen/mips-byval-arg.c

// RUN: %clang -target mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 // RUN: %clang -target mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32
// RUN: %clang -target mips64el-unknown-linux -O3 -S -mabi=n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64 // RUN: %clang -target mips64el-unknown-linux -O3 -S -mabi=n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64
typedef struct { typedef struct {
float f[3]; float f[3];
} S0; } S0;
extern void foo2(S0); extern void foo2(S0);
// O32-LABEL: define void @foo1(i32 %a0.coerce0, i32 %a0.coerce1, i32 %a0.coerce2) // O32-LABEL: define void @foo1(i32 inreg %a0.coerce0, i32 inreg %a0.coerce1, i32 inreg %a0.coerce2)
// N64-LABEL: define void @foo1(i64 %a0.coerce0, i32 %a0.coerce1) // N64-LABEL: define void @foo1(i64 inreg %a0.coerce0, i32 inreg %a0.coerce1)
void foo1(S0 a0) { void foo1(S0 a0) {
foo2(a0); foo2(a0);
} }

test/CodeGen/mips-vector-arg.c

// RUN: %clang -target mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 // RUN: %clang -target mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32
// RUN: %clang -target mips64el-unknown-linux -O3 -S -mabi=n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64 // RUN: %clang -target mips64el-unknown-linux -O3 -S -mabi=n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64
// check that // check that
// 1. vector arguments are passed in integer registers // 1. vector arguments are passed in integer registers
// 2. argument alignment is no larger than 8-byte for O32 and 16-byte for N64. // 2. argument alignment is no larger than 8-byte for O32 and 16-byte for N64.
typedef float v4sf __attribute__ ((__vector_size__ (16))); typedef float v4sf __attribute__ ((__vector_size__ (16)));
typedef int v4i32 __attribute__ ((__vector_size__ (16))); typedef int v4i32 __attribute__ ((__vector_size__ (16)));
// O32: define void @test_v4sf(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 signext %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW:#[0-9]+]] // O32: define void @test_v4sf(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) [[NUW:#[0-9]+]]
// O32: declare i32 @test_v4sf_2(i32, i32, i32, i32, i32 signext, i32, i32, i32, i32, i32) // O32: declare i32 @test_v4sf_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg)
// N64: define void @test_v4sf(i64 %a1.coerce0, i64 %a1.coerce1, i32 signext %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW:#[0-9]+]] // N64: define void @test_v4sf(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) [[NUW:#[0-9]+]]
// N64: declare i32 @test_v4sf_2(i64, i64, i32 signext, i64, i64, i64) // N64: declare i32 @test_v4sf_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg)
extern test_v4sf_2(v4sf, int, v4sf); extern test_v4sf_2(v4sf, int, v4sf);
void test_v4sf(v4sf a1, int a2, v4sf a3) { void test_v4sf(v4sf a1, int a2, v4sf a3) {
test_v4sf_2(a3, a2, a1); test_v4sf_2(a3, a2, a1);
} }
// O32: define void @test_v4i32(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 signext %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW]] // O32: define void @test_v4i32(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) [[NUW]]
// O32: declare i32 @test_v4i32_2(i32, i32, i32, i32, i32 signext, i32, i32, i32, i32, i32) // O32: declare i32 @test_v4i32_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg)
// N64: define void @test_v4i32(i64 %a1.coerce0, i64 %a1.coerce1, i32 signext %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW]] // N64: define void @test_v4i32(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) [[NUW]]
// N64: declare i32 @test_v4i32_2(i64, i64, i32 signext, i64, i64, i64) // N64: declare i32 @test_v4i32_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg)
extern test_v4i32_2(v4i32, int, v4i32); extern test_v4i32_2(v4i32, int, v4i32);
void test_v4i32(v4i32 a1, int a2, v4i32 a3) { void test_v4i32(v4i32 a1, int a2, v4i32 a3) {
test_v4i32_2(a3, a2, a1); test_v4i32_2(a3, a2, a1);
} }
// O32: attributes [[NUW]] = { nounwind{{.*}} } // O32: attributes [[NUW]] = { nounwind{{.*}} }
// N64: attributes [[NUW]] = { nounwind{{.*}} } // N64: attributes [[NUW]] = { nounwind{{.*}} }

test/CodeGen/mips64-class-return.cpp

Show All 28 LinesD0 foo1(void) {
return gd0; return gd0;
} }
// CHECK: define inreg { double, float } @_Z4foo2v() // CHECK: define inreg { double, float } @_Z4foo2v()
D1 foo2(void) { D1 foo2(void) {
return gd1; return gd1;
} }
// CHECK-LABEL: define void @_Z4foo32D2(i64 %a0.coerce0, double %a0.coerce1) // CHECK-LABEL: define void @_Z4foo32D2(i64 inreg %a0.coerce0, double inreg %a0.coerce1)
void foo3(D2 a0) { void foo3(D2 a0) {
gd2 = a0; gd2 = a0;
} }
// CHECK-LABEL: define void @_Z4foo42D0(i64 %a0.coerce0, i64 %a0.coerce1) // CHECK-LABEL: define void @_Z4foo42D0(i64 inreg %a0.coerce0, i64 inreg %a0.coerce1)
void foo4(D0 a0) { void foo4(D0 a0) {
gd0 = a0; gd0 = a0;
} }

test/CodeGen/mips64-padding-arg.c

// RUN: %clang -target mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 // RUN: %clang -target mipsel-unknown-linux -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32
// RUN: %clang -target mips64el-unknown-linux -O3 -S -mabi=n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64 // RUN: %clang -target mips64el-unknown-linux -O3 -S -mabi=n64 -o - -emit-llvm %s | FileCheck %s -check-prefix=N64
// RUN: %clang -target mipsel-unknown-linux -mfp64 -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32 // RUN: %clang -target mipsel-unknown-linux -mfp64 -O3 -S -o - -emit-llvm %s | FileCheck %s -check-prefix=O32
typedef struct { typedef struct {
double d; double d;
long double ld; long double ld;
} S0; } S0;
// Insert padding to ensure arguments of type S0 are aligned to 16-byte boundaries. // Insert padding to ensure arguments of type S0 are aligned to 16-byte boundaries.
// N64-LABEL: define void @foo1(i32 signext %a0, i64, double %a1.coerce0, i64 %a1.coerce1, i64 %a1.coerce2, i64 %a1.coerce3, double %a2.coerce0, i64 %a2.coerce1, i64 %a2.coerce2, i64 %a2.coerce3, i32 signext %b, i64, double %a3.coerce0, i64 %a3.coerce1, i64 %a3.coerce2, i64 %a3.coerce3) // N64-LABEL: define void @foo1(i32 signext %a0, i64, double inreg %a1.coerce0, i64 inreg %a1.coerce1, i64 inreg %a1.coerce2, i64 inreg %a1.coerce3, double inreg %a2.coerce0, i64 inreg %a2.coerce1, i64 inreg %a2.coerce2, i64 inreg %a2.coerce3, i32 signext %b, i64, double inreg %a3.coerce0, i64 inreg %a3.coerce1, i64 inreg %a3.coerce2, i64 inreg %a3.coerce3)
// N64: tail call void @foo2(i32 signext 1, i32 signext 2, i32 signext %a0, i64 undef, double %a1.coerce0, i64 %a1.coerce1, i64 %a1.coerce2, i64 %a1.coerce3, double %a2.coerce0, i64 %a2.coerce1, i64 %a2.coerce2, i64 %a2.coerce3, i32 signext 3, i64 undef, double %a3.coerce0, i64 %a3.coerce1, i64 %a3.coerce2, i64 %a3.coerce3) // N64: tail call void @foo2(i32 signext 1, i32 signext 2, i32 signext %a0, i64 undef, double inreg %a1.coerce0, i64 inreg %a1.coerce1, i64 inreg %a1.coerce2, i64 inreg %a1.coerce3, double inreg %a2.coerce0, i64 inreg %a2.coerce1, i64 inreg %a2.coerce2, i64 inreg %a2.coerce3, i32 signext 3, i64 undef, double inreg %a3.coerce0, i64 inreg %a3.coerce1, i64 inreg %a3.coerce2, i64 inreg %a3.coerce3)
// N64: declare void @foo2(i32 signext, i32 signext, i32 signext, i64, double, i64, i64, i64, double, i64, i64, i64, i32 signext, i64, double, i64, i64, i64) // N64: declare void @foo2(i32 signext, i32 signext, i32 signext, i64, double inreg, i64 inreg, i64 inreg, i64 inreg, double inreg, i64 inreg, i64 inreg, i64 inreg, i32 signext, i64, double inreg, i64 inreg, i64 inreg, i64 inreg)
extern void foo2(int, int, int, S0, S0, int, S0); extern void foo2(int, int, int, S0, S0, int, S0);
void foo1(int a0, S0 a1, S0 a2, int b, S0 a3) { void foo1(int a0, S0 a1, S0 a2, int b, S0 a3) {
foo2(1, 2, a0, a1, a2, 3, a3); foo2(1, 2, a0, a1, a2, 3, a3);
} }
// Insert padding before long double argument. // Insert padding before long double argument.
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