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[X86] Model ADC/SBB with immediate 0 more accurately in the Haswell scheduler model
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Authored by craig.topper on Mar 6 2019, 3:12 PM.

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Summary

Haswell and possibly Sandybridge have an optimization for ADC/SBB with immediate 0 to use a single uop flow. This only applies GR16/GR32/GR64 with an 8-bit immediate. It does not apply to GR8. It also does not apply to the implicit AX/EAX/RAX forms.

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rL LLVM

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craig.topper created this revision.Mar 6 2019, 3:12 PM
andreadb accepted this revision.Mar 7 2019, 3:12 AM

LGTM

This revision is now accepted and ready to land.Mar 7 2019, 3:12 AM
This revision was automatically updated to reflect the committed changes.
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