[X86][SLH] Remove PDEP and PEXT from isDataInvariantLoad

[craig.topper]

Summary

Ryzen has something like an 18 cycle latency on these based on Agner's data. AMD's own xls is blank. So it seems like there might be something tricky here. Might be safer to remove them. We never generate them without an intrinsic so this might be ok.

[chandlerc]

Yeah, I'm not sure I trust these even on Intel HW come to think of it. LGTM.

lib/Target/X86/X86SpeculativeLoadHardening.cpp

case X86::BEXTRI64mi:
 
     // Integer multiply w/o affecting flags is still believed to be constant
     // time on x86. Called out separately as this is among the most surprising
     // instructions to exhibit that behavior.
   case X86::MULX32rm:
   case X86::MULX64rm:
 
     // Arithmetic instructions that are both constant time and don't set flags.
-  case X86::PDEP32rm:
-  case X86::PDEP64rm:
-  case X86::PEXT32rm:
-  case X86::PEXT64rm:
   case X86::RORX32mi:
   case X86::RORX64mi:
   case X86::SARX32rm:
   case X86::SARX64rm:
   case X86::SHLX32rm:
   case X86::SHLX64rm:
   case X86::SHRX32rm:
   case X86::SHRX64rm: