[mips] Add assembler support for .set push/pop directive.

[tomatabacu]

Summary

These directives are used to save the current assembler options (in the case of ".set push") and restore the previously saved options (in the case of ".set pop").

Contains work done by Matheus Almeida.

[tomatabacu]

Rebased.

[tomatabacu]

Improved a couple of error messages.

[tomatabacu]

Changed the CurrentFeatures and InitialFeatures data members of MipsAssemblerOptions from unsigned type to uint64_t (because of r215887).

[dsanders]

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

45–47

Nit: variables should start with a capital

91

I've just realized the reason we shouldn't use a static member. A static member prevents multiple instances of llvm being used in the same application. For example, we wouldn't be able to assemble two different files with two different llvm instances in the same process.

I think we need to switch to the other implementation we discussed which is to replace the static InitialFeatures with an extra MipsAssemblerOptions object on the stack.

106

We should use unique_ptr here.

304–308

Please pass the current features as an argument to the constructor so we can't forget to call setCurrentFeatures()

test/MC/Mips/set-push-pop-directives.s

9

We should test the default values too

[tomatabacu]

Addressed comments.
Improved the set-push-pop-directives.s test.

[tomatabacu]

Fixed a minor formatting issue.

[tomatabacu]

Replaced the use of std::stack with SmallVector to make it easier to implement the .set mips0 directive (http://reviews.llvm.org/D4957).

[dsanders]

LGTM with a few nits.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

45

The argument should be const.

304

Nit: The aim isn't to cache the options. The aim is to treat all levels of the stack uniformly. The only special bits about the bottom value is that the user can't change it (because they can't pop that far), and that we will overwrite the top stack element with the values from the bottom when '.set mips0' is used.

305–306

Nit: Please declare and assign in the same statement

2573–2574

Always keep an element on the stack.

Two elements.

This is how we cache the initial options.

As mentioned above, caching isn't the purpose of the outermost environment.

2591–2592

Nit: Please declare and assign in the same statement.

2594

Nit: This isn't necessary. It's about to go out of scope.

[tomatabacu]

Addressed reviewer's concerns.
Further clarified comments.
Rebased.

[dsanders]

LGTM, Thanks.

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/MCTargetAsmParser.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/TargetRegistry.h"
+#include <stack>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "mips-asm-parser"
 
 namespace llvm {
 class MCInstrInfo;
 }
 
 namespace {
 class MipsAssemblerOptions {
 public:
   MipsAssemblerOptions() : aTReg(1), reorder(true), macro(true) {}
 
+  MipsAssemblerOptions(MipsAssemblerOptions *Opts) {
+    aTReg = Opts->getATRegNum();
+    reorder = Opts->isReorder();
+    macro = Opts->isMacro();
+    CurrentFeatures = Opts->getCurrentFeatures();
+  }
+
   unsigned getATRegNum() { return aTReg; }
   bool setATReg(unsigned Reg);
 
   bool isReorder() { return reorder; }
   void setReorder() { reorder = true; }
   void setNoreorder() { reorder = false; }
 
   bool isMacro() { return macro; }
static const uint64_t AllArchRelatedMask =
       Mips::FeatureMips1 | Mips::FeatureMips2 | Mips::FeatureMips3 |
       Mips::FeatureMips3_32 | Mips::FeatureMips3_32r2 | Mips::FeatureMips4 |
       Mips::FeatureMips4_32 | Mips::FeatureMips4_32r2 | Mips::FeatureMips5 |
       Mips::FeatureMips5_32r2 | Mips::FeatureMips32 | Mips::FeatureMips32r2 |
       Mips::FeatureMips32r6 | Mips::FeatureMips64 | Mips::FeatureMips64r2 |
       Mips::FeatureMips64r6 | Mips::FeatureCnMips | Mips::FeatureFP64Bit |
       Mips::FeatureGP64Bit | Mips::FeatureNaN2008;
 
+  unsigned getCurrentFeatures() { return CurrentFeatures; }
+
+  void setCurrentFeatures(unsigned Features) { CurrentFeatures = Features; }
+
+  static unsigned getInitialFeatures() { return InitialFeatures; }
+  
+  static void setInitialFeatures(unsigned Features) { 
+    InitialFeatures = Features; 
+  }
+
 private:
   unsigned aTReg;
   bool reorder;
   bool macro;
+  unsigned CurrentFeatures;
+  static unsigned InitialFeatures;
 };
+
+unsigned MipsAssemblerOptions::InitialFeatures;
 }
 
 namespace {
 class MipsAsmParser : public MCTargetAsmParser {
   MipsTargetStreamer &getTargetStreamer() {
     MCTargetStreamer &TS = *Parser.getStreamer().getTargetStreamer();
     return static_cast<MipsTargetStreamer &>(TS);
   }
 
   MCSubtargetInfo &STI;
   MCAsmParser &Parser;
-  MipsAssemblerOptions Options;
+  std::stack<MipsAssemblerOptions *> AssemblerOptions;
 
 #define GET_ASSEMBLER_HEADER
 #include "MipsGenAsmMatcher.inc"
 
   unsigned checkTargetMatchPredicate(MCInst &Inst) override;
 
   bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
                                OperandVector &Operands, MCStreamer &Out,
#include "MipsGenAsmMatcher.inc"
   bool parseSetAtDirective();
   bool parseSetNoAtDirective();
   bool parseSetMacroDirective();
   bool parseSetNoMacroDirective();
   bool parseSetReorderDirective();
   bool parseSetNoReorderDirective();
   bool parseSetNoMips16Directive();
   bool parseSetFpDirective();
+  bool parseSetPopDirective();
+  bool parseSetPushDirective();
 
   bool parseSetAssignment();
 
   bool parseDataDirective(unsigned Size, SMLoc L);
   bool parseDirectiveGpWord();
   bool parseDirectiveGpDWord();
   bool parseDirectiveModule();
   bool parseDirectiveModuleFP();
#include "MipsGenAsmMatcher.inc"
   // FeatureMipsGP64 | FeatureMips1)
   // Clearing Mips3 is equivalent to clear (FeatureMips3 | FeatureMips4).
   void selectArch(StringRef ArchFeature) {
     uint64_t FeatureBits = STI.getFeatureBits();
     FeatureBits &= ~MipsAssemblerOptions::AllArchRelatedMask;
     STI.setFeatureBits(FeatureBits);
     setAvailableFeatures(
         ComputeAvailableFeatures(STI.ToggleFeature(ArchFeature)));
+
+    AssemblerOptions.top()->setCurrentFeatures(getAvailableFeatures());
   }
 
   void setFeatureBits(unsigned Feature, StringRef FeatureString) {
     if (!(STI.getFeatureBits() & Feature)) {
       setAvailableFeatures(
           ComputeAvailableFeatures(STI.ToggleFeature(FeatureString)));
     }
+    AssemblerOptions.top()->setCurrentFeatures(getAvailableFeatures());
   }
 
   void clearFeatureBits(unsigned Feature, StringRef FeatureString) {
     if (STI.getFeatureBits() & Feature) {
       setAvailableFeatures(
           ComputeAvailableFeatures(STI.ToggleFeature(FeatureString)));
     }
+    AssemblerOptions.top()->setCurrentFeatures(getAvailableFeatures());
   }
 
 public:
   enum MipsMatchResultTy {
     Match_RequiresDifferentSrcAndDst = FIRST_TARGET_MATCH_RESULT_TY
 #define GET_OPERAND_DIAGNOSTIC_TYPES
 #include "MipsGenAsmMatcher.inc"
 #undef GET_OPERAND_DIAGNOSTIC_TYPES
 
   };
 
   MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser,
                 const MCInstrInfo &MII, const MCTargetOptions &Options)
       : MCTargetAsmParser(), STI(sti), Parser(parser) {
     // Initialize the set of available features.
     setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
 
+    AssemblerOptions.push(new MipsAssemblerOptions());   
+    
+    // Set the initial configuration given through the command-line or by using
+    // the default values.
+    AssemblerOptions.top()->setCurrentFeatures(getAvailableFeatures());
+
+    // We cache the initial configuration here so that it's always retrievable.    
+    AssemblerOptions.top()->setInitialFeatures(getAvailableFeatures());
+
     getTargetStreamer().updateABIInfo(*this);
 
     // Assert exactly one ABI was chosen.
     assert((((STI.getFeatureBits() & Mips::FeatureO32) != 0) +
             ((STI.getFeatureBits() & Mips::FeatureEABI) != 0) +
             ((STI.getFeatureBits() & Mips::FeatureN32) != 0) +
             ((STI.getFeatureBits() & Mips::FeatureN64) != 0)) == 1);
 
bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
   // SSNOP is deprecated on MIPS32r6/MIPS64r6
   // We still accept it but it is a normal nop.
   if (hasMips32r6() && Inst.getOpcode() == Mips::SSNOP) {
     std::string ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6";
     Warning(IDLoc, "ssnop is deprecated for " + ISA + " and is equivalent to a "
                                                       "nop instruction");
   }
 
-  if (MCID.hasDelaySlot() && Options.isReorder()) {
+  if (MCID.hasDelaySlot() && AssemblerOptions.top()->isReorder()) {
     // If this instruction has a delay slot and .set reorder is active,
     // emit a NOP after it.
     Instructions.push_back(Inst);
     MCInst NopInst;
     NopInst.setOpcode(Mips::SLL);
     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));
     NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO));
     NopInst.addOperand(MCOperand::CreateImm(0));
case Match_MnemonicFail:
     return Error(IDLoc, "invalid instruction");
   case Match_RequiresDifferentSrcAndDst:
     return Error(IDLoc, "source and destination must be different");
   }
   return true;
 }
 
 void MipsAsmParser::WarnIfAssemblerTemporary(int RegIndex, SMLoc Loc) {
-  if ((RegIndex != 0) && ((int)Options.getATRegNum() == RegIndex)) {
+  if ((RegIndex != 0) && 
+      ((int)AssemblerOptions.top()->getATRegNum() == RegIndex)) {
     if (RegIndex == 1)
       Warning(Loc, "Used $at without \".set noat\"");
     else
       Warning(Loc, Twine("Used $") + Twine(RegIndex) + " with \".set at=$" +
                        Twine(RegIndex) + "\"");
   }
 }
 
bool MipsAssemblerOptions::setATReg(unsigned Reg) {
   if (Reg > 31)
     return false;
 
   aTReg = Reg;
   return true;
 }
 
 int MipsAsmParser::getATReg(SMLoc Loc) {
-  int AT = Options.getATRegNum();
+  int AT = AssemblerOptions.top()->getATRegNum();
   if (AT == 0)
     reportParseError(Loc,
                      "Pseudo instruction requires $at, which is not available");
   return AT;
 }
 
 unsigned MipsAsmParser::getReg(int RC, int RegNo) {
   return *(getContext().getRegisterInfo()->getRegClass(RC).begin() + RegNo);

 
 bool MipsAsmParser::reportParseError(SMLoc Loc, Twine ErrorMsg) {
   return Error(Loc, ErrorMsg);
 }
 
 bool MipsAsmParser::parseSetNoAtDirective() {
   // Line should look like: ".set noat".
   // set at reg to 0.
-  Options.setATReg(0);
+  AssemblerOptions.top()->setATReg(0);
   // eat noat
   Parser.Lex();
   // If this is not the end of the statement, report an error.
   if (getLexer().isNot(AsmToken::EndOfStatement)) {
     reportParseError("unexpected token in statement");
     return false;
   }
   Parser.Lex(); // Consume the EndOfStatement.
   return false;
 }
 
 bool MipsAsmParser::parseSetAtDirective() {
   // Line can be .set at - defaults to $1
   // or .set at=$reg
   int AtRegNo;
   getParser().Lex();
   if (getLexer().is(AsmToken::EndOfStatement)) {
-    Options.setATReg(1);
+    AssemblerOptions.top()->setATReg(1);
     Parser.Lex(); // Consume the EndOfStatement.
     return false;
   } else if (getLexer().is(AsmToken::Equal)) {
     getParser().Lex(); // Eat the '='.
     if (getLexer().isNot(AsmToken::Dollar)) {
       reportParseError("unexpected token in statement");
       return false;
     }
     Parser.Lex(); // Eat the '$'.
     const AsmToken &Reg = Parser.getTok();
     if (Reg.is(AsmToken::Identifier)) {
       AtRegNo = matchCPURegisterName(Reg.getIdentifier());
     } else if (Reg.is(AsmToken::Integer)) {
       AtRegNo = Reg.getIntVal();
     } else {
       reportParseError("unexpected token in statement");
       return false;
     }
 
     if (AtRegNo < 0 || AtRegNo > 31) {
       reportParseError("unexpected token in statement");
       return false;
     }
 
-    if (!Options.setATReg(AtRegNo)) {
+    if (!AssemblerOptions.top()->setATReg(AtRegNo)) {
       reportParseError("unexpected token in statement");
       return false;
     }
     getParser().Lex(); // Eat the register.
 
     if (getLexer().isNot(AsmToken::EndOfStatement)) {
       reportParseError("unexpected token in statement");
       return false;
     }
     Parser.Lex(); // Consume the EndOfStatement.
     return false;
   } else {
     reportParseError("unexpected token in statement");
     return false;
   }
 }
 
 bool MipsAsmParser::parseSetReorderDirective() {
   Parser.Lex();
   // If this is not the end of the statement, report an error.
   if (getLexer().isNot(AsmToken::EndOfStatement)) {
     reportParseError("unexpected token in statement");
     return false;
   }
-  Options.setReorder();
+  AssemblerOptions.top()->setReorder();
   getTargetStreamer().emitDirectiveSetReorder();
   Parser.Lex(); // Consume the EndOfStatement.
   return false;
 }
 
 bool MipsAsmParser::parseSetNoReorderDirective() {
   Parser.Lex();
   // If this is not the end of the statement, report an error.
   if (getLexer().isNot(AsmToken::EndOfStatement)) {
     reportParseError("unexpected token in statement");
     return false;
   }
-  Options.setNoreorder();
+  AssemblerOptions.top()->setNoreorder();
   getTargetStreamer().emitDirectiveSetNoReorder();
   Parser.Lex(); // Consume the EndOfStatement.
   return false;
 }
 
 bool MipsAsmParser::parseSetMacroDirective() {
   Parser.Lex();
   // If this is not the end of the statement, report an error.
   if (getLexer().isNot(AsmToken::EndOfStatement)) {
     reportParseError("unexpected token in statement");
     return false;
   }
-  Options.setMacro();
+  AssemblerOptions.top()->setMacro();
   Parser.Lex(); // Consume the EndOfStatement.
   return false;
 }
 
 bool MipsAsmParser::parseSetNoMacroDirective() {
   Parser.Lex();
   // If this is not the end of the statement, report an error.
   if (getLexer().isNot(AsmToken::EndOfStatement)) {
     reportParseError("`noreorder' must be set before `nomacro'");
     return false;
   }
-  if (Options.isReorder()) {
+  if (AssemblerOptions.top()->isReorder()) {
     reportParseError("`noreorder' must be set before `nomacro'");
     return false;
   }
-  Options.setNomacro();
+  AssemblerOptions.top()->setNomacro();
   Parser.Lex(); // Consume the EndOfStatement.
   return false;
 }
 
 bool MipsAsmParser::parseSetNoMips16Directive() {
   Parser.Lex();
   // If this is not the end of the statement, report an error.
   if (getLexer().isNot(AsmToken::EndOfStatement)) {
if (getLexer().isNot(AsmToken::EndOfStatement)) {
     reportParseError("unexpected token in statement");
     return false;
   }
   getTargetStreamer().emitDirectiveSetFp(FpAbiVal);
   Parser.Lex(); // Consume the EndOfStatement.
   return false;
 }
 
+bool MipsAsmParser::parseSetPopDirective() {
+  SMLoc Loc = getLexer().getLoc();
+
+  Parser.Lex();
+  if (getLexer().isNot(AsmToken::EndOfStatement))
+    return reportParseError("unexpected token in .set pop directive");
+
+  if (AssemblerOptions.size() == 1)
+    return reportParseError(Loc, ".set pop with no .set push");
+
+  AssemblerOptions.pop();  
+  setAvailableFeatures(AssemblerOptions.top()->getCurrentFeatures());
+  
+  getTargetStreamer().emitDirectiveSetPop();
+  return false;
+}
+
+bool MipsAsmParser::parseSetPushDirective() {
+  Parser.Lex();
+  if (getLexer().isNot(AsmToken::EndOfStatement))
+    return reportParseError("unexpected token in .set push directive");
+
+  AssemblerOptions.push(new MipsAssemblerOptions(AssemblerOptions.top()));
+
+  getTargetStreamer().emitDirectiveSetPush();
+  return false;
+}
+
 bool MipsAsmParser::parseSetAssignment() {
   StringRef Name;
   const MCExpr *Value;
 
   if (Parser.parseIdentifier(Name))
     reportParseError("expected identifier after .set");
 
   if (getLexer().isNot(AsmToken::Comma))
     return reportParseError("unexpected token in .set directive");
if (getLexer().isNot(AsmToken::Comma)) {
     return Error(Loc, ErrorStr);
   }
 
   Parser.Lex(); // Eat the comma.
   return true;
 }
 
 bool MipsAsmParser::parseDirectiveCPLoad(SMLoc Loc) {
-  if (Options.isReorder())
+  if (AssemblerOptions.top()->isReorder())
     Warning(Loc, ".cpload in reorder section");
 
   // FIXME: Warn if cpload is used in Mips16 mode.
 
   SmallVector<std::unique_ptr<MCParsedAsmOperand>, 1> Reg;
   OperandMatchResultTy ResTy = ParseAnyRegister(Reg);
   if (ResTy == MatchOperand_NoMatch || ResTy == MatchOperand_ParseFail) {
     reportParseError("expected register containing function address");
bool MipsAsmParser::parseDirectiveSet() {
   const AsmToken &Tok = Parser.getTok();
 
   if (Tok.getString() == "noat") {
     return parseSetNoAtDirective();
   } else if (Tok.getString() == "at") {
     return parseSetAtDirective();
   } else if (Tok.getString() == "fp") {
     return parseSetFpDirective();
+  } else if (Tok.getString() == "pop") {
+    return parseSetPopDirective();
+  } else if (Tok.getString() == "push") {
+    return parseSetPushDirective();
   } else if (Tok.getString() == "reorder") {
     return parseSetReorderDirective();
   } else if (Tok.getString() == "noreorder") {
     return parseSetNoReorderDirective();
   } else if (Tok.getString() == "macro") {
     return parseSetMacroDirective();
   } else if (Tok.getString() == "nomacro") {
     return parseSetNoMacroDirective();

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

 void MipsTargetStreamer::emitDirectiveSetMips5() {}
 void MipsTargetStreamer::emitDirectiveSetMips32() {}
 void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
 void MipsTargetStreamer::emitDirectiveSetMips32R6() {}
 void MipsTargetStreamer::emitDirectiveSetMips64() {}
 void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
 void MipsTargetStreamer::emitDirectiveSetMips64R6() {}
 void MipsTargetStreamer::emitDirectiveSetDsp() {}
+void MipsTargetStreamer::emitDirectiveSetPop() {}
+void MipsTargetStreamer::emitDirectiveSetPush() {}
 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
                                               const MCSymbol &Sym, bool IsReg) {
 }
 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
                                                      bool IsO32ABI) {
   if (!Enabled && !IsO32ABI)
     report_fatal_error("+nooddspreg is only valid for O32");
void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
   OS << "\t.set\tmips64r6\n";
   setCanHaveModuleDir(false);
 }
 
 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
   OS << "\t.set\tdsp\n";
   setCanHaveModuleDir(false);
 }
+
+void MipsTargetAsmStreamer::emitDirectiveSetPop() { OS << "\t.set\tpop\n"; }
+
+void MipsTargetAsmStreamer::emitDirectiveSetPush() { OS << "\t.set\tpush\n"; }
+
 // Print a 32 bit hex number with all numbers.
 static void printHex32(unsigned Value, raw_ostream &OS) {
   OS << "0x";
   for (int i = 7; i >= 0; i--)
     OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
 }
 
 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,

lib/Target/Mips/MipsTargetStreamer.h

public:
   virtual void emitDirectiveSetMips5();
   virtual void emitDirectiveSetMips32();
   virtual void emitDirectiveSetMips32R2();
   virtual void emitDirectiveSetMips32R6();
   virtual void emitDirectiveSetMips64();
   virtual void emitDirectiveSetMips64R2();
   virtual void emitDirectiveSetMips64R6();
   virtual void emitDirectiveSetDsp();
+  virtual void emitDirectiveSetPop();
+  virtual void emitDirectiveSetPush();
 
   // PIC support
   virtual void emitDirectiveCpload(unsigned RegNo);
   virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
                                     const MCSymbol &Sym, bool IsReg);
 
   /// Emit a '.module fp=value' directive using the given values.
   /// Updates the .MIPS.abiflags section
public:
   void emitDirectiveSetMips5() override;
   void emitDirectiveSetMips32() override;
   void emitDirectiveSetMips32R2() override;
   void emitDirectiveSetMips32R6() override;
   void emitDirectiveSetMips64() override;
   void emitDirectiveSetMips64R2() override;
   void emitDirectiveSetMips64R6() override;
   void emitDirectiveSetDsp() override;
+  void emitDirectiveSetPop() override;
+  void emitDirectiveSetPush() override;
 
   // PIC support
   virtual void emitDirectiveCpload(unsigned RegNo);
   void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
                             const MCSymbol &Sym, bool IsReg) override;
 
   // ABI Flags
   void emitDirectiveModuleFP(MipsABIFlagsSection::FpABIKind Value,

test/MC/Mips/set-push-pop-directives-bad.s

+# RUN: not llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 2>%t1
+# RUN: FileCheck %s < %t1
+
+        .text
+        .set pop
+# CHECK: :[[@LINE-1]]:14: error: .set pop with no .set push
+        .set push
+        .set pop
+        .set pop
+# CHECK: :[[@LINE-1]]:14: error: .set pop with no .set push
+        .set push foo
+# CHECK: :[[@LINE-1]]:19: error: unexpected token in .set push directive
+        .set pop bar
+# CHECK: :[[@LINE-1]]:18: error: unexpected token in .set pop directive

test/MC/Mips/set-push-pop-directives.s

+## This test checks that .set push and .set pop work as they should i.e.,
+## '.set push' creates a new environment with the same properties of the
+## old one and '.set pop' restores the old environment.
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32 | \
+# RUN: FileCheck %s
+
+    .text
+    .set noreorder
+    .set at=$ra
+    .set push
+    lw $1, 65536($1)
+    b  1336
+    .set reorder
+    b  1336
+    .set pop
+    b  1332
+
+# Now let's check the .set mipsx directives...
+# The -mcpu=mips32 option was specified on the command-line which means the current
+# arch is mips32.
+    .set push
+    .set mips32r2
+    .set push
+    .set mips32
+    .set pop
+# ARCH should be mips32r2 at this point. We must be able to assemble a mips32r2 instruction
+    ldxc1 $f0, $zero($5)
+    .set pop
+
+# CHECK: .text
+# CHECK: .set noreorder
+# CHECK: .set push
+# CHECK: lui $ra, 1
+# CHECK: addu $ra, $ra, $1
+# CHECK: lw $1, 0($ra)
+# CHECK: b 1336
+# CHECK-NOT: nop
+# CHECK: .set reorder
+# CHECK: b 1336
+# CHECK-NEXT: nop
+# CHECK: .set pop
+# CHECK: b 1332
+# CHECK-NOT: nop
+
+# CHECK: .set push
+# CHECK: .set mips32r2
+# CHECK: .set push
+# CHECK: .set mips32
+# CHECK: ldxc1 $f0, $zero($5)
+# CHECK: .set pop