This is an archive of the discontinued LLVM Phabricator instance.

Differential D46434

[llvm-exegesis] Fix pfm counter names for BDW.
ClosedPublic

Authored by courbet on May 4 2018, 8:26 AM.

Details

Reviewers
gchatelet
Commits
rGb18c34bc291a: [llvm-exegesis] Fix pfm counter names for BDW.
rL331532: [llvm-exegesis] Fix pfm counter names for BDW.
Summary

They are not consistent with other microarchitectures.

Diff Detail

Repository
rL LLVM

Event Timeline

courbet created this revision.May 4 2018, 8:26 AM
Herald added a subscriber: tschuett. · View Herald TranscriptMay 4 2018, 8:26 AM
gchatelet accepted this revision.May 4 2018, 8:29 AM
This revision is now accepted and ready to land.May 4 2018, 8:29 AM
Closed by commit rL331532: [llvm-exegesis] Fix pfm counter names for BDW. (authored by courbet). · Explain WhyMay 4 2018, 8:29 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
X86/
16 lines

Diff 145203

llvm/trunk/lib/Target/X86/X86PfmCounters.td

Show All 30 Lines
def HWPort4Counter : PfmIssueCounter<HWPort4, ["uops_dispatched_port:port_4"]>; def HWPort4Counter : PfmIssueCounter<HWPort4, ["uops_dispatched_port:port_4"]>;
def HWPort5Counter : PfmIssueCounter<HWPort5, ["uops_dispatched_port:port_5"]>; def HWPort5Counter : PfmIssueCounter<HWPort5, ["uops_dispatched_port:port_5"]>;
def HWPort6Counter : PfmIssueCounter<HWPort6, ["uops_dispatched_port:port_6"]>; def HWPort6Counter : PfmIssueCounter<HWPort6, ["uops_dispatched_port:port_6"]>;
def HWPort7Counter : PfmIssueCounter<HWPort7, ["uops_dispatched_port:port_7"]>; def HWPort7Counter : PfmIssueCounter<HWPort7, ["uops_dispatched_port:port_7"]>;
} }
let SchedModel = BroadwellModel in { let SchedModel = BroadwellModel in {
def BWCycleCounter : PfmCycleCounter<"unhalted_core_cycles">; def BWCycleCounter : PfmCycleCounter<"unhalted_core_cycles">;
def BWPort0Counter : PfmIssueCounter<BWPort0, ["uops_dispatched_port:port_0"]>; def BWPort0Counter : PfmIssueCounter<BWPort0, ["uops_executed_port:port_0"]>;
def BWPort1Counter : PfmIssueCounter<BWPort1, ["uops_dispatched_port:port_1"]>; def BWPort1Counter : PfmIssueCounter<BWPort1, ["uops_executed_port:port_1"]>;
def BWPort2Counter : PfmIssueCounter<BWPort2, ["uops_dispatched_port:port_2"]>; def BWPort2Counter : PfmIssueCounter<BWPort2, ["uops_executed_port:port_2"]>;
def BWPort3Counter : PfmIssueCounter<BWPort3, ["uops_dispatched_port:port_3"]>; def BWPort3Counter : PfmIssueCounter<BWPort3, ["uops_executed_port:port_3"]>;
def BWPort4Counter : PfmIssueCounter<BWPort4, ["uops_dispatched_port:port_4"]>; def BWPort4Counter : PfmIssueCounter<BWPort4, ["uops_executed_port:port_4"]>;
def BWPort5Counter : PfmIssueCounter<BWPort5, ["uops_dispatched_port:port_5"]>; def BWPort5Counter : PfmIssueCounter<BWPort5, ["uops_executed_port:port_5"]>;
def BWPort6Counter : PfmIssueCounter<BWPort6, ["uops_dispatched_port:port_6"]>; def BWPort6Counter : PfmIssueCounter<BWPort6, ["uops_executed_port:port_6"]>;
def BWPort7Counter : PfmIssueCounter<BWPort7, ["uops_dispatched_port:port_7"]>; def BWPort7Counter : PfmIssueCounter<BWPort7, ["uops_executed_port:port_7"]>;
} }
let SchedModel = SkylakeClientModel in { let SchedModel = SkylakeClientModel in {
def SKLCycleCounter : PfmCycleCounter<"unhalted_core_cycles">; def SKLCycleCounter : PfmCycleCounter<"unhalted_core_cycles">;
def SKLPort0Counter : PfmIssueCounter<SKLPort0, ["uops_dispatched_port:port_0"]>; def SKLPort0Counter : PfmIssueCounter<SKLPort0, ["uops_dispatched_port:port_0"]>;
def SKLPort1Counter : PfmIssueCounter<SKLPort1, ["uops_dispatched_port:port_1"]>; def SKLPort1Counter : PfmIssueCounter<SKLPort1, ["uops_dispatched_port:port_1"]>;
def SKLPort2Counter : PfmIssueCounter<SKLPort2, ["uops_dispatched_port:port_2"]>; def SKLPort2Counter : PfmIssueCounter<SKLPort2, ["uops_dispatched_port:port_2"]>;
def SKLPort3Counter : PfmIssueCounter<SKLPort3, ["uops_dispatched_port:port_3"]>; def SKLPort3Counter : PfmIssueCounter<SKLPort3, ["uops_dispatched_port:port_3"]>;
Show All 17 Lines