[mips] Show an error if register number is out of range

[atanasyan]

Summary

Current code does not check that a register number is in the 0-31 range. Sometimes the parser checks that later for some kinds of instructions, but that leads to unclear / incorrect error messages like that:

% cat test.s
.text
lb $4, 8($32)

% llvm-mc test.s -triple=mips64-unknown-linux
test.s:2:10: error: expected memory with 16-bit signed offset
  lb $4, 8($32)
         ^

Sometimes the parser just crashes:

% cat test.s
.text
lw  $4, 8($32)

% llvm-mc test.s -triple=mips64-unknown-linux

This patch resolves the problem by checking that register number after '$' sign is in the 0-31 range. If the number is out of the range the parser shows the invalid register number error, but treats invalid register number as a normal one to continue parsing and catch other possible errors.

[sdardis]

LGTM.

[atanasyan]

Thanks for review.

llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

MipsAsmParser::matchAnyRegisterWithoutDollar(OperandVector &Operands, SMLoc S) {
   if (Token.is(AsmToken::Identifier)) {
     DEBUG(dbgs() << ".. identifier\n");
     StringRef Identifier = Token.getIdentifier();
     OperandMatchResultTy ResTy =
         matchAnyRegisterNameWithoutDollar(Operands, Identifier, S);
     return ResTy;
   } else if (Token.is(AsmToken::Integer)) {
     DEBUG(dbgs() << ".. integer\n");
+    int64_t RegNum = Token.getIntVal();
+    if (RegNum < 0 || RegNum > 31) {
+      // Show the error, but treat invalid register
+      // number as a normal one to continue parsing
+      // and catch other possible errors.
+      Error(getLexer().getLoc(), "invalid register number");
+    }
     Operands.push_back(MipsOperand::createNumericReg(
-        Token.getIntVal(), Token.getString(), getContext().getRegisterInfo(), S,
+        RegNum, Token.getString(), getContext().getRegisterInfo(), S,
         Token.getLoc(), *this));
     return MatchOperand_Success;
   }
 
   DEBUG(dbgs() << Parser.getTok().getKind() << "\n");
 
   return MatchOperand_NoMatch;
 }

llvm/trunk/test/MC/Mips/eva/invalid.s

 # Instructions that are invalid
 #
 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips32r2 \
 # RUN:     -mattr=+eva 2>%t1
 # RUN: FileCheck %s < %t1
 
     .set noat
     cachee -1, 255($7) # CHECK: :[[@LINE]]:12: error: expected 5-bit unsigned immediate
     cachee 32, 255($7) # CHECK: :[[@LINE]]:12: error: expected 5-bit unsigned immediate
     prefe -1, 255($7)  # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
     prefe 32, 255($7)  # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
-    lle $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-    lle $4, 8($33)     # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+    lle $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid register number
+    lle $4, 8($33)     # CHECK: :[[@LINE]]:15: error: invalid register number
     lle $4, 512($5)    # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
     lle $4, -513($5)   # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
-    lwe $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-    lwe $4, 8($33)     # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+    lwe $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid register number
+    lwe $4, 8($33)     # CHECK: :[[@LINE]]:15: error: invalid register number
     lwe $4, 512($5)    # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
     lwe $4, -513($5)   # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
-    sbe $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-    sbe $4, 8($33)     # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+    sbe $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid register number
+    sbe $4, 8($33)     # CHECK: :[[@LINE]]:15: error: invalid register number
     sbe $4, 512($5)    # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
     sbe $4, -513($5)   # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
-    sce $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-    sce $4, 8($33)     # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+    sce $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid register number
+    sce $4, 8($33)     # CHECK: :[[@LINE]]:15: error: invalid register number
     sce $4, 512($5)    # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
     sce $4, -513($5)   # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
-    she $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-    she $4, 8($33)     # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+    she $33, 8($5)     # CHECK: :[[@LINE]]:9: error: invalid register number
+    she $4, 8($33)     # CHECK: :[[@LINE]]:15: error: invalid register number
     she $4, 512($5)    # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
     she $4, -513($5)   # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
-    swe $33, 8($4)     # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
-    swe $5, 8($34)     # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
+    swe $33, 8($4)     # CHECK: :[[@LINE]]:9: error: invalid register number
+    swe $5, 8($34)     # CHECK: :[[@LINE]]:15: error: invalid register number
     swe $5, 512($4)    # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
     swe $5, -513($4)   # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
 

llvm/trunk/test/MC/Mips/eva/invalid_R6.s

# RUN: FileCheck %s < %t1
         lwre      $zero,-256($gp)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         lwre      $zero,-176($gp)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         swle      $9,255($s1)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         swle      $10,-256($s3)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         swle      $8,131($s5)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         swre      $s4,255($13)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         swre      $s4,-256($13)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         swre      $s2,86($14)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lle       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
-        lle       $4, 8($33)         # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+        lle       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid register number
+        lle       $4, 8($33)         # CHECK: :[[@LINE]]:25: error: invalid register number
         lle       $4, 512($5)        # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
         lle       $4, -513($5)       # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
-        lwe       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
-        lwe       $4, 8($33)         # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+        lwe       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid register number
+        lwe       $4, 8($33)         # CHECK: :[[@LINE]]:25: error: invalid register number
         lwe       $4, 512($5)        # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
         lwe       $4, -513($5)       # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
-        sbe       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
-        sbe       $4, 8($33)         # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+        sbe       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid register number
+        sbe       $4, 8($33)         # CHECK: :[[@LINE]]:25: error: invalid register number
         sbe       $4, 512($5)        # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
         sbe       $4, -513($5)       # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
-        sce       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
-        sce       $4, 8($33)         # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+        sce       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid register number
+        sce       $4, 8($33)         # CHECK: :[[@LINE]]:25: error: invalid register number
         sce       $4, 512($5)        # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
         sce       $4, -513($5)       # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
-        she       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
-        she       $4, 8($33)         # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+        she       $33, 8($5)         # CHECK: :[[@LINE]]:19: error: invalid register number
+        she       $4, 8($33)         # CHECK: :[[@LINE]]:25: error: invalid register number
         she       $4, 512($5)        # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
         she       $4, -513($5)       # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
-        swe       $33, 8($4)         # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
-        swe       $5, 8($34)         # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
+        swe       $33, 8($4)         # CHECK: :[[@LINE]]:19: error: invalid register number
+        swe       $5, 8($34)         # CHECK: :[[@LINE]]:25: error: invalid register number
         swe       $5, 512($4)        # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset
         swe       $5, -513($4)       # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offset

llvm/trunk/test/MC/Mips/micromips-invalid.s

# RUN: FileCheck %s < %t1
   jraddiusp 2       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jraddiusp 3       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jraddiusp 10      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jraddiusp 18      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jraddiusp 31      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jraddiusp 33      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jraddiusp 125     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jraddiusp 132     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
-  lwu $32, 4096($32)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+  lwu $32, 4096($32)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number

llvm/trunk/test/MC/Mips/micromips/invalid.s

# RUN: FileCheck %s < %t1
   sra $2, $3, -1      # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
   sra $2, $3, 32      # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
   srl $2, $3, -1      # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
   srl $2, $3, 32      # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
   sync -1             # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
   sync 32             # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
   swe $2, -513($gp)   # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   swe $2, 512($gp)    # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  swe $33, 8($gp)     # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  swe $2, 8($33)      # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  swe $33, 8($gp)     # CHECK: :[[@LINE]]:7: error: invalid register number
+  swe $2, 8($33)      # CHECK: :[[@LINE]]:13: error: invalid register number
   sll $3, -1          # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
   sll $3, 32          # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
   sra $3, -1          # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
   sra $3, 32          # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
   srl $3, -1          # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
-  lle $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  lle $4, 8($33)      # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  lle $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid register number
+  lle $4, 8($33)      # CHECK: :[[@LINE]]:13: error: invalid register number
   lle $4, 512($5)     # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   lle $4, -513($5)    # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lwe $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  lwe $4, 8($33)      # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  lwe $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid register number
+  lwe $4, 8($33)      # CHECK: :[[@LINE]]:13: error: invalid register number
   lwe $4, 512($5)     # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   lwe $4, -513($5)    # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sbe $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  sbe $4, 8($33)      # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  sbe $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid register number
+  sbe $4, 8($33)      # CHECK: :[[@LINE]]:13: error: invalid register number
   sbe $4, 512($5)     # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   sbe $4, -513($5)    # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sce $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  sce $4, 8($33)      # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  sce $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid register number
+  sce $4, 8($33)      # CHECK: :[[@LINE]]:13: error: invalid register number
   sce $4, 512($5)     # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   sce $4, -513($5)    # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  she $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  she $4, 8($33)      # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  she $33, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid register number
+  she $4, 8($33)      # CHECK: :[[@LINE]]:13: error: invalid register number
   she $4, 512($5)     # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   she $4, -513($5)    # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lh $33, 8($4)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhe $34, 8($2)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhu $35, 8($2)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhue $36, 8($2)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lh $2, 8($34)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lhe $4, 8($33)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
-  lhu $4, 8($35)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lhue $4, 8($37)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
+  lh $33, 8($4)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhe $34, 8($2)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhu $35, 8($2)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhue $36, 8($2)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lh $2, 8($34)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhe $4, 8($33)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhu $4, 8($35)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhue $4, 8($37)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
   lh $2, -65536($4)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
   lh $2, 65536($4)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
   lhe $4, -512($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
   lhe $4, 512($2)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
   lhu $4, -65536($2)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
   lhu $4, 65536($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
   lhue $4, -512($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
   lhue $4, 512($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
   lwp $31, 8($4)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
                       # FIXME: This ought to point at the $34 but memory is treated as one operand.
-  lwp $16, 8($34)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
+  lwp $16, 8($34)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
   lwp $16, 4096($4)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
   lwp $16, 8($16)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
   swp $31, 8($4)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swp $16, 8($34)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
+  swp $16, 8($34)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
   swp $16, 4096($4)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
   andi $3, $4, -1     # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
   andi $3, $4, 65536  # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
   andi $3, -1         # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
   andi $3, 65536      # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
   ori $3, $4, -1      # CHECK: :[[@LINE]]:15: error: expected 16-bit unsigned immediate
   ori $3, $4, 65536   # CHECK: :[[@LINE]]:15: error: expected 16-bit unsigned immediate
   ori $3, -1          # CHECK: :[[@LINE]]:11: error: expected 16-bit unsigned immediate
   ori $3, 65536       # CHECK: :[[@LINE]]:11: error: expected 16-bit unsigned immediate
   xori $3, $4, -1     # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
   xori $3, $4, 65536  # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
   xori $3, -1         # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
   xori $3, 65536      # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
   not $3, 4           # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
-  lb $32, 8($5)       # CHECK: :[[@LINE]]:6: error: invalid operand for instruction
+  lb $32, 8($5)       # CHECK: :[[@LINE]]:6: error: invalid register number
   lb $4, -32769($5)   # CHECK: :[[@LINE]]:10: error: expected memory with 16-bit signed offset
   lb $4, 32768($5)    # CHECK: :[[@LINE]]:10: error: expected memory with 16-bit signed offset
-  lb $4, 8($32)       # CHECK: :[[@LINE]]:10: error: expected memory with 16-bit signed offset
-  lbu $32, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+  lb $4, 8($32)       # CHECK: :[[@LINE]]:12: error: invalid register number
+  lbu $32, 8($5)      # CHECK: :[[@LINE]]:7: error: invalid register number
   lbu $4, -32769($5)  # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
   lbu $4, 32768($5)   # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
-  lbu $4, 8($32)      # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
+  lbu $4, 8($32)      # CHECK: :[[@LINE]]:13: error: invalid register number

llvm/trunk/test/MC/Mips/micromips32r6/invalid.s

# RUN: FileCheck %s < %t1
   cache 32, 255($7)        # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
   # FIXME: Check '0 < pos + size <= 32' constraint on ext
   ext $2, $3, -1, 31       # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
   ext $2, $3, 32, 31       # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
   ext $2, $3, 1, 0         # CHECK: :[[@LINE]]:18: error: expected immediate in range 1 .. 32
   ext $2, $3, 1, 33        # CHECK: :[[@LINE]]:18: error: expected immediate in range 1 .. 32
   ins $2, $3, -1, 31       # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
   ins $2, $3, 32, 31       # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
-  ei $32                   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swe $33, 8($4)           # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-                           # FIXME: This ought to point at the $34 but memory is treated as one operand.
-  swe $5, 8($34)           # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  ei $32                   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  swe $33, 8($4)           # CHECK: :[[@LINE]]:7: error: invalid register number
+  swe $5, 8($34)           # CHECK: :[[@LINE]]:13: error: invalid register number
   swe $5, 512($4)          # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   lapc $7, 1048576         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
   lapc $6, -1048580        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
   lapc $3, 3               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
   lapc $3, -1              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 19-bit signed immediate and multiple of 4
   lbu16 $9, 8($16)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   lbu16 $3, -2($16)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
   lbu16 $3, -2($16)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
   lbu16 $16, 8($9)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   lhu16 $9, 4($16)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   lhu16 $3, 64($16)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
   lhu16 $3, 64($16)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
   lhu16 $16, 4($9)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   li16 $4, -2              # CHECK: :[[@LINE]]:12: error: expected immediate in range -1 .. 126
   li16 $4, 127             # CHECK: :[[@LINE]]:12: error: expected immediate in range -1 .. 126
   lsa   $4, $2, $3, 0      # CHECK: :[[@LINE]]:21: error: expected immediate in range 1 .. 4
   lsa   $4, $2, $3, 5      # CHECK: :[[@LINE]]:21: error: expected immediate in range 1 .. 4
   lw16  $9, 8($17)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   lw16  $4, 68($17)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
   lw16  $4, 68($17)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
   lw16  $17, 8($10)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   pref -1, 255($7)         # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
   pref 32, 255($7)         # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
-  teq $34, $9, 5           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  teq $8, $35, 6           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tge $34, $9, 5           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tge $8, $35, 6           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tgeu $34, $9, 5          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tgeu $8, $35, 6          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tlt $34, $9, 5           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tlt $8, $35, 6           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tltu $34, $9, 5          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tltu $8, $35, 6          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tne $34, $9, 5           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  tne $8, $35, 6           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+  teq $34, $9, 5           # CHECK: :[[@LINE]]:7: error: invalid register number
+  teq $8, $35, 6           # CHECK: :[[@LINE]]:11: error: invalid register number
+  tge $34, $9, 5           # CHECK: :[[@LINE]]:7: error: invalid register number
+  tge $8, $35, 6           # CHECK: :[[@LINE]]:11: error: invalid register number
+  tgeu $34, $9, 5          # CHECK: :[[@LINE]]:8: error: invalid register number
+  tgeu $8, $35, 6          # CHECK: :[[@LINE]]:12: error: invalid register number
+  tlt $34, $9, 5           # CHECK: :[[@LINE]]:7: error: invalid register number
+  tlt $8, $35, 6           # CHECK: :[[@LINE]]:11: error: invalid register number
+  tltu $34, $9, 5          # CHECK: :[[@LINE]]:8: error: invalid register number
+  tltu $8, $35, 6          # CHECK: :[[@LINE]]:12: error: invalid register number
+  tne $34, $9, 5           # CHECK: :[[@LINE]]:7: error: invalid register number
+  tne $8, $35, 6           # CHECK: :[[@LINE]]:11: error: invalid register number
   wait -1                  # CHECK: :[[@LINE]]:8: error: expected 10-bit unsigned immediate
   wait 1024                # CHECK: :[[@LINE]]:8: error: expected 10-bit unsigned immediate
-  wrpgpr $34, $4           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  wrpgpr $3, $33           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  wsbh $34, $4             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  wsbh $3, $33             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+  wrpgpr $34, $4           # CHECK: :[[@LINE]]:10: error: invalid register number
+  wrpgpr $3, $33           # CHECK: :[[@LINE]]:14: error: invalid register number
+  wsbh $34, $4             # CHECK: :[[@LINE]]:8: error: invalid register number
+  wsbh $3, $33             # CHECK: :[[@LINE]]:12: error: invalid register number
   jrcaddiusp 1             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jrcaddiusp 2             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jrcaddiusp 3             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jrcaddiusp 10            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jrcaddiusp 18            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jrcaddiusp 31            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jrcaddiusp 33            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
   jrcaddiusp 125           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
# RUN: FileCheck %s < %t1
   srl $4, $3, -1           # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
   srl $4, $3, 32           # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
   sll $3, -1               # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
   sll $3, 32               # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
   sra $3, -1               # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
   sra $3, 32               # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
   srl $3, -1               # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
   srl $3, 32               # CHECK: :[[@LINE]]:11: error: expected 5-bit unsigned immediate
-  lle $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  lle $4, 8($33)           # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  lle $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid register number
+  lle $4, 8($33)           # CHECK: :[[@LINE]]:13: error: invalid register number
   lle $4, 512($5)          # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   lle $4, -513($5)         # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lwe $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  lwe $4, 8($33)           # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  lwe $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid register number
+  lwe $4, 8($33)           # CHECK: :[[@LINE]]:13: error: invalid register number
   lwe $4, 512($5)          # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   lwe $4, -513($5)         # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sbe $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  sbe $4, 8($33)           # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  sbe $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid register number
+  sbe $4, 8($33)           # CHECK: :[[@LINE]]:13: error: invalid register number
   sbe $4, 512($5)          # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   sbe $4, -513($5)         # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  sce $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  sce $4, 8($33)           # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  sce $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid register number
+  sce $4, 8($33)           # CHECK: :[[@LINE]]:13: error: invalid register number
   sce $4, 512($5)          # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   sce $4, -513($5)         # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  she $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
-  she $4, 8($33)           # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
+  she $33, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid register number
+  she $4, 8($33)           # CHECK: :[[@LINE]]:13: error: invalid register number
   she $4, 512($5)          # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   she $4, -513($5)         # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
   swe $5, -513($4)         # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
-  lh $33, 8($4)            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhe $34, 8($2)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhu $35, 8($2)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lhue $36, 8($2)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  lh $2, 8($34)            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lhe $4, 8($33)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
-  lhu $4, 8($35)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-  lhue $4, 8($37)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
+  lh $33, 8($4)            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhe $34, 8($2)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhu $35, 8($2)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhue $36, 8($2)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lh $2, 8($34)            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhe $4, 8($33)           # CHECK: :[[@LINE]]:13: error: invalid register number
+  lhu $4, 8($35)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+  lhue $4, 8($37)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
   lh $2, -65536($4)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
   lh $2, 65536($4)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
   lhe $4, -512($2)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
   lhe $4, 512($2)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
   lhu $4, -65536($2)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
   lhu $4, 65536($2)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
   lhue $4, -512($2)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
   lhue $4, 512($2)         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
# RUN: FileCheck %s < %t1
   rotr $2, $3, -1          # CHECK: :[[@LINE]]:16: error: expected 5-bit unsigned immediate
   rotr $2, $3, 32          # CHECK: :[[@LINE]]:16: error: expected 5-bit unsigned immediate
   rotrv $9, $6, 5          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   swm32 $5, $6, 8($4)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
   swm32 $16, $19, 8($4)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected
   swm32 $16-$25, 8($4)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
   lwp $31, 8($4)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
                            # FIXME: This ought to point at the $34 but memory is treated as one operand.
-  lwp $16, 8($34)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
+  lwp $16, 8($34)          # CHECK: :[[@LINE]]:14: error: invalid register number
   lwp $16, 4096($4)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
   lwp $16, 8($16)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
   swp $31, 8($4)           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-  swp $16, 8($34)          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
+  swp $16, 8($34)          # CHECK: :[[@LINE]]:14: error: invalid register number
   swp $16, 4096($4)        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 12-bit signed offset
                            # bposge32 is microMIPS DSP instruction
   bposge32 342             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   bc1eqzc $f32, 4          # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
   bc1eqzc $f31, -65535     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
   bc1eqzc $f31, -65537     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
   bc1eqzc $f31, 65535      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
   bc1eqzc $f31, 65536      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
   bc1nezc $f32, 4          # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
   bc1nezc $f31, -65535     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
   bc1nezc $f31, -65537     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
   bc1nezc $f31, 65535      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
   bc1nezc $f31, 65536      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bc2eqzc $32, 4           # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
+  bc2eqzc $32, 4           # CHECK: :[[@LINE]]:11: error: invalid register number
   bc2eqzc $31, -65535      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
   bc2eqzc $31, -65537      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
   bc2eqzc $31, 65535       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
   bc2eqzc $31, 65536       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
-  bc2nezc $32, 4           # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
+  bc2nezc $32, 4           # CHECK: :[[@LINE]]:11: error: invalid register number
   bc2nezc $31, -65535      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
   bc2nezc $31, -65537      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
   bc2nezc $31, 65535       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
   bc2nezc $31, 65536       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
   jalrc $31                # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
   jalrc $31, $31           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
   andi $3, $4, -1          # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
   andi $3, $4, 65536       # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
   andi $3, -1              # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
   andi $3, 65536           # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
   ori $3, $4, -1           # CHECK: :[[@LINE]]:15: error: expected 16-bit unsigned immediate
   ori $3, $4, 65536        # CHECK: :[[@LINE]]:15: error: expected 16-bit unsigned immediate
   ori $3, -1               # CHECK: :[[@LINE]]:11: error: expected 16-bit unsigned immediate
   ori $3, 65536            # CHECK: :[[@LINE]]:11: error: expected 16-bit unsigned immediate
   xori $3, $4, -1          # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
   xori $3, $4, 65536       # CHECK: :[[@LINE]]:16: error: expected 16-bit unsigned immediate
   xori $3, -1              # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
   xori $3, 65536           # CHECK: :[[@LINE]]:12: error: expected 16-bit unsigned immediate
   not $3, 4                # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
-  lb $32, 8($5)            # CHECK: :[[@LINE]]:6: error: invalid operand for instruction
+  lb $32, 8($5)            # CHECK: :[[@LINE]]:6: error: invalid register number
   lb $4, -32769($5)        # CHECK: :[[@LINE]]:10: error: expected memory with 16-bit signed offset
   lb $4, 32768($5)         # CHECK: :[[@LINE]]:10: error: expected memory with 16-bit signed offset
-  lb $4, 8($32)            # CHECK: :[[@LINE]]:10: error: expected memory with 16-bit signed offset
-  lbu $32, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
+  lb $4, 8($32)            # CHECK: :[[@LINE]]:12: error: invalid register number
+  lbu $32, 8($5)           # CHECK: :[[@LINE]]:7: error: invalid register number
   lbu $4, -32769($5)       # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
   lbu $4, 32768($5)        # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
-  lbu $4, 8($32)           # CHECK: :[[@LINE]]:11: error: expected memory with 16-bit signed offset
+  lbu $4, 8($32)           # CHECK: :[[@LINE]]:13: error: invalid register number
   ldc1 $f32, 300($10)      # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
   ldc1 $f7, -32769($10)    # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
   ldc1 $f7, 32768($10)     # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  ldc1 $f7, 300($32)       # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
+  ldc1 $f7, 300($32)       # CHECK: :[[@LINE]]:17: error: invalid register number
   sdc1 $f32, 64($10)       # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
   sdc1 $f7, -32769($10)    # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
   sdc1 $f7, 32768($10)     # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  sdc1 $f7, 64($32)        # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
+  sdc1 $f7, 64($32)        # CHECK: :[[@LINE]]:16: error: invalid register number
   lwc1 $f32, 32($5)        # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
   lwc1 $f2, -32769($5)     # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
   lwc1 $f2, 32768($5)      # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  lwc1 $f2, 32($32)        # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
+  lwc1 $f2, 32($32)        # CHECK: :[[@LINE]]:16: error: invalid register number
   swc1 $f32, 369($13)      # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
   swc1 $f6, -32769($13)    # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
   swc1 $f6, 32768($13)     # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  swc1 $f6, 369($32)       # CHECK: :[[@LINE]]:13: error: expected memory with 16-bit signed offset
-  ldc2 $32, 1023($12)      # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  sdc2 $32, 8($16)         # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  lwc2 $32, 16($4)         # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
-  swc2 $32, 777($17)       # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
+  swc1 $f6, 369($32)       # CHECK: :[[@LINE]]:17: error: invalid register number
+  ldc2 $32, 1023($12)      # CHECK: :[[@LINE]]:8: error: invalid register number
+  sdc2 $32, 8($16)         # CHECK: :[[@LINE]]:8: error: invalid register number
+  lwc2 $32, 16($4)         # CHECK: :[[@LINE]]:8: error: invalid register number
+  swc2 $32, 777($17)       # CHECK: :[[@LINE]]:8: error: invalid register number
   sdc2 $11, -1025($12)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   sdc2 $11, 1024($12)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   swc2 $11, -1025($12)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   swc2 $11, 1024($12)      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   bgec  $0, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instruction
   bgec  $2, $2, 12         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
   bgec  $2, $4, -131076    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
   bgec  $2, $4, -131071    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
# RUN: FileCheck %s < %t1
   teqi $4, 5               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   tgei $4, 5               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   tgeiu $4, 5              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   tlti $4, 5               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   tltiu $4, 5              # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   tnei $4, 5               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
   syscall -1               # CHECK: :[[@LINE]]:11: error: expected 10-bit unsigned immediate
   syscall $4               # CHECK: :[[@LINE]]:11: error: expected 10-bit unsigned immediate
-  ldc2 $1, 1023($32)       # CHECK: :[[@LINE]]:12: error: expected memory with 11-bit signed offset
-  lwc2 $1, 16($32)         # CHECK: :[[@LINE]]:12: error: expected memory with 11-bit signed offset
-  sdc2 $1, 8($32)          # CHECK: :[[@LINE]]:12: error: expected memory with 11-bit signed offset
-  swc2 $1, 777($32)        # CHECK: :[[@LINE]]:12: error: expected memory with 11-bit signed offset
+  ldc2 $1, 1023($32)       # CHECK: :[[@LINE]]:17: error: invalid register number
+  lwc2 $1, 16($32)         # CHECK: :[[@LINE]]:15: error: invalid register number
+  sdc2 $1, 8($32)          # CHECK: :[[@LINE]]:14: error: invalid register number
+  swc2 $1, 777($32)        # CHECK: :[[@LINE]]:16: error: invalid register number

llvm/trunk/test/MC/Mips/mips-register-names-invalid.s

 # RUN: not llvm-mc %s -triple=mips-unknown-freebsd -show-encoding 2>%t0
 # RUN: FileCheck %s < %t0
 
 # $32 used to trigger an assertion instead of the usual error message due to
 # an off-by-one bug.
 
-# CHECK: :[[@LINE+1]]:17: error: invalid operand for instruction
+# CHECK: :[[@LINE+1]]:17: error: invalid register number
         add     $32, $0, $0
+# CHECK: :[[@LINE+1]]:26: error: invalid register number
+        lw      $8, 0x10($32)

llvm/trunk/test/MC/Mips/mips32r5/invalid.s

# RUN: FileCheck %s < %t1
         mtc0  $4, $3, -1     # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mtc0  $4, $3, 8      # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mtc2  $4, $3, -1     # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mtc2  $4, $3, 8      # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mfc0  $4, $3, -1     # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mfc0  $4, $3, 8      # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mfc2  $4, $3, -1     # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mfc2  $4, $3, 8      # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
-        lb $32, 8($5)        # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
+        lb $32, 8($5)        # CHECK: :[[@LINE]]:12: error: invalid register number
         lb $4, -32769($5)    # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
         lb $4, 32768($5)     # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
-        lb $4, 8($32)        # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
-        lbu $32, 8($5)       # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
+        lb $4, 8($32)        # CHECK: :[[@LINE]]:18: error: invalid register number
+        lbu $32, 8($5)       # CHECK: :[[@LINE]]:13: error: invalid register number
         lbu $4, -32769($5)   # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
         lbu $4, 32768($5)    # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
-        lbu $4, 8($32)       # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
+        lbu $4, 8($32)       # CHECK: :[[@LINE]]:19: error: invalid register number
         ldc1 $f32, 300($10)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         ldc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         ldc1 $f7, 32768($10)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        ldc1 $f7, 300($32)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        ldc1 $f7, 300($32)    # CHECK: :[[@LINE]]:23: error: invalid register number
         sdc1 $f32, 64($10)    # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         sdc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         sdc1 $f7, 32768($10)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        sdc1 $f7, 64($32)     # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        sdc1 $f7, 64($32)     # CHECK: :[[@LINE]]:22: error: invalid register number
         lwc1 $f32, 32($5)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         lwc1 $f2, -32769($5)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         lwc1 $f2, 32768($5)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        lwc1 $f2, 32($32)     # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        lwc1 $f2, 32($32)     # CHECK: :[[@LINE]]:22: error: invalid register number
         swc1 $f32, 369($13)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         swc1 $f6, -32769($13) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         swc1 $f6, 32768($13)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        swc1 $f6, 369($32)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        ldc2 $32, 1023($12)  # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        swc1 $f6, 369($32)    # CHECK: :[[@LINE]]:23: error: invalid register number
+        ldc2 $32, 1023($12)  # CHECK: :[[@LINE]]:14: error: invalid register number
         ldc2 $1, -32769($12) # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
         ldc2 $1, 32768($12)  # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        ldc2 $1, 1023($32)   # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        sdc2 $32, 8($16)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        ldc2 $1, 1023($32)   # CHECK: :[[@LINE]]:23: error: invalid register number
+        sdc2 $32, 8($16)     # CHECK: :[[@LINE]]:14: error: invalid register number
         sdc2 $1, -32769($16) # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
         sdc2 $1, 32768($16)  # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        sdc2 $1, 8($32)      # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        lwc2 $32, 16($4)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        sdc2 $1, 8($32)      # CHECK: :[[@LINE]]:20: error: invalid register number
+        lwc2 $32, 16($4)     # CHECK: :[[@LINE]]:14: error: invalid register number
         lwc2 $1, -32769($4)  # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
         lwc2 $1, 32768($4)   # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        lwc2 $1, 16($32)     # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        swc2 $32, 777($17)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        lwc2 $1, 16($32)     # CHECK: :[[@LINE]]:21: error: invalid register number
+        swc2 $32, 777($17)   # CHECK: :[[@LINE]]:14: error: invalid register number
         swc2 $1, -32769($17) # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
         swc2 $1, 32768($17)  # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        swc2 $1, 777($32)    # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
+        swc2 $1, 777($32)    # CHECK: :[[@LINE]]:22: error: invalid register number
         lwc2 $11, -32769($12)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         lwc2 $11, 32768($12)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         sdc2 $11, -32769($12)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         sdc2 $11, 32768($12)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         swc2 $11, -32769($12)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         swc2 $11, 32768($12)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset

llvm/trunk/test/MC/Mips/mips32r6/invalid-mips5-wrong-error.s

 # Instructions that are invalid but currently emit the wrong error message.
 #
 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
 # RUN:     2>%t1
 # RUN: FileCheck %s < %t1
 
   .set noat
         bc1any2f  $fcc2,4             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
         bc1any2t  $fcc2,4             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
         bc1any4f  $fcc2,4             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
         bc1any4t  $fcc2,4             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
         ldc2 $1, -2049($12)           # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
         ldc2 $1, 2048($12)            # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
-        ldc2 $1, 1023($32)            # CHECK: :[[@LINE]]:18: error: expected memory with 11-bit signed offset
         lwc2 $1, -2049($4)            # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
         lwc2 $1, 2048($4)             # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
-        lwc2 $1, 16($32)              # CHECK: :[[@LINE]]:18: error: expected memory with 11-bit signed offset
         sdc2 $1, -2049($16)           # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
         sdc2 $1, 2048($16)            # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
-        sdc2 $1, 8($32)               # CHECK: :[[@LINE]]:18: error: expected memory with 11-bit signed offset
         swc2 $1, -2049($17)           # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
         swc2 $1, 2048($17)            # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
-        swc2 $1, 777($32)             # CHECK: :[[@LINE]]:18: error: expected memory with 11-bit signed offset

llvm/trunk/test/MC/Mips/mips32r6/invalid.s

local_label:
         swc2    $25,24880($s0)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         break -1          # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
         break 1024        # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
         break -1, 5       # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
         break 1024, 5     # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
         break 7, -1       # CHECK: :[[@LINE]]:18: error: expected 10-bit unsigned immediate
         break 7, 1024     # CHECK: :[[@LINE]]:18: error: expected 10-bit unsigned immediate
         break 1024, 1024  # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
-        lh  $33, 8($4)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lhe $34, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lhu $35, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lhue $36, 8($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lh  $2, 8($34)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-        lhe $4, 8($33)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lhu $4, 8($35)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-        lhue $4, 8($37)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+        lh  $33, 8($4)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhe $34, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhu $35, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhue $36, 8($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lh  $2, 8($34)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhe $4, 8($33)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhu $4, 8($35)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhue $4, 8($37)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
         lh  $2, -65536($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         lh  $2, 65536($4)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         lhe $4, -512($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         lhe $4, 512($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         lhu $4, -65536($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         lhu $4, 65536($2)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         lhue $4, -512($2)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         lhue $4, 512($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
local_label:
         mfc0  $4, $3, -1     # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mfc0  $4, $3, 8      # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mfc2  $4, $3, -1     # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         mfc2  $4, $3, 8      # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate
         sdc2 $20, -1025($s2) # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
         sdc2 $20, 1024($s2)  # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled
         sync -1              # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
         sync 32              # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
-        lb $32, 8($5)        # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
+        lb $32, 8($5)        # CHECK: :[[@LINE]]:12: error: invalid register number
         lb $4, -32769($5)    # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
         lb $4, 32768($5)     # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
-        lb $4, 8($32)        # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
-        lbu $32, 8($5)       # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
+        lb $4, 8($32)        # CHECK: :[[@LINE]]:18: error: invalid register number
+        lbu $32, 8($5)       # CHECK: :[[@LINE]]:13: error: invalid register number
         lbu $4, -32769($5)   # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
         lbu $4, 32768($5)    # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
-        lbu $4, 8($32)       # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
+        lbu $4, 8($32)       # CHECK: :[[@LINE]]:19: error: invalid register number
         ldc1 $f32, 300($10)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         ldc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         ldc1 $f7, 32768($10)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        ldc1 $f7, 300($32)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        ldc1 $f7, 300($32)    # CHECK: :[[@LINE]]:23: error: invalid register number
         sdc1 $f32, 64($10)    # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         sdc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         sdc1 $f7, 32768($10)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        sdc1 $f7, 64($32)     # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        sdc1 $f7, 64($32)     # CHECK: :[[@LINE]]:22: error: invalid register number
         lwc1 $f32, 32($5)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         lwc1 $f2, -32769($5)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         lwc1 $f2, 32768($5)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        lwc1 $f2, 32($32)     # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        lwc1 $f2, 32($32)     # CHECK: :[[@LINE]]:22: error: invalid register number
         swc1 $f32, 369($13)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         swc1 $f6, -32769($13) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         swc1 $f6, 32768($13)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        swc1 $f6, 369($32)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        ldc2 $32, 1023($12)  # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        swc1 $f6, 369($32)    # CHECK: :[[@LINE]]:23: error: invalid register number
+        ldc2 $32, 1023($12)  # CHECK: :[[@LINE]]:14: error: invalid register number
         ldc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         ldc2 $11, 1024($12)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
-        sdc2 $32, 8($16)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        sdc2 $32, 8($16)     # CHECK: :[[@LINE]]:14: error: invalid register number
         sdc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         sdc2 $11, 1024($12)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
-        lwc2 $32, 16($4)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        lwc2 $32, 16($4)     # CHECK: :[[@LINE]]:14: error: invalid register number
         lwc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         lwc2 $11, 1024($12)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
-        swc2 $32, 777($17)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        swc2 $32, 777($17)   # CHECK: :[[@LINE]]:14: error: invalid register number
         swc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         swc2 $11, 1024($12)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled

llvm/trunk/test/MC/Mips/mips64r3/invalid.s

 # Instructions that are valid for the current ISA but should be rejected by the assembler (e.g.
 # invalid set of operands or operand's restrictions not met).
 
 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -mcpu=mips64r3 2>%t1
 # RUN: FileCheck %s < %t1
 
         .text
         .set noreorder
         cache -1, 255($7)    # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
         cache 32, 255($7)    # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate
         drotr32 $2, $3, -1   # CHECK: :[[@LINE]]:25: error: expected 5-bit unsigned immediate
         drotr32 $2, $3, 32   # CHECK: :[[@LINE]]:25: error: expected 5-bit unsigned immediate
         jalr.hb $31          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
         jalr.hb $31, $31     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
         pref -1, 255($7)     # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
         pref 32, 255($7)     # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
-        sd $32, 65536($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+        sd $32, 65536($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number

llvm/trunk/test/MC/Mips/mips64r5/invalid.s

# RUN: FileCheck %s < %t1
         jalr.hb $31          # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
         jalr.hb $31, $31     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: source and destination must be different
         pref -1, 255($7)     # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
         pref 32, 255($7)     # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
         dmtc0  $4, $3, -1    # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
         dmtc0  $4, $3, 8     # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
         dmfc0  $4, $3, -1    # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
         dmfc0  $4, $3, 8     # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
-        sd $32, 65536($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lb $32, 8($5)        # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
+        sd $32, 65536($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lb $32, 8($5)        # CHECK: :[[@LINE]]:12: error: invalid register number
         lb $4, -32769($5)    # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
         lb $4, 32768($5)     # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
-        lb $4, 8($32)        # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
-        lbu $32, 8($5)       # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
+        lb $4, 8($32)        # CHECK: :[[@LINE]]:18: error: invalid register number
+        lbu $32, 8($5)       # CHECK: :[[@LINE]]:13: error: invalid register number
         lbu $4, -32769($5)   # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
         lbu $4, 32768($5)    # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
-        lbu $4, 8($32)       # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
+        lbu $4, 8($32)       # CHECK: :[[@LINE]]:19: error: invalid register number
         ldc1 $f32, 300($10)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         ldc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         ldc1 $f7, 32768($10)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        ldc1 $f7, 300($32)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        ldc1 $f7, 300($32)    # CHECK: :[[@LINE]]:23: error: invalid register number
         sdc1 $f32, 64($10)    # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         sdc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         sdc1 $f7, 32768($10)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        sdc1 $f7, 64($32)     # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        sdc1 $f7, 64($32)     # CHECK: :[[@LINE]]:22: error: invalid register number
         lwc1 $f32, 32($5)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         lwc1 $f2, -32769($5)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         lwc1 $f2, 32768($5)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        lwc1 $f2, 32($32)     # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        lwc1 $f2, 32($32)     # CHECK: :[[@LINE]]:22: error: invalid register number
         swc1 $f32, 369($13)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         swc1 $f6, -32769($13) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         swc1 $f6, 32768($13)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        swc1 $f6, 369($32)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        ldc2 $32, 1023($12)  # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        swc1 $f6, 369($32)    # CHECK: :[[@LINE]]:23: error: invalid register number
+        ldc2 $32, 1023($12)  # CHECK: :[[@LINE]]:14: error: invalid register number
         ldc2 $1, -32769($12) # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
         ldc2 $1, 32768($12)  # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        ldc2 $1, 1023($32)   # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        sdc2 $32, 8($16)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        ldc2 $1, 1023($32)   # CHECK: :[[@LINE]]:23: error: invalid register number
+        sdc2 $32, 8($16)     # CHECK: :[[@LINE]]:14: error: invalid register number
         sdc2 $1, -32769($16) # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
         sdc2 $1, 32768($16)  # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        sdc2 $1, 8($32)      # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        lwc2 $32, 16($4)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        sdc2 $1, 8($32)      # CHECK: :[[@LINE]]:20: error: invalid register number
+        lwc2 $32, 16($4)     # CHECK: :[[@LINE]]:14: error: invalid register number
         lwc2 $1, -32769($4)  # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
         lwc2 $1, 32768($4)   # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        lwc2 $1, 16($32)     # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        swc2 $32, 777($17)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        lwc2 $1, 16($32)     # CHECK: :[[@LINE]]:21: error: invalid register number
+        swc2 $32, 777($17)   # CHECK: :[[@LINE]]:14: error: invalid register number
         swc2 $1, -32769($17) # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
         swc2 $1, 32768($17)  # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
-        swc2 $1, 777($32)    # CHECK: :[[@LINE]]:18: error: expected memory with 16-bit signed offset
+        swc2 $1, 777($32)    # CHECK: :[[@LINE]]:22: error: invalid register number
         lwc2 $11, -32769($12)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         lwc2 $11, 32768($12)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         sdc2 $11, -32769($12)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         sdc2 $11, 32768($12)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         swc2 $11, -32769($12)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         swc2 $11, 32768($12)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset

llvm/trunk/test/MC/Mips/mips64r6/invalid.s

.set noat
         dinsm $2, $3, 0, 1   # CHECK: :[[@LINE]]:26: error: expected immediate in range 2 .. 64
         dinsm $2, $3, 0, 65  # CHECK: :[[@LINE]]:26: error: expected immediate in range 2 .. 64
         dinsm $4, $5, 31, 34 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
         dinsu $2, $3, 31, 1  # CHECK: :[[@LINE]]:23: error: expected immediate in range 32 .. 63
         dinsu $2, $3, 64, 1  # CHECK: :[[@LINE]]:23: error: expected immediate in range 32 .. 63
         dinsu $2, $3, 32, 0  # CHECK: :[[@LINE]]:27: error: expected immediate in range 1 .. 32
         dinsu $2, $3, 32, 33 # CHECK: :[[@LINE]]:27: error: expected immediate in range 1 .. 32
         dinsu $4, $5, 33, 32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: size plus position are not in the range 33 .. 64
-        lh  $33, 8($4)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lhe $34, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lhu $35, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lhue $36, 8($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lh  $2, 8($34)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-        lhe $4, 8($33)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lhu $4, 8($35)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-        lhue $4, 8($37)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+        lh  $33, 8($4)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhe $34, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhu $35, 8($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhue $36, 8($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lh  $2, 8($34)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhe $4, 8($33)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhu $4, 8($35)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lhue $4, 8($37)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
         lh  $2, -65536($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         lh  $2, 65536($4)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         lhe $4, -512($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         lhe $4, 512($2)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         lhu $4, -65536($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         lhu $4, 65536($2)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         lhue $4, -512($2)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
         lhue $4, 512($2)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
.set noat
         pref -1, 255($7)     # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
         pref 32, 255($7)     # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate
         dmtc0  $4, $3, -1    # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
         dmtc0  $4, $3, 8     # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
         dmfc0  $4, $3, -1    # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
         dmfc0  $4, $3, 8     # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate
         ld $2, 65536($4)     # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         ld  $2, -65536($4)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-        ld $32, 65536($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+        ld $32, 65536($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
         lld  $2, -65536($4)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         lld  $2, 65536($4)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
         sd  $2, -65536($4)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-        lld $32, 4096($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+        lld $32, 4096($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
         sd  $2, 65536($4)    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 16-bit signed offset
-        sd $32, 65536($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+        sd $32, 65536($32)   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
         dsrl $2, $4, 64      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
         dsrl $2, $4, -2      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate
-        dsrl $32, $32, 32    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+        dsrl $32, $32, 32    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
         dsrl32 $2, $4, 32    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 5-bit unsigned immediate
-        dsrl32 $32, $32, 32  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+        dsrl32 $32, $32, 32  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
         dsrlv $2, $4, 2      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        dsrlv $32, $32, $32  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
-        lb $32, 8($5)        # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
+        dsrlv $32, $32, $32  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
+        lb $32, 8($5)        # CHECK: :[[@LINE]]:12: error: invalid register number
         lb $4, -32769($5)    # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
         lb $4, 32768($5)     # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
-        lb $4, 8($32)        # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset
-        lbu $32, 8($5)       # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
+        lb $4, 8($32)        # CHECK: :[[@LINE]]:18: error: invalid register number
+        lbu $32, 8($5)       # CHECK: :[[@LINE]]:13: error: invalid register number
         lbu $4, -32769($5)   # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
         lbu $4, 32768($5)    # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
-        lbu $4, 8($32)       # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset
+        lbu $4, 8($32)       # CHECK: :[[@LINE]]:19: error: invalid register number
         ldc1 $f32, 300($10)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         ldc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         ldc1 $f7, 32768($10)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        ldc1 $f7, 300($32)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        ldc1 $f7, 300($32)    # CHECK: :[[@LINE]]:23: error: invalid register number
         sdc1 $f32, 64($10)    # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         sdc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         sdc1 $f7, 32768($10)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        sdc1 $f7, 64($32)     # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        sdc1 $f7, 64($32)     # CHECK: :[[@LINE]]:22: error: invalid register number
         lwc1 $f32, 32($5)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         lwc1 $f2, -32769($5)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         lwc1 $f2, 32768($5)   # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        lwc1 $f2, 32($32)     # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
+        lwc1 $f2, 32($32)     # CHECK: :[[@LINE]]:22: error: invalid register number
         swc1 $f32, 369($13)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
         swc1 $f6, -32769($13) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
         swc1 $f6, 32768($13)  # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        swc1 $f6, 369($32)    # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset
-        ldc2 $32, 1023($12)  # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        swc1 $f6, 369($32)    # CHECK: :[[@LINE]]:23: error: invalid register number
+        ldc2 $32, 1023($12)  # CHECK: :[[@LINE]]:14: error: invalid register number
         ldc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         ldc2 $11, 1024($12)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
-        sdc2 $32, 8($16)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        sdc2 $32, 8($16)     # CHECK: :[[@LINE]]:14: error: invalid register number
         sdc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         sdc2 $11, 1024($12)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
-        lwc2 $32, 16($4)     # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        lwc2 $32, 16($4)     # CHECK: :[[@LINE]]:14: error: invalid register number
         lwc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         lwc2 $11, 1024($12)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
-        swc2 $32, 777($17)   # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
+        swc2 $32, 777($17)   # CHECK: :[[@LINE]]:14: error: invalid register number
         swc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         swc2 $11, 1024($12)  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled