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[x86] Introduce the pconfig/enclv instructions
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Authored by GBuella on Mar 12 2018, 8:11 AM.

Details

Reviewers
craig.topper
zvi
Summary

Two new instructions: pconfig and enclv. Four new LLVM
intrinsics for pconfig and for encl[u|s|v].

Diff Detail

Event Timeline

GBuella created this revision.Mar 12 2018, 8:11 AM
craig.topper added inline comments.Mar 12 2018, 9:29 AM
lib/Support/Host.cpp
1275

Did you mean -march=native?

lib/Target/X86/X86ISelLowering.cpp
21174

Variable names should be uppercase.

lib/Target/X86/X86ISelLowering.h
567 ↗(On Diff #138010)

These aren't used by your patch since you selected the machine node directly.

lib/Target/X86/X86IntrinsicsInfo.h
337 ↗(On Diff #138010)

You're not really using the X86ISD opcodes listed in the table here. You're probably better off not putting these in the table and putting the intrinsics in the earlier switch that's used when the table doesn't have an entry. The one that handles Intrinsic::x86_lwpins64

utils/TableGen/X86RecognizableInstr.cpp
681 ↗(On Diff #138010)

We should just add all of C8-FF into this switch. They are all defined not sure why they aren't already here. I'll go ahead and do that ahead of this patch.

GBuella updated this revision to Diff 138046.Mar 12 2018, 10:06 AM
GBuella marked 4 inline comments as done.
GBuella updated this revision to Diff 138318.Mar 14 2018, 3:47 AM
GBuella marked an inline comment as done.
GBuella added inline comments.
utils/TableGen/X86RecognizableInstr.cpp
681 ↗(On Diff #138010)

Thanks, I rebased it on top of your change.

GBuella updated this revision to Diff 143638.Apr 23 2018, 2:05 PM
GBuella marked an inline comment as done.

Rebased the patch.
Added pconfig to Icelake Server.

GBuella updated this revision to Diff 144111.Apr 26 2018, 7:14 AM
GBuella abandoned this revision.May 8 2018, 4:04 AM