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Differential D43243

X86 (16, 32): Fix for bug 27653 (swapped arguments in BOUND instruction)
ClosedPublic

Authored by maya.madhavan on Feb 13 2018, 9:15 AM.

Details

Reviewers
craig.topper
Commits
rG675752166de3: [X86] Don't swap argument on BOUND instruction in at&t syntax.
rL325178: [X86] Don't swap argument on BOUND instruction in at&t syntax.
Summary

The bound instruction does not have reversed operands.

"All intel opcodes have reversed operands except for "bound" and "enter". " - from GAS, tc-i386.c

Diff Detail

Event Timeline

maya.madhavan created this revision.Feb 13 2018, 9:15 AM
Herald added a subscriber: llvm-commits. · View Herald TranscriptFeb 13 2018, 9:15 AM
craig.topper accepted this revision.Feb 13 2018, 9:18 AM

LGTM

This revision is now accepted and ready to land.Feb 13 2018, 9:18 AM
maya.madhavan added a comment.Feb 13 2018, 2:30 PM

I do not have permission to commit the change. Could someone please commit the change for me?

craig.topper added a comment.Feb 14 2018, 1:33 PM

I'll commit this.

Closed by commit rL325178: [X86] Don't swap argument on BOUND instruction in at&t syntax. (authored by ctopper). · Explain WhyFeb 14 2018, 1:57 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
X86/
5 lines
test/
MC/
X86/
8 lines
8 lines

Diff 134054

lib/Target/X86/X86InstrInfo.td

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// Decimal Adjust AL after Subtraction // Decimal Adjust AL after Subtraction
let Uses = [AL,EFLAGS], Defs = [AL,EFLAGS], hasSideEffects = 0 in let Uses = [AL,EFLAGS], Defs = [AL,EFLAGS], hasSideEffects = 0 in
def DAS : I<0x2F, RawFrm, (outs), (ins), "das", [], IIC_DAS>, def DAS : I<0x2F, RawFrm, (outs), (ins), "das", [], IIC_DAS>,
Requires<[Not64BitMode]>; Requires<[Not64BitMode]>;
} // SchedRW } // SchedRW
let SchedRW = [WriteSystem] in { let SchedRW = [WriteSystem] in {
// Check Array Index Against Bounds // Check Array Index Against Bounds
// Note: "bound" does not have reversed operands unlike most Intel instructions
def BOUNDS16rm : I<0x62, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src), def BOUNDS16rm : I<0x62, MRMSrcMem, (outs GR16:$dst), (ins i16mem:$src),
"bound\t{$src, $dst|$dst, $src}", [], IIC_BOUND>, OpSize16, "bound\t$dst, $src", [], IIC_BOUND>, OpSize16,
Requires<[Not64BitMode]>; Requires<[Not64BitMode]>;
def BOUNDS32rm : I<0x62, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src), def BOUNDS32rm : I<0x62, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$src),
"bound\t{$src, $dst|$dst, $src}", [], IIC_BOUND>, OpSize32, "bound\t$dst, $src", [], IIC_BOUND>, OpSize32,
Requires<[Not64BitMode]>; Requires<[Not64BitMode]>;
// Adjust RPL Field of Segment Selector // Adjust RPL Field of Segment Selector
def ARPL16rr : I<0x63, MRMDestReg, (outs GR16:$dst), (ins GR16:$src), def ARPL16rr : I<0x63, MRMDestReg, (outs GR16:$dst), (ins GR16:$src),
"arpl\t{$src, $dst|$dst, $src}", [], IIC_ARPL_REG>, "arpl\t{$src, $dst|$dst, $src}", [], IIC_ARPL_REG>,
Requires<[Not64BitMode]>; Requires<[Not64BitMode]>;
let mayStore = 1 in let mayStore = 1 in
def ARPL16mr : I<0x63, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), def ARPL16mr : I<0x63, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src),
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test/MC/X86/x86-16.s

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// CHECK: retl $31438 // CHECK: retl $31438
// CHECK: encoding: [0x66,0xc2,0xce,0x7a] // CHECK: encoding: [0x66,0xc2,0xce,0x7a]
retl $0x7ace retl $0x7ace
// CHECK: lretl $31438 // CHECK: lretl $31438
// CHECK: encoding: [0x66,0xca,0xce,0x7a] // CHECK: encoding: [0x66,0xca,0xce,0x7a]
lretl $0x7ace lretl $0x7ace
// CHECK: bound 2(%eax), %bx // CHECK: bound %bx, 2(%eax)
// CHECK: encoding: [0x67,0x62,0x58,0x02] // CHECK: encoding: [0x67,0x62,0x58,0x02]
bound 2(%eax),%bx bound %bx,2(%eax)
// CHECK: bound 4(%ebx), %ecx // CHECK: bound %ecx, 4(%ebx)
// CHECK: encoding: [0x67,0x66,0x62,0x4b,0x04] // CHECK: encoding: [0x67,0x66,0x62,0x4b,0x04]
bound 4(%ebx),%ecx bound %ecx,4(%ebx)
// CHECK: arpl %bx, %bx // CHECK: arpl %bx, %bx
// CHECK: encoding: [0x63,0xdb] // CHECK: encoding: [0x63,0xdb]
arpl %bx,%bx arpl %bx,%bx
// CHECK: arpl %bx, 6(%ecx) // CHECK: arpl %bx, 6(%ecx)
// CHECK: encoding: [0x67,0x63,0x59,0x06] // CHECK: encoding: [0x67,0x63,0x59,0x06]
arpl %bx,6(%ecx) arpl %bx,6(%ecx)
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test/MC/X86/x86-32.s

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// CHECK: retw $31438 // CHECK: retw $31438
// CHECK: encoding: [0x66,0xc2,0xce,0x7a] // CHECK: encoding: [0x66,0xc2,0xce,0x7a]
retw $0x7ace retw $0x7ace
// CHECK: lretw $31438 // CHECK: lretw $31438
// CHECK: encoding: [0x66,0xca,0xce,0x7a] // CHECK: encoding: [0x66,0xca,0xce,0x7a]
lretw $0x7ace lretw $0x7ace
// CHECK: bound 2(%eax), %bx // CHECK: bound %bx, 2(%eax)
// CHECK: encoding: [0x66,0x62,0x58,0x02] // CHECK: encoding: [0x66,0x62,0x58,0x02]
bound 2(%eax),%bx bound %bx,2(%eax)
// CHECK: bound 4(%ebx), %ecx // CHECK: bound %ecx, 4(%ebx)
// CHECK: encoding: [0x62,0x4b,0x04] // CHECK: encoding: [0x62,0x4b,0x04]
bound 4(%ebx),%ecx bound %ecx,4(%ebx)
// CHECK: arpl %bx, %bx // CHECK: arpl %bx, %bx
// CHECK: encoding: [0x63,0xdb] // CHECK: encoding: [0x63,0xdb]
arpl %bx,%bx arpl %bx,%bx
// CHECK: arpl %bx, 6(%ecx) // CHECK: arpl %bx, 6(%ecx)
// CHECK: encoding: [0x63,0x59,0x06] // CHECK: encoding: [0x63,0x59,0x06]
arpl %bx,6(%ecx) arpl %bx,6(%ecx)
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