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[X86] Make v2i1 and v4i1 legal types without VLX

Authored by craig.topper on Dec 24 2017, 1:01 AM.



There are few oddities that occur due to v1i1, v8i1, v16i1 being legal without v2i1 and v4i1 being legal when we don't have VLX. Particularly during legalization of v2i32/v4i32/v2i64/v4i64 masked gather/scatter/load/store. We end up promoting the mask argument to these during type legalization and then have to widen the promoted type to v8iX/v16iX and truncate it to get the element size back down to v8i1/v16i1 to use a 512-bit operation. Since need to fill the upper bits of the mask we have to fill with 0s at the promoted type.

It would be better if we could just have the v2i1/v4i1 types as legal so they don't undergo any promotion. Then we can just widen with 0s directly in a k register. There are no real v4i1/v2i1 instructions anyway. Everything is done on a larger register anyway.

This also fixes an issue that we couldn't implement a masked vextractf32x4 from zmm to xmm properly.

We now have to support widening more compares to 512-bit to get a mask result out so new tablegen patterns got added.

I had to hack the legalizer for widening the operand of a setcc a bit so it didn't try create a setcc returning v4i32, extract from it, then try to promote it using a sign extend to v2i1. Now we create the setcc with v4i1 if the original setcc's result type is v2i1. Then extract that and don't sign extend it at all.

There's definitely room for improvement with some follow up patches.

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Event Timeline

craig.topper created this revision.Dec 24 2017, 1:01 AM

There are some nasty regressions here, better to hold off until after the 6.00 branch?

1165 ↗(On Diff #128101)

Update comment. Possibly worth putting all these into a for-range loop?

Rebase after other recent changes. Address Simon's comment.

Fixes to not sign extend condition of selects without VLX. Use 512-bit selects instead.

RKSimon added inline comments.Jan 1 2018, 3:09 PM
3634 ↗(On Diff #128378)

Replace other uses of N->getValueType(0) with VT.

Address Simon's comment

RKSimon accepted this revision.Jan 7 2018, 5:45 AM

LGTM - as a possible followup to avoid the vpxor/vpcmpgt it looks like we need patterns for the vpmov*2m equivalent of vblendv* sign bit selection tests in vselect-pcmp.ll

This revision is now accepted and ready to land.Jan 7 2018, 5:45 AM
This revision was automatically updated to reflect the committed changes.