Port SCEVAffinator to the isl c++ bindings

[philip.pfaffe]

Summary

Straight forward port of SCEVAffinator

[Meinersbur]

After removing the isl memory annotations: LGTM.

include/polly/Support/SCEVAffinator.h

50 ↗

(On Diff #125408)

Please remove isl memory annotations.

86 ↗

(On Diff #125408)

You can remove __isl_take.

94–95 ↗

(On Diff #125408)

Please remove isl memory annotations.

lib/Support/SCEVAffinator.cpp

53–62 ↗

(On Diff #125408)

nice

66–67 ↗

(On Diff #125408)

Thanks making the API simpler.

115 ↗

(On Diff #125408)

Please remove isl memory annotations.

242 ↗

(On Diff #125408)

Please remove isl memory annotations.

264 ↗

(On Diff #125408)

Please remove isl memory annotations.

379 ↗

(On Diff #125408)

Please remove isl memory annotations.

442 ↗

(On Diff #125408)

Please remove isl memory annotations.

446 ↗

(On Diff #125408)

Please remove isl memory annotations.

484 ↗

(On Diff #125408)

Please remove isl memory annotations.

501 ↗

(On Diff #125408)

Please remove isl memory annotations.

518 ↗

(On Diff #125408)

Please remove isl memory annotations.

[philip.pfaffe]

Remove isl ownership markers

[grosser]

Nice!

polly/trunk/include/polly/Support/SCEVAffinator.h

 //===----------------------------------------------------------------------===//
 
 #ifndef POLLY_SCEV_AFFINATOR_H
 #define POLLY_SCEV_AFFINATOR_H
 
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/Analysis/ScalarEvolutionExpressions.h"
 
-#include "isl/ctx.h"
-
-struct isl_ctx;
-struct isl_map;
-struct isl_basic_map;
-struct isl_id;
-struct isl_set;
-struct isl_union_set;
-struct isl_union_map;
-struct isl_space;
-struct isl_ast_build;
-struct isl_constraint;
-struct isl_pw_aff;
-struct isl_schedule;
+#include "isl/isl-noexceptions.h"
 
 namespace llvm {
 class Region;
 class BasicBlock;
 class DataLayout;
 class ScalarEvolution;
 } // namespace llvm
 
 namespace polly {
 class Scop;
 class ScopStmt;
 
 /// The result type of the SCEVAffinator.
 ///
 /// The first element of the pair is the isl representation of the SCEV, the
 /// second is the domain under which it is __invalid__.
-typedef std::pair<isl_pw_aff *, isl_set *> PWACtx;
+typedef std::pair<isl::pw_aff, isl::set> PWACtx;
 
-/// Translate a SCEV to an isl_pw_aff and the domain on which it is invalid.
+/// Translate a SCEV to an isl::pw_aff and the domain on which it is invalid.
 struct SCEVAffinator : public llvm::SCEVVisitor<SCEVAffinator, PWACtx> {
 public:
   SCEVAffinator(Scop *S, llvm::LoopInfo &LI);
-  ~SCEVAffinator();
 
-  /// Translate a SCEV to an isl_pw_aff.
+  /// Translate a SCEV to an isl::pw_aff.
   ///
   /// @param E  he expression that is translated.
   /// @param BB The block in which @p E is executed.
   ///
   /// @returns The isl representation of the SCEV @p E in @p Domain.
-  __isl_give PWACtx getPwAff(const llvm::SCEV *E,
-                             llvm::BasicBlock *BB = nullptr);
+  PWACtx getPwAff(const llvm::SCEV *E, llvm::BasicBlock *BB = nullptr);
 
   /// Take the assumption that @p PWAC is non-negative.
   void takeNonNegativeAssumption(PWACtx &PWAC);
 
   /// Interpret the PWA in @p PWAC as an unsigned value.
-  void interpretAsUnsigned(__isl_keep PWACtx &PWAC, unsigned Width);
+  void interpretAsUnsigned(PWACtx &PWAC, unsigned Width);
 
   /// Check an <nsw> AddRec for the loop @p L is cached.
   bool hasNSWAddRecForLoop(llvm::Loop *L) const;
 
   /// Return the LoopInfo used by thi object.
   llvm::LoopInfo *getLI() const { return &LI; }
 
 private:
   /// Key to identify cached expressions.
   using CacheKey = std::pair<const llvm::SCEV *, llvm::BasicBlock *>;
 
   /// Map to remembered cached expressions.
   llvm::DenseMap<CacheKey, PWACtx> CachedExpressions;
 
   Scop *S;
-  isl_ctx *Ctx;
+  isl::ctx Ctx;
   unsigned NumIterators;
   llvm::ScalarEvolution &SE;
   llvm::LoopInfo &LI;
   llvm::BasicBlock *BB;
 
   /// Target data for element size computing.
   const llvm::DataLayout &TD;
 
   /// Return the loop for the current block if any.
   llvm::Loop *getScope();
 
   /// Return a PWACtx for @p PWA that is always valid.
-  __isl_give PWACtx getPWACtxFromPWA(__isl_take isl_pw_aff *PWA);
+  PWACtx getPWACtxFromPWA(isl::pw_aff PWA);
 
   /// Compute the non-wrapping version of @p PWA for type @p ExprType.
   ///
   /// @param PWA  The piece-wise affine function that might wrap.
   /// @param Type The type of the SCEV that was translated to @p PWA.
   ///
   /// @returns The expr @p PWA modulo the size constraints of @p ExprType.
-  __isl_give isl_pw_aff *addModuloSemantic(__isl_take isl_pw_aff *PWA,
-                                           llvm::Type *ExprType) const;
+  isl::pw_aff addModuloSemantic(isl::pw_aff PWA, llvm::Type *ExprType) const;
 
   /// If @p Expr might cause an integer wrap record an assumption.
   ///
   /// @param Expr The SCEV expression that might wrap.
   /// @param PWAC The isl representation of @p Expr with the invalid domain.
   ///
   /// @returns The isl representation @p PWAC with a possibly adjusted domain.
-  __isl_give PWACtx checkForWrapping(const llvm::SCEV *Expr, PWACtx PWAC) const;
+  PWACtx checkForWrapping(const llvm::SCEV *Expr, PWACtx PWAC) const;
 
   /// Whether to track the value of this expression precisely, rather than
   /// assuming it won't wrap.
   bool computeModuloForExpr(const llvm::SCEV *Expr);
 
-  __isl_give PWACtx visit(const llvm::SCEV *E);
-  __isl_give PWACtx visitConstant(const llvm::SCEVConstant *E);
-  __isl_give PWACtx visitTruncateExpr(const llvm::SCEVTruncateExpr *E);
-  __isl_give PWACtx visitZeroExtendExpr(const llvm::SCEVZeroExtendExpr *E);
-  __isl_give PWACtx visitSignExtendExpr(const llvm::SCEVSignExtendExpr *E);
-  __isl_give PWACtx visitAddExpr(const llvm::SCEVAddExpr *E);
-  __isl_give PWACtx visitMulExpr(const llvm::SCEVMulExpr *E);
-  __isl_give PWACtx visitUDivExpr(const llvm::SCEVUDivExpr *E);
-  __isl_give PWACtx visitAddRecExpr(const llvm::SCEVAddRecExpr *E);
-  __isl_give PWACtx visitSMaxExpr(const llvm::SCEVSMaxExpr *E);
-  __isl_give PWACtx visitUMaxExpr(const llvm::SCEVUMaxExpr *E);
-  __isl_give PWACtx visitUnknown(const llvm::SCEVUnknown *E);
-  __isl_give PWACtx visitSDivInstruction(llvm::Instruction *SDiv);
-  __isl_give PWACtx visitSRemInstruction(llvm::Instruction *SRem);
+  PWACtx visit(const llvm::SCEV *E);
+  PWACtx visitConstant(const llvm::SCEVConstant *E);
+  PWACtx visitTruncateExpr(const llvm::SCEVTruncateExpr *E);
+  PWACtx visitZeroExtendExpr(const llvm::SCEVZeroExtendExpr *E);
+  PWACtx visitSignExtendExpr(const llvm::SCEVSignExtendExpr *E);
+  PWACtx visitAddExpr(const llvm::SCEVAddExpr *E);
+  PWACtx visitMulExpr(const llvm::SCEVMulExpr *E);
+  PWACtx visitUDivExpr(const llvm::SCEVUDivExpr *E);
+  PWACtx visitAddRecExpr(const llvm::SCEVAddRecExpr *E);
+  PWACtx visitSMaxExpr(const llvm::SCEVSMaxExpr *E);
+  PWACtx visitUMaxExpr(const llvm::SCEVUMaxExpr *E);
+  PWACtx visitUnknown(const llvm::SCEVUnknown *E);
+  PWACtx visitSDivInstruction(llvm::Instruction *SDiv);
+  PWACtx visitSRemInstruction(llvm::Instruction *SRem);
 
   friend struct llvm::SCEVVisitor<SCEVAffinator, PWACtx>;
 };
 } // namespace polly
 
 #endif

polly/trunk/lib/Analysis/ScopInfo.cpp

 LLVM_DUMP_METHOD void MemoryAccess::dump() const { print(errs()); }
 #endif
 
 isl::pw_aff MemoryAccess::getPwAff(const SCEV *E) {
   auto *Stmt = getStatement();
   PWACtx PWAC = Stmt->getParent()->getPwAff(E, Stmt->getEntryBlock());
   isl::set StmtDom = getStatement()->getDomain();
   StmtDom = StmtDom.reset_tuple_id();
-  isl::set NewInvalidDom = StmtDom.intersect(isl::manage(PWAC.second));
+  isl::set NewInvalidDom = StmtDom.intersect(PWAC.second);
   InvalidDomain = InvalidDomain.unite(NewInvalidDom);
-  return isl::manage(PWAC.first);
+  return PWAC.first;
 }
 
 // Create a map in the size of the provided set domain, that maps from the
 // one element of the provided set domain to another element of the provided
 // set domain.
 // The mapping is limited to all points that are equal in all but the last
 // dimension and for which the last dimension of the input is strict smaller
 // than the last dimension of the output.

 ///
 /// Note that this function will also adjust the invalid context accordingly.
 
 __isl_give isl_pw_aff *
 getPwAff(Scop &S, BasicBlock *BB,
          DenseMap<BasicBlock *, isl::set> &InvalidDomainMap, const SCEV *E,
          bool NonNegative = false) {
   PWACtx PWAC = S.getPwAff(E, BB, NonNegative);
-  InvalidDomainMap[BB] = InvalidDomainMap[BB].unite(isl::manage(PWAC.second));
-  return PWAC.first;
+  InvalidDomainMap[BB] = InvalidDomainMap[BB].unite(PWAC.second);
+  return PWAC.first.take();
 }
 
 /// Build the conditions sets for the switch @p SI in the @p Domain.
 ///
 /// This will fill @p ConditionSets with the conditions under which control
 /// will be moved from @p SI to its successors. Hence, @p ConditionSets will
 /// have as many elements as @p SI has successors.
 bool buildConditionSets(Scop &S, BasicBlock *BB, SwitchInst *SI, Loop *L,
isl::union_set Scop::getDomains() const {
   for (const ScopStmt &Stmt : *this)
     Domain = isl_union_set_add_set(Domain, Stmt.getDomain().release());
 
   return isl::manage(Domain);
 }
 
 isl::pw_aff Scop::getPwAffOnly(const SCEV *E, BasicBlock *BB) {
   PWACtx PWAC = getPwAff(E, BB);
-  isl_set_free(PWAC.second);
-  return isl::manage(PWAC.first);
+  return PWAC.first;
 }
 
 isl::union_map
 Scop::getAccessesOfType(std::function<bool(MemoryAccess &)> Predicate) {
   isl::union_map Accesses = isl::union_map::empty(getParamSpace());
 
   for (ScopStmt &Stmt : *this) {
     for (MemoryAccess *MA : Stmt) {

polly/trunk/lib/Support/SCEVAffinator.cpp

static isl_stat addNumBasicSets(__isl_take isl_set *Domain,
                                 __isl_take isl_aff *Aff, void *User) {
   auto *NumBasicSets = static_cast<unsigned *>(User);
   *NumBasicSets += isl_set_n_basic_set(Domain);
   isl_set_free(Domain);
   isl_aff_free(Aff);
   return isl_stat_ok;
 }
 
-/// Helper to free a PWACtx object.
-static void freePWACtx(__isl_take PWACtx &PWAC) {
-  isl_pw_aff_free(PWAC.first);
-  isl_set_free(PWAC.second);
-}
-
-/// Helper to copy a PWACtx object.
-static __isl_give PWACtx copyPWACtx(const __isl_keep PWACtx &PWAC) {
-  return std::make_pair(isl_pw_aff_copy(PWAC.first), isl_set_copy(PWAC.second));
-}
-
 /// Determine if @p PWAC is too complex to continue.
-///
-/// Note that @p PWAC will be "free" (deallocated) if this function returns
-/// true, but not if this function returns false.
-static bool isTooComplex(PWACtx &PWAC) {
+static bool isTooComplex(PWACtx PWAC) {
   unsigned NumBasicSets = 0;
-  isl_pw_aff_foreach_piece(PWAC.first, addNumBasicSets, &NumBasicSets);
+  isl_pw_aff_foreach_piece(PWAC.first.keep(), addNumBasicSets, &NumBasicSets);
   if (NumBasicSets <= MaxDisjunctionsInPwAff)
     return false;
-  freePWACtx(PWAC);
   return true;
 }
 
 /// Return the flag describing the possible wrapping of @p Expr.
 static SCEV::NoWrapFlags getNoWrapFlags(const SCEV *Expr) {
   if (auto *NAry = dyn_cast<SCEVNAryExpr>(Expr))
     return NAry->getNoWrapFlags();
   return SCEV::NoWrapMask;
 }
 
-static void combine(__isl_keep PWACtx &PWAC0, const __isl_take PWACtx &PWAC1,
-                    isl_pw_aff *(Fn)(isl_pw_aff *, isl_pw_aff *)) {
-  PWAC0.first = Fn(PWAC0.first, PWAC1.first);
-  PWAC0.second = isl_set_union(PWAC0.second, PWAC1.second);
+static PWACtx combine(PWACtx PWAC0, PWACtx PWAC1,
+                      __isl_give isl_pw_aff *(Fn)(__isl_take isl_pw_aff *,
+                                                  __isl_take isl_pw_aff *)) {
+  PWAC0.first = isl::manage(Fn(PWAC0.first.take(), PWAC1.first.take()));
+  PWAC0.second = PWAC0.second.unite(PWAC1.second);
+  return PWAC0;
 }
 
 static __isl_give isl_pw_aff *getWidthExpValOnDomain(unsigned Width,
                                                      __isl_take isl_set *Dom) {
   auto *Ctx = isl_set_get_ctx(Dom);
   auto *WidthVal = isl_val_int_from_ui(Ctx, Width);
   auto *ExpVal = isl_val_2exp(WidthVal);
   return isl_pw_aff_val_on_domain(Dom, ExpVal);
 }
 
 SCEVAffinator::SCEVAffinator(Scop *S, LoopInfo &LI)
     : S(S), Ctx(S->getIslCtx().get()), SE(*S->getSE()), LI(LI),
       TD(S->getFunction().getParent()->getDataLayout()) {}
 
-SCEVAffinator::~SCEVAffinator() {
-  for (auto &CachedPair : CachedExpressions)
-    freePWACtx(CachedPair.second);
-}
-
 Loop *SCEVAffinator::getScope() { return BB ? LI.getLoopFor(BB) : nullptr; }
 
-void SCEVAffinator::interpretAsUnsigned(__isl_keep PWACtx &PWAC,
-                                        unsigned Width) {
-  auto *PWA = PWAC.first;
-  auto *NonNegDom = isl_pw_aff_nonneg_set(isl_pw_aff_copy(PWA));
-  auto *NonNegPWA = isl_pw_aff_intersect_domain(isl_pw_aff_copy(PWA),
-                                                isl_set_copy(NonNegDom));
+void SCEVAffinator::interpretAsUnsigned(PWACtx &PWAC, unsigned Width) {
+  auto *NonNegDom = isl_pw_aff_nonneg_set(PWAC.first.copy());
+  auto *NonNegPWA =
+      isl_pw_aff_intersect_domain(PWAC.first.copy(), isl_set_copy(NonNegDom));
   auto *ExpPWA = getWidthExpValOnDomain(Width, isl_set_complement(NonNegDom));
-  PWAC.first = isl_pw_aff_union_add(NonNegPWA, isl_pw_aff_add(PWA, ExpPWA));
+  PWAC.first = isl::manage(isl_pw_aff_union_add(
+      NonNegPWA, isl_pw_aff_add(PWAC.first.take(), ExpPWA)));
 }
 
 void SCEVAffinator::takeNonNegativeAssumption(PWACtx &PWAC) {
-  auto *NegPWA = isl_pw_aff_neg(isl_pw_aff_copy(PWAC.first));
+  auto *NegPWA = isl_pw_aff_neg(PWAC.first.copy());
   auto *NegDom = isl_pw_aff_pos_set(NegPWA);
-  PWAC.second = isl_set_union(PWAC.second, isl_set_copy(NegDom));
+  PWAC.second =
+      isl::manage(isl_set_union(PWAC.second.take(), isl_set_copy(NegDom)));
   auto *Restriction = BB ? NegDom : isl_set_params(NegDom);
   auto DL = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc();
   S->recordAssumption(UNSIGNED, isl::manage(Restriction), DL, AS_RESTRICTION,
                       BB);
 }
 
-__isl_give PWACtx SCEVAffinator::getPWACtxFromPWA(__isl_take isl_pw_aff *PWA) {
-  return std::make_pair(
-      PWA, isl_set_empty(isl_space_set_alloc(Ctx, 0, NumIterators)));
+PWACtx SCEVAffinator::getPWACtxFromPWA(isl::pw_aff PWA) {
+  return std::make_pair(PWA, isl::set::empty(isl::space(Ctx, 0, NumIterators)));
 }
 
-__isl_give PWACtx SCEVAffinator::getPwAff(const SCEV *Expr, BasicBlock *BB) {
+PWACtx SCEVAffinator::getPwAff(const SCEV *Expr, BasicBlock *BB) {
   this->BB = BB;
 
   if (BB) {
     auto *DC = S->getDomainConditions(BB).release();
     NumIterators = isl_set_n_dim(DC);
     isl_set_free(DC);
   } else
     NumIterators = 0;
 
   return visit(Expr);
 }
 
-__isl_give PWACtx SCEVAffinator::checkForWrapping(const SCEV *Expr,
-                                                  PWACtx PWAC) const {
+PWACtx SCEVAffinator::checkForWrapping(const SCEV *Expr, PWACtx PWAC) const {
   // If the SCEV flags do contain NSW (no signed wrap) then PWA already
   // represents Expr in modulo semantic (it is not allowed to overflow), thus we
   // are done. Otherwise, we will compute:
   //   PWA = ((PWA + 2^(n-1)) mod (2 ^ n)) - 2^(n-1)
   // whereas n is the number of bits of the Expr, hence:
   //   n = bitwidth(ExprType)
 
   if (IgnoreIntegerWrapping || (getNoWrapFlags(Expr) & SCEV::FlagNSW))
     return PWAC;
 
-  auto *PWA = PWAC.first;
-  auto *PWAMod = addModuloSemantic(isl_pw_aff_copy(PWA), Expr->getType());
-  auto *NotEqualSet = isl_pw_aff_ne_set(isl_pw_aff_copy(PWA), PWAMod);
-  PWAC.second = isl_set_union(PWAC.second, isl_set_copy(NotEqualSet));
-  PWAC.second = isl_set_coalesce(PWAC.second);
+  isl::pw_aff PWAMod = addModuloSemantic(PWAC.first, Expr->getType());
+
+  isl::set NotEqualSet = PWAC.first.ne_set(PWAMod);
+  PWAC.second = PWAC.second.unite(NotEqualSet).coalesce();
 
   const DebugLoc &Loc = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc();
-  NotEqualSet = BB ? NotEqualSet : isl_set_params(NotEqualSet);
-  NotEqualSet = isl_set_coalesce(NotEqualSet);
+  if (!BB)
+    NotEqualSet = NotEqualSet.params();
+  NotEqualSet = NotEqualSet.coalesce();
 
-  if (isl_set_is_empty(NotEqualSet))
-    isl_set_free(NotEqualSet);
-  else
-    S->recordAssumption(WRAPPING, isl::manage(NotEqualSet), Loc, AS_RESTRICTION,
-                        BB);
+  if (!NotEqualSet.is_empty())
+    S->recordAssumption(WRAPPING, NotEqualSet, Loc, AS_RESTRICTION, BB);
 
   return PWAC;
 }
 
-__isl_give isl_pw_aff *
-SCEVAffinator::addModuloSemantic(__isl_take isl_pw_aff *PWA,
+isl::pw_aff SCEVAffinator::addModuloSemantic(isl::pw_aff PWA,
                                              Type *ExprType) const {
   unsigned Width = TD.getTypeSizeInBits(ExprType);
-  isl_ctx *Ctx = isl_pw_aff_get_ctx(PWA);
 
-  isl_val *ModVal = isl_val_int_from_ui(Ctx, Width);
-  ModVal = isl_val_2exp(ModVal);
+  auto ModVal = isl::val::int_from_ui(Ctx, Width);
+  ModVal = ModVal.two_exp();
 
-  isl_set *Domain = isl_pw_aff_domain(isl_pw_aff_copy(PWA));
-  isl_pw_aff *AddPW = getWidthExpValOnDomain(Width - 1, Domain);
-
-  PWA = isl_pw_aff_add(PWA, isl_pw_aff_copy(AddPW));
-  PWA = isl_pw_aff_mod_val(PWA, ModVal);
-  PWA = isl_pw_aff_sub(PWA, AddPW);
-
-  return PWA;
+  isl::set Domain = PWA.domain();
+  isl::pw_aff AddPW =
+      isl::manage(getWidthExpValOnDomain(Width - 1, Domain.take()));
+  return PWA.add(AddPW).mod(ModVal).sub(AddPW);
 }
 
 bool SCEVAffinator::hasNSWAddRecForLoop(Loop *L) const {
   for (const auto &CachedPair : CachedExpressions) {
     auto *AddRec = dyn_cast<SCEVAddRecExpr>(CachedPair.first.first);
     if (!AddRec)
       continue;
     if (AddRec->getLoop() != L)
bool SCEVAffinator::computeModuloForExpr(const SCEV *Expr) {
   unsigned Width = TD.getTypeSizeInBits(Expr->getType());
   // We assume nsw expressions never overflow.
   if (auto *NAry = dyn_cast<SCEVNAryExpr>(Expr))
     if (NAry->getNoWrapFlags() & SCEV::FlagNSW)
       return false;
   return Width <= MaxSmallBitWidth;
 }
 
-__isl_give PWACtx SCEVAffinator::visit(const SCEV *Expr) {
+PWACtx SCEVAffinator::visit(const SCEV *Expr) {
 
   auto Key = std::make_pair(Expr, BB);
   PWACtx PWAC = CachedExpressions[Key];
   if (PWAC.first)
-    return copyPWACtx(PWAC);
+    return PWAC;
 
   auto ConstantAndLeftOverPair = extractConstantFactor(Expr, SE);
   auto *Factor = ConstantAndLeftOverPair.first;
   Expr = ConstantAndLeftOverPair.second;
 
   auto *Scope = getScope();
   S->addParams(getParamsInAffineExpr(&S->getRegion(), Scope, Expr, SE));
 
   // In case the scev is a valid parameter, we do not further analyze this
   // expression, but create a new parameter in the isl_pw_aff. This allows us
   // to treat subexpressions that we cannot translate into an piecewise affine
   // expression, as constant parameters of the piecewise affine expression.
   if (isl_id *Id = S->getIdForParam(Expr).release()) {
-    isl_space *Space = isl_space_set_alloc(Ctx, 1, NumIterators);
+    isl_space *Space = isl_space_set_alloc(Ctx.get(), 1, NumIterators);
     Space = isl_space_set_dim_id(Space, isl_dim_param, 0, Id);
 
     isl_set *Domain = isl_set_universe(isl_space_copy(Space));
     isl_aff *Affine = isl_aff_zero_on_domain(isl_local_space_from_space(Space));
     Affine = isl_aff_add_coefficient_si(Affine, isl_dim_param, 0, 1);
 
-    PWAC = getPWACtxFromPWA(isl_pw_aff_alloc(Domain, Affine));
+    PWAC = getPWACtxFromPWA(isl::manage(isl_pw_aff_alloc(Domain, Affine)));
   } else {
     PWAC = SCEVVisitor<SCEVAffinator, PWACtx>::visit(Expr);
     if (computeModuloForExpr(Expr))
       PWAC.first = addModuloSemantic(PWAC.first, Expr->getType());
     else
       PWAC = checkForWrapping(Expr, PWAC);
   }
 
   if (!Factor->getType()->isIntegerTy(1)) {
-    combine(PWAC, visitConstant(Factor), isl_pw_aff_mul);
+    PWAC = combine(PWAC, visitConstant(Factor), isl_pw_aff_mul);
     if (computeModuloForExpr(Key.first))
       PWAC.first = addModuloSemantic(PWAC.first, Expr->getType());
   }
 
   // For compile time reasons we need to simplify the PWAC before we cache and
   // return it.
-  PWAC.first = isl_pw_aff_coalesce(PWAC.first);
+  PWAC.first = PWAC.first.coalesce();
   if (!computeModuloForExpr(Key.first))
     PWAC = checkForWrapping(Key.first, PWAC);
 
-  CachedExpressions[Key] = copyPWACtx(PWAC);
+  CachedExpressions[Key] = PWAC;
   return PWAC;
 }
 
-__isl_give PWACtx SCEVAffinator::visitConstant(const SCEVConstant *Expr) {
+PWACtx SCEVAffinator::visitConstant(const SCEVConstant *Expr) {
   ConstantInt *Value = Expr->getValue();
   isl_val *v;
 
   // LLVM does not define if an integer value is interpreted as a signed or
   // unsigned value. Hence, without further information, it is unknown how
   // this value needs to be converted to GMP. At the moment, we only support
   // signed operations. So we just interpret it as signed. Later, there are
   // two options:
   //
   // 1. We always interpret any value as signed and convert the values on
   //    demand.
   // 2. We pass down the signedness of the calculation and use it to interpret
   //    this constant correctly.
-  v = isl_valFromAPInt(Ctx, Value->getValue(), /* isSigned */ true);
+  v = isl_valFromAPInt(Ctx.get(), Value->getValue(), /* isSigned */ true);
 
-  isl_space *Space = isl_space_set_alloc(Ctx, 0, NumIterators);
+  isl_space *Space = isl_space_set_alloc(Ctx.get(), 0, NumIterators);
   isl_local_space *ls = isl_local_space_from_space(Space);
-  return getPWACtxFromPWA(isl_pw_aff_from_aff(isl_aff_val_on_domain(ls, v)));
+  return getPWACtxFromPWA(
+      isl::manage(isl_pw_aff_from_aff(isl_aff_val_on_domain(ls, v))));
 }
 
-__isl_give PWACtx
+PWACtx
 SCEVAffinator::visitTruncateExpr(const SCEVTruncateExpr *Expr) {
   // Truncate operations are basically modulo operations, thus we can
   // model them that way. However, for large types we assume the operand
   // to fit in the new type size instead of introducing a modulo with a very
   // large constant.
 
   auto *Op = Expr->getOperand();
   auto OpPWAC = visit(Op);
 
   unsigned Width = TD.getTypeSizeInBits(Expr->getType());
 
   if (computeModuloForExpr(Expr))
     return OpPWAC;
 
-  auto *Dom = isl_pw_aff_domain(isl_pw_aff_copy(OpPWAC.first));
+  auto *Dom = OpPWAC.first.domain().take();
   auto *ExpPWA = getWidthExpValOnDomain(Width - 1, Dom);
   auto *GreaterDom =
-      isl_pw_aff_ge_set(isl_pw_aff_copy(OpPWAC.first), isl_pw_aff_copy(ExpPWA));
+      isl_pw_aff_ge_set(OpPWAC.first.copy(), isl_pw_aff_copy(ExpPWA));
   auto *SmallerDom =
-      isl_pw_aff_lt_set(isl_pw_aff_copy(OpPWAC.first), isl_pw_aff_neg(ExpPWA));
+      isl_pw_aff_lt_set(OpPWAC.first.copy(), isl_pw_aff_neg(ExpPWA));
   auto *OutOfBoundsDom = isl_set_union(SmallerDom, GreaterDom);
-  OpPWAC.second = isl_set_union(OpPWAC.second, isl_set_copy(OutOfBoundsDom));
+  OpPWAC.second =
+      OpPWAC.second.unite(isl::manage(isl_set_copy(OutOfBoundsDom)));
 
   if (!BB) {
     assert(isl_set_dim(OutOfBoundsDom, isl_dim_set) == 0 &&
            "Expected a zero dimensional set for non-basic-block domains");
     OutOfBoundsDom = isl_set_params(OutOfBoundsDom);
   }
 
   S->recordAssumption(UNSIGNED, isl::manage(OutOfBoundsDom), DebugLoc(),
                       AS_RESTRICTION, BB);
 
   return OpPWAC;
 }
 
-__isl_give PWACtx
+PWACtx
 SCEVAffinator::visitZeroExtendExpr(const SCEVZeroExtendExpr *Expr) {
   // A zero-extended value can be interpreted as a piecewise defined signed
   // value. If the value was non-negative it stays the same, otherwise it
   // is the sum of the original value and 2^n where n is the bit-width of
   // the original (or operand) type. Examples:
   //   zext i8 127 to i32 -> { [127] }
   //   zext i8  -1 to i32 -> { [256 + (-1)] } = { [255] }
   //   zext i8  %v to i32 -> [v] -> { [v] | v >= 0; [256 + v] | v < 0 }
SCEVAffinator::visitZeroExtendExpr(const SCEVZeroExtendExpr *Expr) {
 
   // If the width is small build the piece for the non-negative part and
   // the one for the negative part and unify them.
   unsigned Width = TD.getTypeSizeInBits(Op->getType());
   interpretAsUnsigned(OpPWAC, Width);
   return OpPWAC;
 }
 
-__isl_give PWACtx
-SCEVAffinator::visitSignExtendExpr(const SCEVSignExtendExpr *Expr) {
+PWACtx SCEVAffinator::visitSignExtendExpr(const SCEVSignExtendExpr *Expr) {
   // As all values are represented as signed, a sign extension is a noop.
   return visit(Expr->getOperand());
 }
 
-__isl_give PWACtx SCEVAffinator::visitAddExpr(const SCEVAddExpr *Expr) {
+PWACtx SCEVAffinator::visitAddExpr(const SCEVAddExpr *Expr) {
   PWACtx Sum = visit(Expr->getOperand(0));
 
   for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) {
-    combine(Sum, visit(Expr->getOperand(i)), isl_pw_aff_add);
+    Sum = combine(Sum, visit(Expr->getOperand(i)), isl_pw_aff_add);
     if (isTooComplex(Sum))
       return std::make_pair(nullptr, nullptr);
   }
 
   return Sum;
 }
 
-__isl_give PWACtx SCEVAffinator::visitMulExpr(const SCEVMulExpr *Expr) {
+PWACtx SCEVAffinator::visitMulExpr(const SCEVMulExpr *Expr) {
   PWACtx Prod = visit(Expr->getOperand(0));
 
   for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) {
-    combine(Prod, visit(Expr->getOperand(i)), isl_pw_aff_mul);
+    Prod = combine(Prod, visit(Expr->getOperand(i)), isl_pw_aff_mul);
     if (isTooComplex(Prod))
       return std::make_pair(nullptr, nullptr);
   }
 
   return Prod;
 }
 
-__isl_give PWACtx SCEVAffinator::visitAddRecExpr(const SCEVAddRecExpr *Expr) {
+PWACtx SCEVAffinator::visitAddRecExpr(const SCEVAddRecExpr *Expr) {
   assert(Expr->isAffine() && "Only affine AddRecurrences allowed");
 
   auto Flags = Expr->getNoWrapFlags();
 
   // Directly generate isl_pw_aff for Expr if 'start' is zero.
   if (Expr->getStart()->isZero()) {
     assert(S->contains(Expr->getLoop()) &&
            "Scop does not contain the loop referenced in this AddRec");
 
     PWACtx Step = visit(Expr->getOperand(1));
-    isl_space *Space = isl_space_set_alloc(Ctx, 0, NumIterators);
+    isl_space *Space = isl_space_set_alloc(Ctx.get(), 0, NumIterators);
     isl_local_space *LocalSpace = isl_local_space_from_space(Space);
 
     unsigned loopDimension = S->getRelativeLoopDepth(Expr->getLoop());
 
     isl_aff *LAff = isl_aff_set_coefficient_si(
         isl_aff_zero_on_domain(LocalSpace), isl_dim_in, loopDimension, 1);
     isl_pw_aff *LPwAff = isl_pw_aff_from_aff(LAff);
 
-    Step.first = isl_pw_aff_mul(Step.first, LPwAff);
+    Step.first = Step.first.mul(isl::manage(LPwAff));
     return Step;
   }
 
   // Translate AddRecExpr from '{start, +, inc}' into 'start + {0, +, inc}'
   // if 'start' is not zero.
   // TODO: Using the original SCEV no-wrap flags is not always safe, however
   //       as our code generation is reordering the expression anyway it doesn't
   //       really matter.
   const SCEV *ZeroStartExpr =
       SE.getAddRecExpr(SE.getConstant(Expr->getStart()->getType(), 0),
                        Expr->getStepRecurrence(SE), Expr->getLoop(), Flags);
 
   PWACtx Result = visit(ZeroStartExpr);
   PWACtx Start = visit(Expr->getStart());
-  combine(Result, Start, isl_pw_aff_add);
+  Result = combine(Result, Start, isl_pw_aff_add);
   return Result;
 }
 
-__isl_give PWACtx SCEVAffinator::visitSMaxExpr(const SCEVSMaxExpr *Expr) {
+PWACtx SCEVAffinator::visitSMaxExpr(const SCEVSMaxExpr *Expr) {
   PWACtx Max = visit(Expr->getOperand(0));
 
   for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) {
-    combine(Max, visit(Expr->getOperand(i)), isl_pw_aff_max);
+    Max = combine(Max, visit(Expr->getOperand(i)), isl_pw_aff_max);
     if (isTooComplex(Max))
       return std::make_pair(nullptr, nullptr);
   }
 
   return Max;
 }
 
-__isl_give PWACtx SCEVAffinator::visitUMaxExpr(const SCEVUMaxExpr *Expr) {
+PWACtx SCEVAffinator::visitUMaxExpr(const SCEVUMaxExpr *Expr) {
   llvm_unreachable("SCEVUMaxExpr not yet supported");
 }
 
-__isl_give PWACtx SCEVAffinator::visitUDivExpr(const SCEVUDivExpr *Expr) {
+PWACtx SCEVAffinator::visitUDivExpr(const SCEVUDivExpr *Expr) {
   // The handling of unsigned division is basically the same as for signed
   // division, except the interpretation of the operands. As the divisor
   // has to be constant in both cases we can simply interpret it as an
   // unsigned value without additional complexity in the representation.
   // For the dividend we could choose from the different representation
   // schemes introduced for zero-extend operations but for now we will
   // simply use an assumption.
   auto *Dividend = Expr->getLHS();
   auto *Divisor = Expr->getRHS();
   assert(isa<SCEVConstant>(Divisor) &&
          "UDiv is no parameter but has a non-constant RHS.");
 
   auto DividendPWAC = visit(Dividend);
   auto DivisorPWAC = visit(Divisor);
 
   if (SE.isKnownNegative(Divisor)) {
     // Interpret negative divisors unsigned. This is a special case of the
     // piece-wise defined value described for zero-extends as we already know
     // the actual value of the constant divisor.
     unsigned Width = TD.getTypeSizeInBits(Expr->getType());
-    auto *DivisorDom = isl_pw_aff_domain(isl_pw_aff_copy(DivisorPWAC.first));
+    auto *DivisorDom = DivisorPWAC.first.domain().take();
     auto *WidthExpPWA = getWidthExpValOnDomain(Width, DivisorDom);
-    DivisorPWAC.first = isl_pw_aff_add(DivisorPWAC.first, WidthExpPWA);
+    DivisorPWAC.first = DivisorPWAC.first.add(isl::manage(WidthExpPWA));
   }
 
   // TODO: One can represent the dividend as piece-wise function to be more
   //       precise but therefor a heuristic is needed.
 
   // Assume a non-negative dividend.
   takeNonNegativeAssumption(DividendPWAC);
 
-  combine(DividendPWAC, DivisorPWAC, isl_pw_aff_div);
-  DividendPWAC.first = isl_pw_aff_floor(DividendPWAC.first);
+  DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_div);
+  DividendPWAC.first = DividendPWAC.first.floor();
 
   return DividendPWAC;
 }
 
-__isl_give PWACtx SCEVAffinator::visitSDivInstruction(Instruction *SDiv) {
+PWACtx SCEVAffinator::visitSDivInstruction(Instruction *SDiv) {
   assert(SDiv->getOpcode() == Instruction::SDiv && "Assumed SDiv instruction!");
 
   auto *Scope = getScope();
   auto *Divisor = SDiv->getOperand(1);
   auto *DivisorSCEV = SE.getSCEVAtScope(Divisor, Scope);
   auto DivisorPWAC = visit(DivisorSCEV);
   assert(isa<SCEVConstant>(DivisorSCEV) &&
          "SDiv is no parameter but has a non-constant RHS.");
 
   auto *Dividend = SDiv->getOperand(0);
   auto *DividendSCEV = SE.getSCEVAtScope(Dividend, Scope);
   auto DividendPWAC = visit(DividendSCEV);
-  combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_q);
+  DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_q);
   return DividendPWAC;
 }
 
-__isl_give PWACtx SCEVAffinator::visitSRemInstruction(Instruction *SRem) {
+PWACtx SCEVAffinator::visitSRemInstruction(Instruction *SRem) {
   assert(SRem->getOpcode() == Instruction::SRem && "Assumed SRem instruction!");
 
   auto *Scope = getScope();
   auto *Divisor = SRem->getOperand(1);
   auto *DivisorSCEV = SE.getSCEVAtScope(Divisor, Scope);
   auto DivisorPWAC = visit(DivisorSCEV);
   assert(isa<ConstantInt>(Divisor) &&
          "SRem is no parameter but has a non-constant RHS.");
 
   auto *Dividend = SRem->getOperand(0);
   auto *DividendSCEV = SE.getSCEVAtScope(Dividend, Scope);
   auto DividendPWAC = visit(DividendSCEV);
-  combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_r);
+  DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_r);
   return DividendPWAC;
 }
 
-__isl_give PWACtx SCEVAffinator::visitUnknown(const SCEVUnknown *Expr) {
+PWACtx SCEVAffinator::visitUnknown(const SCEVUnknown *Expr) {
   if (Instruction *I = dyn_cast<Instruction>(Expr->getValue())) {
     switch (I->getOpcode()) {
     case Instruction::IntToPtr:
       return visit(SE.getSCEVAtScope(I->getOperand(0), getScope()));
     case Instruction::PtrToInt:
       return visit(SE.getSCEVAtScope(I->getOperand(0), getScope()));
     case Instruction::SDiv:
       return visitSDivInstruction(I);