[RISCV] Parse RISC-V eflags in ObjectYAML

[PkmX]

Summary

This depends on: D38310: [RISCV] Define RISC-V specific eflags

This is needed because lld testsuite uses yaml2obj/obj2yaml to assemble/disassemble ELF files (we can't use llvm-as/llvm-objdump as it is still far from complete).

[asb]

Thanks. Implementation wise this looks good. Could you please add a test along the lines of test/Object/Mips/elf-flags.yaml?

[asb]

Sorry, didn't mean to hit accept.

[PkmX]

Added RISC-V tests for ObjectYAML

[asb]

Are you able to add in an llvm-readobj test, just like the Mips elf-flags.yaml I referenced before?

[PkmX]

llvm-readobj would also need to be modified to recognize RISC-V eflags, and I think it is better to keep that in a separate commit.

[asb]

My mistake, I'd assumed incorrectly there was a little more code sharing going on here.

Looks good to me.

llvm/trunk/lib/ObjectYAML/ELFYAML.cpp

case ELF::EM_AVR:
     BCase(EF_AVR_ARCH_XMEGA1);
     BCase(EF_AVR_ARCH_XMEGA2);
     BCase(EF_AVR_ARCH_XMEGA3);
     BCase(EF_AVR_ARCH_XMEGA4);
     BCase(EF_AVR_ARCH_XMEGA5);
     BCase(EF_AVR_ARCH_XMEGA6);
     BCase(EF_AVR_ARCH_XMEGA7);
     break;
+  case ELF::EM_RISCV:
+    BCase(EF_RISCV_RVC);
+    BCaseMask(EF_RISCV_FLOAT_ABI_SOFT, EF_RISCV_FLOAT_ABI);
+    BCaseMask(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI);
+    BCaseMask(EF_RISCV_FLOAT_ABI_DOUBLE, EF_RISCV_FLOAT_ABI);
+    BCaseMask(EF_RISCV_FLOAT_ABI_QUAD, EF_RISCV_FLOAT_ABI);
+    BCase(EF_RISCV_RVE);
+    break;
   case ELF::EM_AMDGPU:
   case ELF::EM_X86_64:
     break;
   default:
     llvm_unreachable("Unsupported architecture");
   }
 #undef BCase
 #undef BCaseMask