[X86] Remove unnecessary extra encodings from the CPU name enum in clang

[craig.topper]

Summary

For a lot of older CPUs we have a 1:1 mapping between CPU name and enum name. But many of them are effectively aliases of each other and as a result are always repeated together at every usage

This patch removes most of the duplication. It also uses StringSwitch::Cases to make the many to one mapping in the StringSwitch more obvious.

[RKSimon]

LGTM

cfe/trunk/lib/Basic/Targets/X86.h

enum CPUKind {
 
     /// \name i686
     /// i686-generation processors, P6 / Pentium M microarchitecture based.
     //@{
     CK_i686,
     CK_PentiumPro,
     CK_Pentium2,
     CK_Pentium3,
-    CK_Pentium3M,
     CK_PentiumM,
     CK_C3_2,
 
     /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
     /// Clang however has some logic to support this.
     // FIXME: Warn, deprecate, and potentially remove this.
     CK_Yonah,
     //@}
 
     /// \name Netburst
     /// Netburst microarchitecture based processors.
     //@{
     CK_Pentium4,
-    CK_Pentium4M,
     CK_Prescott,
     CK_Nocona,
     //@}
 
     /// \name Core
     /// Core microarchitecture based processors.
     //@{
     CK_Core2,
enum CPUKind {
     CK_K6_2,
     CK_K6_3,
     //@}
 
     /// \name K7
     /// K7 architecture processors.
     //@{
     CK_Athlon,
-    CK_AthlonThunderbird,
-    CK_Athlon4,
     CK_AthlonXP,
-    CK_AthlonMP,
     //@}
 
     /// \name K8
     /// K8 architecture processors.
     //@{
-    CK_Athlon64,
-    CK_Athlon64SSE3,
-    CK_AthlonFX,
     CK_K8,
     CK_K8SSE3,
-    CK_Opteron,
-    CK_OpteronSSE3,
     CK_AMDFAM10,
     //@}
 
     /// \name Bobcat
     /// Bobcat architecture processors.
     //@{
     CK_BTVER1,
     CK_BTVER2,
bool checkCPUKind(CPUKind Kind) const {
     case CK_C3:
     case CK_i586:
     case CK_Pentium:
     case CK_PentiumMMX:
     case CK_i686:
     case CK_PentiumPro:
     case CK_Pentium2:
     case CK_Pentium3:
-    case CK_Pentium3M:
     case CK_PentiumM:
     case CK_Yonah:
     case CK_C3_2:
     case CK_Pentium4:
-    case CK_Pentium4M:
     case CK_Lakemont:
     case CK_Prescott:
     case CK_K6:
     case CK_K6_2:
     case CK_K6_3:
     case CK_Athlon:
-    case CK_AthlonThunderbird:
-    case CK_Athlon4:
     case CK_AthlonXP:
-    case CK_AthlonMP:
     case CK_Geode:
       // Only accept certain architectures when compiling in 32-bit mode.
       if (getTriple().getArch() != llvm::Triple::x86)
         return false;
 
       LLVM_FALLTHROUGH;
     case CK_Nocona:
     case CK_Core2:
     case CK_Penryn:
     case CK_Bonnell:
     case CK_Silvermont:
     case CK_Goldmont:
     case CK_Nehalem:
     case CK_Westmere:
     case CK_SandyBridge:
     case CK_IvyBridge:
     case CK_Haswell:
     case CK_Broadwell:
     case CK_SkylakeClient:
     case CK_SkylakeServer:
     case CK_Cannonlake:
     case CK_KNL:
-    case CK_Athlon64:
-    case CK_Athlon64SSE3:
-    case CK_AthlonFX:
     case CK_K8:
     case CK_K8SSE3:
-    case CK_Opteron:
-    case CK_OpteronSSE3:
     case CK_AMDFAM10:
     case CK_BTVER1:
     case CK_BTVER2:
     case CK_BDVER1:
     case CK_BDVER2:
     case CK_BDVER3:
     case CK_BDVER4:
     case CK_ZNVER1:

cfe/trunk/lib/Basic/Targets/X86.cpp

case CK_Lakemont:
     break;
   case CK_PentiumMMX:
   case CK_Pentium2:
   case CK_K6:
   case CK_WinChipC6:
     setFeatureEnabledImpl(Features, "mmx", true);
     break;
   case CK_Pentium3:
-  case CK_Pentium3M:
   case CK_C3_2:
     setFeatureEnabledImpl(Features, "sse", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
     break;
   case CK_PentiumM:
   case CK_Pentium4:
-  case CK_Pentium4M:
   case CK_x86_64:
     setFeatureEnabledImpl(Features, "sse2", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
     break;
   case CK_Yonah:
   case CK_Prescott:
   case CK_Nocona:
     setFeatureEnabledImpl(Features, "sse3", true);
case CK_KNL:
     break;
   case CK_K6_2:
   case CK_K6_3:
   case CK_WinChip2:
   case CK_C3:
     setFeatureEnabledImpl(Features, "3dnow", true);
     break;
   case CK_Athlon:
-  case CK_AthlonThunderbird:
   case CK_Geode:
     setFeatureEnabledImpl(Features, "3dnowa", true);
     break;
-  case CK_Athlon4:
   case CK_AthlonXP:
-  case CK_AthlonMP:
     setFeatureEnabledImpl(Features, "sse", true);
     setFeatureEnabledImpl(Features, "3dnowa", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
     break;
   case CK_K8:
-  case CK_Opteron:
-  case CK_Athlon64:
-  case CK_AthlonFX:
     setFeatureEnabledImpl(Features, "sse2", true);
     setFeatureEnabledImpl(Features, "3dnowa", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
     break;
   case CK_AMDFAM10:
     setFeatureEnabledImpl(Features, "sse4a", true);
     setFeatureEnabledImpl(Features, "lzcnt", true);
     setFeatureEnabledImpl(Features, "popcnt", true);
     LLVM_FALLTHROUGH;
   case CK_K8SSE3:
-  case CK_OpteronSSE3:
-  case CK_Athlon64SSE3:
     setFeatureEnabledImpl(Features, "sse3", true);
     setFeatureEnabledImpl(Features, "3dnowa", true);
     setFeatureEnabledImpl(Features, "fxsr", true);
     break;
   case CK_BTVER2:
     setFeatureEnabledImpl(Features, "avx", true);
     setFeatureEnabledImpl(Features, "aes", true);
     setFeatureEnabledImpl(Features, "pclmul", true);
case CK_PentiumMMX:
     Builder.defineMacro("__tune_pentium_mmx__");
     LLVM_FALLTHROUGH;
   case CK_i586:
   case CK_Pentium:
     defineCPUMacros(Builder, "i586");
     defineCPUMacros(Builder, "pentium");
     break;
   case CK_Pentium3:
-  case CK_Pentium3M:
   case CK_PentiumM:
     Builder.defineMacro("__tune_pentium3__");
     LLVM_FALLTHROUGH;
   case CK_Pentium2:
   case CK_C3_2:
     Builder.defineMacro("__tune_pentium2__");
     LLVM_FALLTHROUGH;
   case CK_PentiumPro:
     Builder.defineMacro("__tune_i686__");
     Builder.defineMacro("__tune_pentiumpro__");
     LLVM_FALLTHROUGH;
   case CK_i686:
     Builder.defineMacro("__i686");
     Builder.defineMacro("__i686__");
     // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
     Builder.defineMacro("__pentiumpro");
     Builder.defineMacro("__pentiumpro__");
     break;
   case CK_Pentium4:
-  case CK_Pentium4M:
     defineCPUMacros(Builder, "pentium4");
     break;
   case CK_Yonah:
   case CK_Prescott:
   case CK_Nocona:
     defineCPUMacros(Builder, "nocona");
     break;
   case CK_Core2:
if (CPU != CK_K6_2) { // In case of fallthrough
       Builder.defineMacro("__k6_3__");
       Builder.defineMacro("__tune_k6_3__");
     }
     LLVM_FALLTHROUGH;
   case CK_K6:
     defineCPUMacros(Builder, "k6");
     break;
   case CK_Athlon:
-  case CK_AthlonThunderbird:
-  case CK_Athlon4:
   case CK_AthlonXP:
-  case CK_AthlonMP:
     defineCPUMacros(Builder, "athlon");
     if (SSELevel != NoSSE) {
       Builder.defineMacro("__athlon_sse__");
       Builder.defineMacro("__tune_athlon_sse__");
     }
     break;
   case CK_K8:
   case CK_K8SSE3:
   case CK_x86_64:
-  case CK_Opteron:
-  case CK_OpteronSSE3:
-  case CK_Athlon64:
-  case CK_Athlon64SSE3:
-  case CK_AthlonFX:
     defineCPUMacros(Builder, "k8");
     break;
   case CK_AMDFAM10:
     defineCPUMacros(Builder, "amdfam10");
     break;
   case CK_BTVER1:
     defineCPUMacros(Builder, "btver1");
     break;
return llvm::StringSwitch<CPUKind>(CPU)
       .Case("winchip2", CK_WinChip2)
       .Case("c3", CK_C3)
       .Case("i586", CK_i586)
       .Case("pentium", CK_Pentium)
       .Case("pentium-mmx", CK_PentiumMMX)
       .Case("i686", CK_i686)
       .Case("pentiumpro", CK_PentiumPro)
       .Case("pentium2", CK_Pentium2)
-      .Case("pentium3", CK_Pentium3)
-      .Case("pentium3m", CK_Pentium3M)
+      .Cases("pentium3", "pentium3m", CK_Pentium3)
       .Case("pentium-m", CK_PentiumM)
       .Case("c3-2", CK_C3_2)
       .Case("yonah", CK_Yonah)
-      .Case("pentium4", CK_Pentium4)
-      .Case("pentium4m", CK_Pentium4M)
+      .Cases("pentium4", "pentium4m", CK_Pentium4)
       .Case("prescott", CK_Prescott)
       .Case("nocona", CK_Nocona)
       .Case("core2", CK_Core2)
       .Case("penryn", CK_Penryn)
-      .Case("bonnell", CK_Bonnell)
-      .Case("atom", CK_Bonnell) // Legacy name.
-      .Case("silvermont", CK_Silvermont)
-      .Case("slm", CK_Silvermont) // Legacy name.
+      .Cases("bonnell", "atom", CK_Bonnell)
+      .Cases("silvermont", "slm", CK_Silvermont)
       .Case("goldmont", CK_Goldmont)
-      .Case("nehalem", CK_Nehalem)
-      .Case("corei7", CK_Nehalem) // Legacy name.
+      .Cases("nehalem", "corei7", CK_Nehalem)
       .Case("westmere", CK_Westmere)
-      .Case("sandybridge", CK_SandyBridge)
-      .Case("corei7-avx", CK_SandyBridge) // Legacy name.
-      .Case("ivybridge", CK_IvyBridge)
-      .Case("core-avx-i", CK_IvyBridge) // Legacy name.
-      .Case("haswell", CK_Haswell)
-      .Case("core-avx2", CK_Haswell) // Legacy name.
+      .Cases("sandybridge", "corei7-avx", CK_SandyBridge)
+      .Cases("ivybridge", "core-avx-i", CK_IvyBridge)
+      .Cases("haswell", "core-avx2", CK_Haswell)
       .Case("broadwell", CK_Broadwell)
       .Case("skylake", CK_SkylakeClient)
-      .Case("skylake-avx512", CK_SkylakeServer)
-      .Case("skx", CK_SkylakeServer) // Legacy name.
+      .Cases("skylake-avx512", "skx", CK_SkylakeServer)
       .Case("cannonlake", CK_Cannonlake)
       .Case("knl", CK_KNL)
       .Case("lakemont", CK_Lakemont)
       .Case("k6", CK_K6)
       .Case("k6-2", CK_K6_2)
       .Case("k6-3", CK_K6_3)
-      .Case("athlon", CK_Athlon)
-      .Case("athlon-tbird", CK_AthlonThunderbird)
-      .Case("athlon-4", CK_Athlon4)
-      .Case("athlon-xp", CK_AthlonXP)
-      .Case("athlon-mp", CK_AthlonMP)
-      .Case("athlon64", CK_Athlon64)
-      .Case("athlon64-sse3", CK_Athlon64SSE3)
-      .Case("athlon-fx", CK_AthlonFX)
-      .Case("k8", CK_K8)
-      .Case("k8-sse3", CK_K8SSE3)
-      .Case("opteron", CK_Opteron)
-      .Case("opteron-sse3", CK_OpteronSSE3)
-      .Case("barcelona", CK_AMDFAM10)
-      .Case("amdfam10", CK_AMDFAM10)
+      .Cases("athlon", "athlon-tbird", CK_Athlon)
+      .Cases("athlon-xp", "athlon-mp", "athlon-4", CK_AthlonXP)
+      .Cases("k8", "athlon64", "athlon-fx", "opteron", CK_K8)
+      .Cases("k8-sse3", "athlon64-sse3", "opteron-sse3", CK_K8SSE3)
+      .Cases("amdfam10", "barcelona", CK_AMDFAM10)
       .Case("btver1", CK_BTVER1)
       .Case("btver2", CK_BTVER2)
       .Case("bdver1", CK_BDVER1)
       .Case("bdver2", CK_BDVER2)
       .Case("bdver3", CK_BDVER3)
       .Case("bdver4", CK_BDVER4)
       .Case("znver1", CK_ZNVER1)
       .Case("x86-64", CK_x86_64)