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Differential D37190

[x86][AsmParser] Allow some more MS size directives
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Authored by coby on Aug 27 2017, 4:50 AM.

Details

Reviewers
rnk
Commits
rL314410: [x86][AsmParser] Allow some more MS size directives
Summary

MS allows the following size directives: float/double and long as synonymous to dword/qword and dword, respectively.

Diff Detail

Repository
rL LLVM

Event Timeline

coby created this revision.Aug 27 2017, 4:50 AM
rnk accepted this revision.Aug 27 2017, 8:55 AM

Lgtm

This revision is now accepted and ready to land.Aug 27 2017, 8:55 AM
Closed by commit rL314410: [x86][AsmParser] Allow some more MS size directives (authored by coby). · Explain WhySep 28 2017, 4:08 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
X86/
AsmParser/
3 lines
test/
MC/
X86/
7 lines

Diff 112816

lib/Target/X86/AsmParser/X86AsmParser.cpp

Show First 20 Lines • Show All 1,683 Lines • ▼ Show 20 Linesunsigned X86AsmParser::ParseIntelInlineAsmOperator(unsigned OpKind) {
return CVal; return CVal;
} }
bool X86AsmParser::ParseIntelMemoryOperandSize(unsigned &Size) { bool X86AsmParser::ParseIntelMemoryOperandSize(unsigned &Size) {
Size = StringSwitch<unsigned>(getTok().getString()) Size = StringSwitch<unsigned>(getTok().getString())
.Cases("BYTE", "byte", 8) .Cases("BYTE", "byte", 8)
.Cases("WORD", "word", 16) .Cases("WORD", "word", 16)
.Cases("DWORD", "dword", 32) .Cases("DWORD", "dword", 32)
.Cases("FLOAT", "float", 32)
.Cases("LONG", "long", 32)
.Cases("FWORD", "fword", 48) .Cases("FWORD", "fword", 48)
.Cases("DOUBLE", "double", 64)
.Cases("QWORD", "qword", 64) .Cases("QWORD", "qword", 64)
.Cases("MMWORD","mmword", 64) .Cases("MMWORD","mmword", 64)
.Cases("XWORD", "xword", 80) .Cases("XWORD", "xword", 80)
.Cases("TBYTE", "tbyte", 80) .Cases("TBYTE", "tbyte", 80)
.Cases("XMMWORD", "xmmword", 128) .Cases("XMMWORD", "xmmword", 128)
.Cases("YMMWORD", "ymmword", 256) .Cases("YMMWORD", "ymmword", 256)
.Cases("ZMMWORD", "zmmword", 512) .Cases("ZMMWORD", "zmmword", 512)
.Cases("OPAQUE", "opaque", -1U) // needs to be non-zero, but doesn't matter .Cases("OPAQUE", "opaque", -1U) // needs to be non-zero, but doesn't matter
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test/MC/X86/intel-syntax.s

Show First 20 Lines • Show All 687 Lines • ▼ Show 20 Lines"?half@?0??bar@@YAXXZ@4NA":
.quad 4602678819172646912 .quad 4602678819172646912
fadd dword ptr "?half@?0??bar@@YAXXZ@4NA" fadd dword ptr "?half@?0??bar@@YAXXZ@4NA"
fadd dword ptr "?half@?0??bar@@YAXXZ@4NA"@IMGREL fadd dword ptr "?half@?0??bar@@YAXXZ@4NA"@IMGREL
// CHECK: fadds "?half@?0??bar@@YAXXZ@4NA" // CHECK: fadds "?half@?0??bar@@YAXXZ@4NA"
// CHECK: fadds "?half@?0??bar@@YAXXZ@4NA"@IMGREL // CHECK: fadds "?half@?0??bar@@YAXXZ@4NA"@IMGREL
inc qword ptr [rax] inc qword ptr [rax]
inc long ptr [rax]
inc dword ptr [rax] inc dword ptr [rax]
inc word ptr [rax] inc word ptr [rax]
inc byte ptr [rax] inc byte ptr [rax]
// CHECK: incq (%rax) // CHECK: incq (%rax)
// CHECK: incl (%rax) // CHECK: incl (%rax)
// CHECK: incl (%rax)
// CHECK: incw (%rax) // CHECK: incw (%rax)
// CHECK: incb (%rax) // CHECK: incb (%rax)
dec qword ptr [rax] dec qword ptr [rax]
dec dword ptr [rax] dec dword ptr [rax]
dec word ptr [rax] dec word ptr [rax]
dec byte ptr [rax] dec byte ptr [rax]
// CHECK: decq (%rax) // CHECK: decq (%rax)
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// CHECK: vcomisd (%eax), %xmm0 // CHECK: vcomisd (%eax), %xmm0
// CHECK: vcomiss (%eax), %xmm0 // CHECK: vcomiss (%eax), %xmm0
fbld tbyte ptr [eax] fbld tbyte ptr [eax]
fbstp tbyte ptr [eax] fbstp tbyte ptr [eax]
// CHECK: fbld (%eax) // CHECK: fbld (%eax)
// CHECK: fbstp (%eax) // CHECK: fbstp (%eax)
fld float ptr [rax]
fld double ptr [rax]
// CHECK: flds (%rax)
// CHECK: fldl (%rax)
fcomip st, st(2) fcomip st, st(2)
fucomip st, st(2) fucomip st, st(2)
// CHECK: fcompi %st(2) // CHECK: fcompi %st(2)
// CHECK: fucompi %st(2) // CHECK: fucompi %st(2)
loopz _foo loopz _foo
loopnz _foo loopnz _foo
// CHECK: loope _foo // CHECK: loope _foo
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