Increase tail dup threshold for -O3 from 3 to 4

[rsmith]

Summary

We see a modest performance improvement from this slightly higher tail dup threshold (~0.1% geomean across the suite).

[davidxl]

Will test on some very large programs that are sensitive to icache pressure and get back.

[davidxl]

performance tests with large benchmarks showed no regression.

[davidxl]

lgtm

[MatzeB]

For the record: This broke the greendragon "Project Clang Stage 1: cmake, RA, with expensive checks enabled" build (possibly hidden by other errors).

The output looks like something breaks instruction bundles into individual unbundled instructions while tail duplicating. This affects predicated ARMv7 code after if-conversion.

Given that it seems to be a pre-existing bug and only affects that one build I'd suggest to keep this commit in for now and I'll hopefully be able to fix the bug soon.

[MatzeB]

Pushed r311511 to stop taildup from unbundling instructions by accident. Post-commit reviews apreciated!

llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp

cl::desc("Instruction cutoff for tail duplication during layout. "
              "that won't conflict."), cl::init(2),
     cl::Hidden);
 
 // Heuristic for aggressive tail duplication.
 static cl::opt<unsigned> TailDupPlacementAggressiveThreshold(
     "tail-dup-placement-aggressive-threshold",
     cl::desc("Instruction cutoff for aggressive tail duplication during "
              "layout. Used at -O3. Tail merging during layout is forced to "
-             "have a threshold that won't conflict."), cl::init(3),
+             "have a threshold that won't conflict."), cl::init(4),
     cl::Hidden);
 
 // Heuristic for tail duplication.
 static cl::opt<unsigned> TailDupPlacementPenalty(
     "tail-dup-placement-penalty",
     cl::desc("Cost penalty for blocks that can avoid breaking CFG by copying. "
              "Copying can increase fallthrough, but it also increases icache "
              "pressure. This parameter controls the penalty to account for that. "

llvm/trunk/test/CodeGen/Mips/brconge.ll

-; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O2 < %s | FileCheck %s -check-prefix=16
 
 @i = global i32 5, align 4
 @j = global i32 10, align 4
 @k = global i32 5, align 4
 @result1 = global i32 0, align 4
 @result2 = global i32 1, align 4
 
 define void @test() nounwind {

llvm/trunk/test/CodeGen/Mips/brconle.ll

-; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+; RUN: llc  -march=mipsel -mattr=mips16 -relocation-model=pic -O2 < %s | FileCheck %s -check-prefix=16
 
 @i = global i32 -5, align 4
 @j = global i32 10, align 4
 @k = global i32 -5, align 4
 @result1 = global i32 0, align 4
 @result2 = global i32 1, align 4
 
 define void @test() nounwind {

llvm/trunk/test/CodeGen/X86/tail-dup-repeat.ll

-; RUN: llc -O3 -tail-dup-placement-threshold=4 -o - %s | FileCheck %s
+; RUN: llc -O3 -o - %s | FileCheck %s
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ; Function Attrs: uwtable
 ; When tail-duplicating during placement, we work backward from blocks with
 ; multiple successors. In this case, the block dup1 gets duplicated into dup2
 ; and if.then64, and then the block dup2 gets duplicated into land.lhs.true
 ; and if.end70