This patch is needed for D36679.
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Details
Diff Detail
Diff Detail
- Repository
- rL LLVM
Event Timeline
test/Transforms/InstCombine/shift.ll | ||
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225–235 ↗ | (On Diff #111168) | This test doesn't change with this patch, does it? Demanded-bits should already get this. That's why my suggested test case included an extra use of the right-shifted value. Also, I'm not sure if your intent was to purposely show a hole in utils/update_test_checks.py, but for the sake of human readability, please don't use variables that only differ in capitalization. :) |
test/Transforms/InstCombine/shift.ll | ||
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225–235 ↗ | (On Diff #111168) | Sorry, I missed the point that the "ashr" instruction was used twice on the test you suggested. |