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[InstCombine] Added support for (X >>s C) << C --> X & (-1 << C)
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Authored by aaboud on Aug 15 2017, 8:19 AM.

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rL LLVM

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spatel added inline comments.Aug 15 2017, 8:45 AM
test/Transforms/InstCombine/shift.ll
225–235 ↗(On Diff #111168)

This test doesn't change with this patch, does it? Demanded-bits should already get this. That's why my suggested test case included an extra use of the right-shifted value.

Also, I'm not sure if your intent was to purposely show a hole in utils/update_test_checks.py, but for the sake of human readability, please don't use variables that only differ in capitalization. :)

aaboud updated this revision to Diff 111186.Aug 15 2017, 9:15 AM

Updated the test to a more relevant one.

aaboud marked an inline comment as done.Aug 15 2017, 9:17 AM
aaboud added inline comments.
test/Transforms/InstCombine/shift.ll
225–235 ↗(On Diff #111168)

Sorry, I missed the point that the "ashr" instruction was used twice on the test you suggested.
I updated the patch accordingly.

spatel accepted this revision.Aug 15 2017, 9:37 AM

LGTM.

This revision is now accepted and ready to land.Aug 15 2017, 9:37 AM
This revision was automatically updated to reflect the committed changes.
aaboud marked an inline comment as done.